Generated by: CheckIt 7.00 Factory Edition Date : 08-May-2002 Time : 13h:30m Customer : customer Technician : technician
Full Report
Hardware Detection Summary |
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Platform : Compaq, Intel(R) 440BX AGPset System : s/n 1J98CYB6710V CPU : Mobile Pentium(R) II or Pentium(R) II Processor Mobile Module, 333 MHz BIOS : Compaq, 1.35 Memory : 64 MB Video : Rage 3D LT Pro PCI (BGA-312 Package), 4 MB I/O Buses : ISA, PCI, IDE, PCMCIA, USB Floppy : 1.44MB, 3.5" Drive A HDD(s) : IBM-DBCA-206480, 6.19 Gb, s/n HR0HRMM0637 CD-ROM(s) : CD-224E, x24 Serial : COM1, COM3 Parallel : LPT1 Modem(s) : 56k V.90 Modem Sound : ES1978 Maestro Audiodrive |
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Plug'n'Play |
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Plug'n'Play ================================================================================ Plug & Play Installation Check Results -------------------------------------------------------------------------------- Version of PnP BIOS specification : 1.0 Checksum : E0h(valid) Event notification is : handled through polling Event notification flag address : 000F5186h OEM device identifier : CPQB131 PnP BIOS Real Mode API -------------------------------------------------------------------------------- Physical address of entry point : F000:51A7h Data segment base address : F000h PnP BIOS 16-Bit Protected Mode API -------------------------------------------------------------------------------- PM segment base address : 000F0000h PM offset to entry point : 518Eh Data segment base address : 000F0000h |
Docking Station |
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Docking Station Information ================================================================================ System currently not docked! |
System Device List |
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PnP BIOS Supports System Device Enumeration ================================================================================ Number of System device nodes : 16 System device node maximum size : 250 |
Math Coprocessor |
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Id : PNP0C04 (Math Coprocessor) Handle : 1h Base Class : 0Bh (Processor) SubClass : 80h (Unknown) Interface : 00h (Unknown) Currently Assigned System Resources ================================================================================ I/O Range : 00F0h - 00FFh IRQ Channel : 13 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00F0h Maximum base I/O address : 00F0h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 10h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 13 Driven IRQ types : High true edge sensitive Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
System Board |
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Id : PNP0C01 (System Board) Handle : 2h Base Class : 05h (Memory Controller) SubClass : 00h (RAM Controller) Interface : 00h (RAM Controller) Currently Assigned System Resources ================================================================================ Memory Range : 00000000h - 0009FFFFh Memory Range : 000F0000h - 000FFFFFh Memory Range : 00100000h - 03FFFFFFh Allocated resource configuration descriptor block ================================================================================ 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Writeable Cache support type : Read cacheable, write-through Support type : Decode supports range length Memory control : 16-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : 00000000h Range length : 000A0000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Writeable Cache support type : Read cacheable, write-through Support type : Decode supports range length Memory control : 16-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : 000F0000h Range length : 00010000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Writeable Cache support type : Read cacheable, write-through Support type : Decode supports range length Memory control : 16-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : 00100000h Range length : 03F00000h bytes Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
PCI Bus |
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Id : PNP0A03 (PCI Bus) Handle : 3h Base Class : 06h (Bridge Device) SubClass : 04h (PCI-to-PCI Bridge) Interface : 00h (PCI-to-PCI Bridge) Currently Assigned System Resources ================================================================================ I/O Range : 0CF8h - 0CFFh Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0CF8h Maximum base I/O address : 0CF8h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
AT Interrupt Controller |
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Id : PNP0000 (AT Interrupt Controller) Handle : 4h Base Class : 08h (Generic System Peripheral) SubClass : 00h (PIC) Interface : 01h (ISA PIC) Currently Assigned System Resources ================================================================================ I/O Range : 0020h - 0021h I/O Range : 00A0h - 00A1h IRQ Channel : 02 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0020h Maximum base I/O address : 0020h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00A0h Maximum base I/O address : 00A0h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 02h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 2 Driven IRQ types : High true edge sensitive Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
AT DMA Controller |
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Id : PNP0200 (AT DMA Controller) Handle : 5h Base Class : 08h (Generic System Peripheral) SubClass : 01h (DMA Controller) Interface : 01h (ISA DMA Controller) Currently Assigned System Resources ================================================================================ I/O Range : 0000h - 000Fh I/O Range : 0080h - 008Fh I/O Range : 00C0h - 00DFh DMA Channel : 4 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0000h Maximum base I/O address : 0000h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 10h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0080h Maximum base I/O address : 0080h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 10h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00C0h Maximum base I/O address : 00C0h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 20h DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 4 Transfer type preference : 16-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
AT Timer |
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Id : PNP0100 (AT Timer) Handle : 6h Base Class : 08h (Generic System Peripheral) SubClass : 02h (System timer) Interface : 01h (ISA System Timer) Currently Assigned System Resources ================================================================================ I/O Range : 0040h - 0043h IRQ Channel : 00 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0040h Maximum base I/O address : 0040h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 04h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 0 Driven IRQ types : High true edge sensitive Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
AT standard speaker sound |
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Id : PNP0800 (AT standard speaker sound) Handle : 7h Base Class : 08h (Generic System Peripheral) SubClass : 80h (Other system periheral) Interface : 00h (Other system periheral) Currently Assigned System Resources ================================================================================ I/O Range : 0061h - 0061h Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0061h Maximum base I/O address : 0061h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 01h Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
AT Real-Time Clock |
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Id : PNP0B00 (AT Real-Time Clock) Handle : 8h Base Class : 08h (Generic System Peripheral) SubClass : 03h (RTC Controller) Interface : 01h (ISA RTC controller) Currently Assigned System Resources ================================================================================ I/O Range : 0070h - 0071h I/O Range : 0072h - 0072h I/O Range : 0073h - 0073h IRQ Channel : 08 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0070h Maximum base I/O address : 0070h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0072h Maximum base I/O address : 0072h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 01h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0073h Maximum base I/O address : 0073h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 01h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 8 Driven IRQ types : High true edge sensitive Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
IBM Enhanced keyboard controller (101/2-key) |
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Id : PNP0303 (IBM Enhanced keyboard controller (101/2-key)) Handle : 9h Base Class : 09h (Input Device) SubClass : 00h (Keyboard) Interface : 00h (Keyboard) Currently Assigned System Resources ================================================================================ I/O Range : 0060h - 0060h I/O Range : 0064h - 0064h IRQ Channel : 01 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0060h Maximum base I/O address : 0060h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 01h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0064h Maximum base I/O address : 0064h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 01h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 1 Driven IRQ types : High true edge sensitive Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : Yes c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
PS/2 Port for PS/2-style Mice |
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Id : PNP0F13 (PS/2 Port for PS/2-style Mice) Handle : Ah Base Class : 09h (Input Device) SubClass : 02h (Mouse) Interface : 00h (Mouse) Currently Assigned System Resources ================================================================================ IRQ Channel : 12 Allocated resource configuration descriptor block ================================================================================ IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 12 Driven IRQ types : High true edge sensitive Compatible device identifiers ================================================================================ Compatible Device ID -------------------------------------------------------------------------------- Compatible device ID : PNP0F0E Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : Yes c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
PC standard floppy disk controller |
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Id : PNP0700 (PC standard floppy disk controller) Handle : Bh Base Class : 01h (Mass Storage Controller) SubClass : 02h (Floppy Disk Controller) Interface : 00h (Floppy Disk Controller) Currently Assigned System Resources ================================================================================ I/O Range : 03F0h - 03F5h I/O Range : 03F7h - 03F7h IRQ Channel : 06 DMA Channel : 2 Allocated resource configuration descriptor block ================================================================================ IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 6 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 2 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03F0h Maximum base I/O address : 03F0h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 06h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03F7h Maximum base I/O address : 03F7h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 01h Possible resource configuration descriptor block ================================================================================ IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 6 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 2 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03F0h Maximum base I/O address : 03F0h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 06h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03F7h Maximum base I/O address : 03F7h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 01h Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : No Device is not configurable : No Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : Yes Device is: a) a docking station device : No b) a removable system device : No Device can be configured at runtime (dynamically) |
ECP printer port |
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Id : PNP0401 (ECP printer port) Handle : Ch Base Class : 07h (Simple Communication Controller) SubClass : 01h (Parallel Port) Interface : 02h (ECP 1.X Compliant Parallel Port) Currently Assigned System Resources ================================================================================ I/O Range : 0378h - 037Fh I/O Range : 0778h - 077Ah IRQ Channel : 07 DMA Channel : 3 Allocated resource configuration descriptor block ================================================================================ IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 7 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 3 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0378h Maximum base I/O address : 0378h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0778h Maximum base I/O address : 0778h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 03h Possible resource configuration descriptor block ================================================================================ Start Dependent Functions -------------------------------------------------------------------------------- Priority : Good configuration IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 5,7 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 2,3 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0378h Maximum base I/O address : 0378h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0778h Maximum base I/O address : 0778h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 03h Start Dependent Functions -------------------------------------------------------------------------------- Priority : Good configuration IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 5,7 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 2,3 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0278h Maximum base I/O address : 0278h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0678h Maximum base I/O address : 0678h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 03h Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 5,7 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 2,3 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03BCh Maximum base I/O address : 03BCh Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 04h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 07BCh Maximum base I/O address : 07BCh Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 03h Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 5,7 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : None Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0378h Maximum base I/O address : 0378h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0778h Maximum base I/O address : 0778h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 03h Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 5,7 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : None Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0278h Maximum base I/O address : 0278h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0678h Maximum base I/O address : 0678h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 03h Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 5,7 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : None Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03BCh Maximum base I/O address : 03BCh Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 04h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 07BCh Maximum base I/O address : 07BCh Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 03h Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present IRQ Format -------------------------------------------------------------------------------- Possible IRQs : None Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : None Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0378h Maximum base I/O address : 0378h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0778h Maximum base I/O address : 0778h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 03h Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present IRQ Format -------------------------------------------------------------------------------- Possible IRQs : None Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : None Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0278h Maximum base I/O address : 0278h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0678h Maximum base I/O address : 0678h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 03h Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present IRQ Format -------------------------------------------------------------------------------- Possible IRQs : None Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : None Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03BCh Maximum base I/O address : 03BCh Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 04h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 07BCh Maximum base I/O address : 07BCh Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 03h End Dependent Functions -------------------------------------------------------------------------------- Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : No Device is not configurable : No Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at runtime (dynamically) |
16550A-compatible COM port |
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Id : PNP0501 (16550A-compatible COM port) Handle : Dh Base Class : 07h (Simple Communication Controller) SubClass : 00h (Serial Controller) Interface : 02h (16550-Compatible Serial Controller) Currently Assigned System Resources ================================================================================ I/O Range : 03F8h - 03FFh IRQ Channel : 04 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03F8h Maximum base I/O address : 03F8h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 4 Driven IRQ types : High true edge sensitive Possible resource configuration descriptor block ================================================================================ Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03F8h Maximum base I/O address : 03F8h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 4 Driven IRQ types : High true edge sensitive Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 02F8h Maximum base I/O address : 02F8h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 3 Driven IRQ types : High true edge sensitive Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03E8h Maximum base I/O address : 03E8h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 4 Driven IRQ types : High true edge sensitive Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 02E8h Maximum base I/O address : 02E8h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 3 Driven IRQ types : High true edge sensitive End Dependent Functions -------------------------------------------------------------------------------- Compatible device identifiers ================================================================================ Compatible Device ID -------------------------------------------------------------------------------- Compatible device ID : PNP0500 Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : No Device is not configurable : No Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at runtime (dynamically) |
SMC IrCC (Infrared Communications Controller) |
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Id : SMCF010 (SMC IrCC (Infrared Communications Controller)) Handle : Eh Base Class : 07h (Simple Communication Controller) SubClass : 00h (Serial Controller) Interface : 02h (16550-Compatible Serial Controller) Currently Assigned System Resources ================================================================================ I/O Range : 03E8h - 03EFh I/O Range : 0100h - 0107h IRQ Channel : 03 DMA Channel : 5 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03E8h Maximum base I/O address : 03E8h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0100h Maximum base I/O address : 0100h Alignment for minimum base addr. : 10h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 3 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 5 Transfer type preference : 16-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Possible resource configuration descriptor block ================================================================================ Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03E8h Maximum base I/O address : 03E8h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0100h Maximum base I/O address : 0130h Alignment for minimum base addr. : 10h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 3,5,7,9,10 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 5 Transfer type preference : 16-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 02F8h Maximum base I/O address : 02F8h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0100h Maximum base I/O address : 0130h Alignment for minimum base addr. : 10h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 3,5,7,9,10 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 5 Transfer type preference : 16-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03F8h Maximum base I/O address : 03F8h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0100h Maximum base I/O address : 0130h Alignment for minimum base addr. : 10h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 3,5,7,9,10 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 5 Transfer type preference : 16-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 02E8h Maximum base I/O address : 02E8h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0100h Maximum base I/O address : 0130h Alignment for minimum base addr. : 10h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 3,5,7,9,10 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 5 Transfer type preference : 16-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03E8h Maximum base I/O address : 03E8h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0100h Maximum base I/O address : 0130h Alignment for minimum base addr. : 10h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 3,5,7,9,10 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 2,3 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 02F8h Maximum base I/O address : 02F8h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0100h Maximum base I/O address : 0130h Alignment for minimum base addr. : 10h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 3,5,7,9,10 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 2,3 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03F8h Maximum base I/O address : 03F8h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0100h Maximum base I/O address : 0130h Alignment for minimum base addr. : 10h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 3,5,7,9,10 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 2,3 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 02E8h Maximum base I/O address : 02E8h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0100h Maximum base I/O address : 0130h Alignment for minimum base addr. : 10h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 3,5,7,9,10 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 2,3 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible End Dependent Functions -------------------------------------------------------------------------------- Compatible device identifiers ================================================================================ Compatible Device ID -------------------------------------------------------------------------------- Compatible device ID : PNP0511 Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : No Device is not configurable : No Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at runtime (dynamically) |
Intel 82365-compatible CardBus controller |
|---|
Id : PNP0E03 (Intel 82365-compatible CardBus controller) Handle : Fh Base Class : 06h (Bridge Device) SubClass : 05h (PCMCIA Bridge) Interface : 00h (PCMCIA Bridge) Currently Assigned System Resources ================================================================================ I/O Range : 03E0h - 03E1h Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03E0h Maximum base I/O address : 03E0h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 02h Possible resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03E0h Maximum base I/O address : 03E0h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 02h Compatible device identifiers ================================================================================ Compatible Device ID -------------------------------------------------------------------------------- Compatible device ID : PNP0E00 Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : No Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at runtime only (dynamically) |
Motherboard registers |
|---|
Id : PNP0C02 (Motherboard registers) Handle : 10h Base Class : 0Bh (Processor) SubClass : 02h (Pentium) Interface : 00h (Pentium) Currently Assigned System Resources ================================================================================ Memory Range : FFF80000h - FFFFFFFFh I/O Range : 0010h - 001Fh I/O Range : 0022h - 003Fh I/O Range : 0044h - 005Fh I/O Range : 0062h - 0063h I/O Range : 0065h - 006Fh I/O Range : 0074h - 0077h I/O Range : 0090h - 0091h I/O Range : 0092h - 0092h I/O Range : 0093h - 009Fh I/O Range : 00A2h - 00BFh I/O Range : 00E0h - 00E5h I/O Range : 00E7h - 00E7h I/O Range : 00ECh - 00EFh I/O Range : 04D0h - 04D1h I/O Range : 0800h - 087Fh I/O Range : 5000h - 5063h I/O Range : 4000h - 400Fh I/O Range : 6004h - 6005h Allocated resource configuration descriptor block ================================================================================ 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 16-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FFF80000h Range length : 00080000h bytes I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0010h Maximum base I/O address : 0010h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 10h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0022h Maximum base I/O address : 0022h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 1Eh I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0044h Maximum base I/O address : 0044h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 1Ch I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0062h Maximum base I/O address : 0062h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0065h Maximum base I/O address : 0065h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 0Bh I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0074h Maximum base I/O address : 0074h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 04h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0090h Maximum base I/O address : 0090h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0092h Maximum base I/O address : 0092h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 01h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0093h Maximum base I/O address : 0093h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 0Dh I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00A2h Maximum base I/O address : 00A2h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 1Eh I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00E0h Maximum base I/O address : 00E0h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 06h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00E7h Maximum base I/O address : 00E7h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 01h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00ECh Maximum base I/O address : 00ECh Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 04h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 04D0h Maximum base I/O address : 04D0h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0800h Maximum base I/O address : 0800h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 80h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 5000h Maximum base I/O address : 5000h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 64h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 4000h Maximum base I/O address : 4000h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 10h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 6004h Maximum base I/O address : 6004h Alignment for minimum base addr. : 00h Number of contiguous I/O ports : 02h Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
ISA Configuration |
|---|
Plug & Play ISA Configuration ================================================================================ Revision : 0.1 Total number of CSNs* assigned : 0 ISA Read Data Port : 0000h *CSN - Card Select Number |
PCI BIOS |
|---|
PCI (Peripheral Component Interconnect architecture): ================================================================================ Last PCI Bus Number in System...........0 Version................................ 2.10 Hardware Configuration mechanism....... 1 |
PCI IRQ Routing |
|---|
PCI IRQ Routing Information Table
================================================================================
IRQ Channels permanently dedicated to PCI: 11
Device Slot Number : 0 (Motherboard device)
Function 0 configured on IRQ channel 11 (INTA#)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 00h:05h:0h (Rage 3D LT Pro PCI (BGA-312 Package))
INTA# Link value : 60h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 11
INTB# Link value : 0h (Not Connected to PIC)
INTB# IRQ Connectivity bitmap :
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap :
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap :
Device Slot Number : 0 (Motherboard device)
Function 0 configured on IRQ channel 11 (INTA#)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 00h:04h:0h (PCI1211 PC card CardBus Controller)
INTA# Link value : 60h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 11
INTB# Link value : 0h (Not Connected to PIC)
INTB# IRQ Connectivity bitmap :
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap :
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap :
Device Slot Number : 0 (Motherboard device)
Function 0 is not configured on any IRQ channel
Function 1 is not configured on any IRQ channel
Function 2 configured on IRQ channel 11 (INTD#)
Function 3 is not configured on any IRQ channel
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 00h:07h:0h (82371AB/EB PIIX4 ISA Bridge)
INTA# Link value : 0h (Not Connected to PIC)
INTA# IRQ Connectivity bitmap :
INTB# Link value : 0h (Not Connected to PIC)
INTB# IRQ Connectivity bitmap :
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap :
INTD# Link value : 63h ( Connected to PIC)
INTD# IRQ Connectivity bitmap : 11
Device Slot Number : 0 (Motherboard device)
Function 0 configured on IRQ channel 11 (INTA#)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 00h:08h:0h (ES1978 Maestro Audiodrive)
INTA# Link value : 62h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 11
INTB# Link value : 0h (Not Connected to PIC)
INTB# IRQ Connectivity bitmap :
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap :
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap :
Device Slot Number : 0 (Motherboard device)
Function 0 configured on IRQ channel 11 (INTA#)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 00h:09h:0h (LT WinModem 56k)
INTA# Link value : 62h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 11
INTB# Link value : 63h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 11
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap :
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap :
Device Slot Number : 11 (Physical Slot)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 00h:10h:0h (Empty)
INTA# Link value : 60h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 11
INTB# Link value : 61h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 11
INTC# Link value : 62h ( Connected to PIC)
INTC# IRQ Connectivity bitmap : 11
INTD# Link value : 63h ( Connected to PIC)
INTD# IRQ Connectivity bitmap : 11
Device Slot Number : 0 (Motherboard device)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 00h:0Ch:0h (Empty)
INTA# Link value : 60h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 11
INTB# Link value : 61h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 11
INTC# Link value : 62h ( Connected to PIC)
INTC# IRQ Connectivity bitmap : 11
INTD# Link value : 63h ( Connected to PIC)
INTD# IRQ Connectivity bitmap : 11
Device Slot Number : 0 (Motherboard device)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 02h:07h:0h (Empty)
INTA# Link value : 60h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 11
INTB# Link value : 0h (Not Connected to PIC)
INTB# IRQ Connectivity bitmap :
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap :
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap :
Device Slot Number : 11 (Physical Slot)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 02h:08h:0h (Empty)
INTA# Link value : 60h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 11
INTB# Link value : 61h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 11
INTC# Link value : 62h ( Connected to PIC)
INTC# IRQ Connectivity bitmap : 11
INTD# Link value : 63h ( Connected to PIC)
INTD# IRQ Connectivity bitmap : 11
Device Slot Number : 12 (Physical Slot)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 02h:09h:0h (Empty)
INTA# Link value : 61h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 11
INTB# Link value : 62h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 11
INTC# Link value : 63h ( Connected to PIC)
INTC# IRQ Connectivity bitmap : 11
INTD# Link value : 60h ( Connected to PIC)
INTD# IRQ Connectivity bitmap : 11
Device Slot Number : 13 (Physical Slot)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 02h:0Ah:0h (Empty)
INTA# Link value : 62h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 11
INTB# Link value : 63h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 11
INTC# Link value : 60h ( Connected to PIC)
INTC# IRQ Connectivity bitmap : 11
INTD# Link value : 61h ( Connected to PIC)
INTD# IRQ Connectivity bitmap : 11
Note: Any of INTx# lines whose link values are
identical are assumed to share the same
IRQ channel.
|
PCI Bus 00 |
|---|
PCI Bus 00 |
Host Bridge |
|---|
82443BX/ZX 440BX/ZX PCI-Host Bridge (AGP Disabled) Host Bridge ================================================================================ PCI Device 0:0:0 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 7192h (82443BX/ZX 440BX/ZX PCI-Host Bridge (AGP Disabled)) Revision ID : 03h Subsystem Vendor ID : 0E11h (Compaq) Subsystem Device ID : B110h (info unavailable) Base class code : 06h (Bridge Device) Sub-class code : 00h (Host Bridge) Programming interface : 00h (Host Bridge) Base Address Registers: ----------------------------------------------------- BAR Type Base Size Comments ----------------------------------------------------- 0 Mem 50000000h 10000000h 256 MB. 32 bit. Prefetchable. Locate anywhere in 32 bit address space Command register : 06h -------------------------------------------------------------------------------- I/O space access : disabled Memory space access : enabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 00h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : No Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : Yes Signalled System Error : No Detected parity error : No Header Type : 00h (Device, Single) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 92 71 - 06 00 00 22 "...q..."" 0008: 03 00 00 06 - 00 40 00 00 ".....@.." 0010: 08 00 00 50 - 00 00 00 00 "...P...." 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: 00 00 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 11 0E 10 B1 "........" 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 00 00 00 00 "........" 0040: 00 00 00 00 - 00 00 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 0C A0 00 FF - 00 00 00 09 "........" 0058: 03 10 11 11 - 00 00 00 00 "........" 0060: 00 00 04 08 - 08 08 08 08 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 20 1F 0A 38 - 00 00 03 01 " ..8...." 0078: 06 0C DE 38 - 00 00 00 00 "...8...." 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 80 00 00 00 - 04 61 00 00 ".....a.." 0098: 00 05 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 00 - 03 02 00 1F "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 00 00 00 - 00 00 00 00 "........" 00C8: 18 0C 00 00 - 00 00 00 00 "........" 00D0: 17 C0 FF FF - 00 00 00 00 "........" 00D8: 0C 00 00 00 - 00 00 00 00 "........" 00E0: 9C B3 FF 7F - 8F 3E 00 80 ".....>.." 00E8: 2C D3 F7 CF - 9D 3E 00 00 ",....>.." 00F0: 40 01 00 00 - 00 F8 00 60 "@......`" 00F8: 20 0F 00 00 - 00 00 00 00 " ......." |
Socket 0 |
|---|
PCI1211 PC card CardBus Controller CardBus Bridge ================================================================================ PCI Device 0:4:0 (Hex) (Bus:Device:Function) Vendor ID : 104Ch (Texas Instruments (TI)) Device ID : AC1Eh (PCI1211 PC card CardBus Controller) Revision ID : 00h Subsystem Vendor ID : 0E11h (Compaq) Subsystem Device ID : B103h (info unavailable) Base class code : 06h (Bridge Device) Sub-class code : 07h (CardBus Bridge) Programming interface : 00h (CardBus Bridge) --------------------------------------------- Reg. Type Base Limit --------------------------------------------- 0 Mem 00000000h 00000000h 1 Mem 00000000h 00000000h 0 I/O 00000000h 00000000h 1 I/O 00000000h 00000000h PC Card 16-bit IF Legacy Mode Base Address : 000003E0h (I/O) CardBus socket Registers/ExCA Base address Register : 7FFFE000h (Memory) Interrupt Pin : INTA# Interrupt Line : IRQ11 Command register : 07h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : enabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 10h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : No Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No New Capabilities Linked List is available PCI Power Management Interface capability ID found Header Type : 02h (CardBus bridge, Single) Built-In Self-Test : No Cache Line Size : 32 bytes PCI bus number : 0 CardBus Bus number : 1 Subordinate Bus Number : 1 Secondary status : 0200h CardBus Latency Timer : not specified Bridge Control : 03C0h Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 4C 10 1E AC - 07 00 10 02 "L......." 0008: 00 00 07 06 - 08 42 02 00 ".....B.." 0010: 00 E0 FF 7F - A0 00 00 02 "........" 0018: 00 01 01 00 - 00 00 00 00 "........" 0020: 00 00 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 00 00 00 00 "........" 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 0B 01 C0 03 "........" 0040: 11 0E 03 B1 - E1 03 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 00 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 60 90 44 00 - 00 00 00 00 "`.D....." 0088: 00 00 00 00 - 02 10 00 01 "........" 0090: 80 02 64 60 - 00 00 00 00 "..d`...." 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 01 00 21 7E - 00 00 C0 00 "..!~...." 00A8: 00 00 00 00 - 1F 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 00 00 00 - 00 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 00 00 00 00 - 00 00 00 00 "........" |
VGA Device |
|---|
Rage 3D LT Pro PCI (BGA-312 Package)
VGA Compatible Controller
================================================================================
PCI Device 0:5:0 (Hex) (Bus:Device:Function)
Vendor ID : 1002h (ATI Technologies)
Device ID : 4C49h (Rage 3D LT Pro PCI (BGA-312 Package))
Revision ID : DCh
Subsystem Vendor ID : 0E11h (Compaq)
Subsystem Device ID : B11Bh (info unavailable)
Base class code : 03h (Display Controller)
Sub-class code : 00h (VGA Device)
Programming interface : 00h (VGA Compatible Controller)
Base Address Registers:
-----------------------------------------------------
BAR Type Base Size Comments
-----------------------------------------------------
0 Mem 40000000h 01000000h 16 MB. 32 bit. Locate anywhere in 32 bit address space
1 I/O 00003000h 00000100h 256 B.
2 Mem 41080000h 00001000h 4 KB. 32 bit. Locate anywhere in 32 bit address space
Interrupt Pin : INTA#
Interrupt Line : IRQ11
Command register : 87h
--------------------------------------------------------------------------------
I/O space access : enabled
Memory space access : enabled
Bus master : enabled
Special cycles operations : ignore
Memory write and Invalidate : disabled
VGA palette snoop : disabled
Parity error response : disabled
Wait cycle control : enabled
System error line #SERR : disabled
Fast back-to-back transaction : disabled
Device Status Register : 90h
--------------------------------------------------------------------------------
Capable of running at 66MHz : No
UDF supported : No
Fast back-to-back Capable : Yes
Data parity error detected : No
Device select timing : medium
Signalled Target Abort : No
Received Target Abort : No
Received Master Abort : No
Signalled System Error : No
Detected parity error : No
New Capabilities Linked List is available
PCI Power Management Interface capability ID found
Header Type : 00h (Device, Single)
Built-In Self-Test : No
Cache Line Size : 32 bytes
Desirable settings for Latency Timer values
MIN_GNT : 2000 nanosecs. (*)
MAX_LAT : 0 nanosecs. (*)
*) MIN_GNT - specify how long a burst period
the device needs assuming a clock
rate of 33 MHz)
MAX_LAT - specify how often the device needs
to gain access to the PCI bus)
Dump of PCI Configuration Space
--------------------------------------------------------------------------------
0000: 02 10 49 4C - 87 00 90 02 "..IL...."
0008: DC 00 00 03 - 08 42 00 00 ".....B.."
0010: 00 00 00 40 - 01 30 00 00 "...@.0.."
0018: 00 00 08 41 - 00 00 00 00 "...A...."
0020: 00 00 00 00 - 00 00 00 00 "........"
0028: 00 00 00 00 - 11 0E 1B B1 "........"
0030: 00 00 00 00 - 5C 00 00 00 "....\..."
0038: 00 00 00 00 - 0B 01 08 00 "........"
0040: 0C 00 00 00 - 00 00 00 00 "........"
0048: 00 00 00 00 - 00 00 00 00 "........"
0050: 02 5C 10 00 - 01 00 00 FF ".\......"
0058: 00 00 00 00 - 01 00 01 06 "........"
0060: 00 00 00 00 - 00 00 00 00 "........"
0068: 00 00 00 00 - 00 00 00 00 "........"
0070: 00 00 00 00 - 00 00 00 00 "........"
0078: 00 00 00 00 - 00 00 00 00 "........"
0080: 00 00 00 00 - 00 00 00 00 "........"
0088: 00 00 00 00 - 00 00 00 00 "........"
0090: 00 00 00 00 - 00 00 00 00 "........"
0098: 00 00 00 00 - 00 00 00 00 "........"
00A0: 00 00 00 00 - 00 00 00 00 "........"
00A8: 00 00 00 00 - 00 00 00 00 "........"
00B0: 00 00 00 00 - 00 00 00 00 "........"
00B8: 00 00 00 00 - 00 00 00 00 "........"
00C0: 00 00 00 00 - 00 00 00 00 "........"
00C8: 00 00 00 00 - 00 00 00 00 "........"
00D0: 00 00 00 00 - 00 00 00 00 "........"
00D8: 00 00 00 00 - 00 00 00 00 "........"
00E0: 00 00 00 00 - 00 00 00 00 "........"
00E8: 00 00 00 00 - 00 00 00 00 "........"
00F0: 00 00 00 00 - 00 00 00 00 "........"
00F8: 00 00 00 00 - 00 00 00 00 "........"
|
PCI Multifunctional device |
|---|
PCI Multifunctional device ================================================================================ Function 0: 82371AB/EB PIIX4 ISA Bridge Function 1: 82371AB/EB PIIX4 EIDE Controller Function 2: 82371AB/EB PIIX4 USB Controller Function 3: 82371AB/EB PIIX4 Power Management Controller |
Other bridge device |
|---|
82371AB/EB PIIX4 ISA Bridge
Other bridge device
================================================================================
PCI Device 0:7:0 (Hex) (Bus:Device:Function)
Vendor ID : 8086h (Intel)
Device ID : 7110h (82371AB/EB PIIX4 ISA Bridge)
Revision ID : 02h
Base class code : 06h (Bridge Device)
Sub-class code : 80h (Other bridge device)
Programming interface : 00h (Other bridge device)
Command register : 0Fh
--------------------------------------------------------------------------------
I/O space access : enabled
Memory space access : enabled
Bus master : enabled
Special cycles operations : monitor
Memory write and Invalidate : disabled
VGA palette snoop : disabled
Parity error response : disabled
Wait cycle control : disabled
System error line #SERR : enabled
Fast back-to-back transaction : disabled
Device Status Register : 80h
--------------------------------------------------------------------------------
Capable of running at 66MHz : No
UDF supported : No
Fast back-to-back Capable : Yes
Data parity error detected : No
Device select timing : medium
Signalled Target Abort : No
Received Target Abort : No
Received Master Abort : No
Signalled System Error : No
Detected parity error : No
Header Type : 80h (Device, Multiple functions)
Built-In Self-Test : No
Cache Line Size : not specified
Device has no major requirements for the settings
of Latency Timer
IORT - ISA I/O Recovery Timer Register (4Ch,RW,4Dh)
--------------------------------------------------------------------------------
7 0 DMA Reserved Page Register Aliasing Control (DMAAC) -
ISA Master accesses to 90-9Fh I/O range are forwarded to PCI
6 1 8-Bit I/O Recovery Enable - bits [5:3] enabled
5:3 001 8-Bit I/O Recovery times - 1 SYSCLK
2 1 16-Bit I/O Recovery Enable - bits [1:0] enabled
1:0 1 16-Bit I/O Recovery Times - 1 SYSCLK
XBCS - X-Bus Chip Select Register (4E:4Fh,RW,430h)
--------------------------------------------------------------------------------
10 1 Micro Controller Address Location Enable - enabled
9 0 1-Meg Extended BIOS Enable - disabled
8 0 APIC Chip Select - disabled
7 0 Extended BIOS Enable - disabled
6 0 Lower BIOS Enable - disabled
5 1 Coprocessor Error Function Enable - enabled
4 1 IRQ12/M Mouse Function Enable - Mouse
3 0 Port 61h Alias Enable - disabled
2 0 BIOSCS# Write Protect Enable - RO
1 0 KBCCS# Enable - disabled
0 0 RTCCS#/RTCALE Enable - disabled
PIRQRCA - PIRQA Route Control Register (60h,RW,Bh)
--------------------------------------------------------------------------------
7 0 Interrupt Routing Enable - enabled
3:0 1011 PIRQA Routing - IRQ 11
PIRQRCB - PIRQB Route Control Register (61h,RW,80h)
--------------------------------------------------------------------------------
7 1 Interrupt Routing Enable - disabled
PIRQRCC - PIRQC Route Control Register (62h,RW,Bh)
--------------------------------------------------------------------------------
7 0 Interrupt Routing Enable - enabled
3:0 1011 PIRQC Routing - IRQ 11
PIRQRCD - PIRQD Route Control Register (63h,RW,Bh)
--------------------------------------------------------------------------------
7 0 Interrupt Routing Enable - enabled
3:0 1011 PIRQD Routing - IRQ 11
SERIRQC - Serial IRQ Control (64h,RW,92h)
--------------------------------------------------------------------------------
7 1 Serial IRQ Enable - enabled
6 0 Serial IRQ Mode - Quiet
5:2 100 Serial IRQ Frame Size - 21
1:0 10 Start Frame Pulse Width - 8
TOM - Top of Memory Register (69h,RW,F2h)
--------------------------------------------------------------------------------
7:4 1111 Top of Memory - 16 Mbyte
3 0 ISA/DMA Lower BIOS Enable - not forwarded to PCI
2 0 690k-768k Memory Region Enable - not forwarded to PCI
1 1 ISA/DMA 512k-690k Region Enable - forwarded to PCI
MSTAT - Miscellaneous Status Register (6A:6Bh,RW,0h)
--------------------------------------------------------------------------------
15 0 SERR# Generation - 0
7 0 Host-to-PCI Bridge Retry Enable - disabled
MBDMA0 - Motherboard Device DMA Control 0 (76h,RW,Ch)
--------------------------------------------------------------------------------
7 0 Type F and DMA Buffer Enable - disabled
2:0 100 Type F DMA Channel Routing - Disabled
MBDMA1 - Motherboard Device DMA Control 1 (77h,RW,Ch)
--------------------------------------------------------------------------------
7 0 Type F and DMA Buffer Enable - disabled
2:0 100 Type F DMA Channel Routing - Disabled
APICBASE - APIC Base Address Relocation Register (80h,RW,0h)
--------------------------------------------------------------------------------
6 0 A12 Mask - 0
5:2 0 X-Base Address
1:0 0 Y-Base Address - APIC Base : FEC00000h
DLC - Deterministic Latency Control Register (82h,RW,Fh)
--------------------------------------------------------------------------------
3 1 SERR# on delayed transaction timeout - enabled
2 1 USB Passive Release Enable - enabled
1 1 Passive Release Enable - enabled
0 1 Delayed Transactions Enable - enabled
PDMACFG - PCI DMA Configuration (90:91h,RW,0h)
--------------------------------------------------------------------------------
15:14 00 DMA Channel 7 Select - Normal ISA DMA
13:12 00 DMA Channel 6 Select - Normal ISA DMA
11:10 00 DMA Channel 5 Select - Normal ISA DMA
7:6 00 DMA Channel 3 Select - Normal ISA DMA
5:4 00 DMA Channel 2 Select - Normal ISA DMA
3:2 00 DMA Channel 1 Select - Normal ISA DMA
1:0 00 DMA Channel 0 Select - Normal ISA DMA
DDMABP - Distributed DMA Slave Base Pointer Registers (92:95h,RW,8400800h)
--------------------------------------------------------------------------------
31:22 21h Channel 5-7 Base Pointer - address: 0840
15:6 0h Channel 0-3 Base Pointer - address: 0800
GENCFG - General Configuration Register (B0:B3h,RW,F0118706h)
--------------------------------------------------------------------------------
31 1 KBCCS# - GPO26
30 1 RTCALE - GPO25
29 1 RTCCS# - GPO24
28 1 XOE#/XDIR# - GPO22/GPO23
27 0 RI# - RI#
25 0 LID - LID
24 0 BATLOW# - BATLOW#
23 0 THRM# - THRM#
22 0 SUS_STAT2# - SUS_STAT2#
21 0 SUS_STAT1# - SUS_STAT1#
20 1 ZZ - GPO19
19 0 PCI_STP# - PCI_STP#
18 0 CPU_STP# - CPU_STP#
17 0 SUSB#/SUSC# - SUSB#/SUSC#
16 1 SERIRQ - SERIRQ
15 1 SMBALERT# - GPI11
14 0 IRQ8# - GPI6
12 0 Secondary IDE Signal Interface - Enabled
11 0 Primary IDE Signal Interface - Enabled
10 1 PC/PCI REQC/GNTC - REQC/GNTC
9 1 PC/PCI REQB/GNTB - REQB/GNTB
8 1 PC/PCI REQA/GNTA - REQA/GNTA
1 1 Decode configuration - Positive
6 0 PnP Address Decode - disabled
5 0 Alternate Access Mode - disabled
4 0 IDE Secondary Interface - enabled
3 0 CONFIG2 Status - 0
2 1 CONFIG1 Status - Pentium II
1 1 Positive or Subtractive Decode - Positive
0 0 ISA or EIO Select - EIO
RTCCFG - Real Time Clock Configuration (CBh,RW,25h)
--------------------------------------------------------------------------------
5 1 RTC Positive Decode Enable - enabled
4 0 Lock Upper RAM Bytes - disabled
3 0 Lock Lower RAM Bytes - disabled
2 1 Upper RAM Enable - enabled
0 1 RTC Enable - enabled
Dump of PCI Configuration Space
--------------------------------------------------------------------------------
0000: 86 80 10 71 - 0F 01 80 02 "...q...."
0008: 02 00 80 06 - 00 00 80 00 "........"
0010: 00 00 00 00 - 00 00 00 00 "........"
0018: 00 00 00 00 - 00 00 00 00 "........"
0020: 00 00 00 00 - 00 00 00 00 "........"
0028: 00 00 00 00 - 00 00 00 00 "........"
0030: 00 00 00 00 - 00 00 00 00 "........"
0038: 00 00 00 00 - 00 00 00 00 "........"
0040: 00 00 00 00 - 00 00 00 00 "........"
0048: 00 00 00 00 - 4D 00 30 04 "....M.0."
0050: 00 00 00 00 - 00 00 00 00 "........"
0058: 00 00 00 00 - 00 00 00 00 "........"
0060: 0B 80 0B 0B - 92 00 00 00 "........"
0068: 00 F2 00 00 - 00 00 00 00 "........"
0070: 00 00 00 00 - 00 00 0C 0C "........"
0078: 00 00 00 00 - 00 00 00 00 "........"
0080: 00 00 0F 00 - 00 00 00 00 "........"
0088: 00 00 00 00 - 00 00 00 00 "........"
0090: 00 00 00 08 - 40 08 00 00 "....@..."
0098: 00 00 00 00 - 00 00 00 00 "........"
00A0: 00 00 00 00 - 00 00 00 00 "........"
00A8: 00 00 00 00 - 00 00 00 00 "........"
00B0: 06 87 11 F0 - 00 00 00 00 "........"
00B8: 00 00 00 00 - 00 00 00 00 "........"
00C0: 00 00 00 00 - 00 00 00 00 "........"
00C8: 00 00 00 25 - 00 00 00 00 "...%...."
00D0: 00 00 00 00 - 00 00 00 00 "........"
00D8: 00 00 00 00 - 00 00 00 00 "........"
00E0: 00 00 00 00 - 00 00 00 00 "........"
00E8: 00 00 00 00 - 00 00 00 00 "........"
00F0: 00 00 00 00 - 00 00 00 00 "........"
00F8: 30 0F 00 00 - 00 00 00 00 "0......."
|
IDE Controller |
|---|
82371AB/EB PIIX4 EIDE Controller IDE Controller ================================================================================ PCI Device 0:7:1 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 7111h (82371AB/EB PIIX4 EIDE Controller) Revision ID : 01h Base class code : 01h (Mass Storage Controller) Sub-class code : 01h (IDE Controller) Programming interface : 80h (Master IDE Device) Base Address Registers: ----------------------------------------------------- BAR Type Base Size Comments ----------------------------------------------------- 4 I/O 00003C20h 00000010h 16 B. Command register : 05h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : disabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 80h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 00h (Device, Single) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 11 71 - 05 00 80 02 "...q...." 0008: 01 80 01 01 - 00 40 00 00 ".....@.." 0010: 00 00 00 00 - 00 00 00 00 "........" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: 21 3C 00 00 - 00 00 00 00 "!<......" 0028: 00 00 00 00 - 00 00 00 00 "........" 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 00 00 00 00 "........" 0040: 07 A3 07 A3 - 00 00 00 00 "........" 0048: 01 00 02 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 00 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 00 00 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 00 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 00 00 00 - 00 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 30 0F 00 00 - 00 00 00 00 "0......." |
USB |
|---|
82371AB/EB PIIX4 USB Controller UHCI - Universal Host Controller Specification ================================================================================ PCI Device 0:7:2 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 7112h (82371AB/EB PIIX4 USB Controller) Revision ID : 01h Base class code : 0Ch (Serial Bus Controller) Sub-class code : 03h (USB) Programming interface : 00h (UHCI - Universal Host Controller Specification) Base Address Registers: ----------------------------------------------------- BAR Type Base Size Comments ----------------------------------------------------- 4 I/O 00003C00h 00000020h 32 B. Interrupt Pin : INTD# Interrupt Line : IRQ11 Command register : 05h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : disabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 80h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 00h (Device, Single) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 12 71 - 05 00 80 02 "...q...." 0008: 01 00 03 0C - 00 40 00 00 ".....@.." 0010: 00 00 00 00 - 00 00 00 00 "........" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: 01 3C 00 00 - 00 00 00 00 ".<......" 0028: 00 00 00 00 - 00 00 00 00 "........" 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 0B 04 00 00 "........" 0040: 00 00 00 00 - 00 00 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 10 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 00 00 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 00 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 30 00 00 00 - 00 00 00 00 "0......." 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 30 0F 00 00 - 00 00 00 00 "0......." |
Other bridge device |
|---|
82371AB/EB PIIX4 Power Management Controller Other bridge device ================================================================================ PCI Device 0:7:3 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 7113h (82371AB/EB PIIX4 Power Management Controller) Revision ID : 02h Base class code : 06h (Bridge Device) Sub-class code : 80h (Other bridge device) Programming interface : 00h (Other bridge device) Command register : 03h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : enabled Bus master : disabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 80h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 00h (Device, Single) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 13 71 - 03 00 80 02 "...q...." 0008: 02 00 80 06 - 00 00 00 00 "........" 0010: 00 00 00 00 - 00 00 00 00 "........" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: 00 00 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 00 00 00 00 "........" 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 00 00 00 00 "........" 0040: 01 50 00 00 - 00 00 00 F0 ".P......" 0048: DF 08 00 00 - 00 10 00 02 "........" 0050: 00 00 18 00 - FF 03 00 00 "........" 0058: 04 00 00 02 - 00 00 00 B0 "........" 0060: 04 60 21 62 - 00 01 67 F8 ".`!b..g." 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: E0 00 13 00 - F9 00 12 00 "........" 0080: 01 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 01 40 00 00 - 00 00 00 00 ".@......" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 00 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 00 00 00 - 00 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 01 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 30 0F 00 00 - 00 00 00 00 "0......." |
Audio Device |
|---|
ES1978 Maestro Audiodrive
Audio Device
================================================================================
PCI Device 0:8:0 (Hex) (Bus:Device:Function)
Vendor ID : 125Dh (ESS Technology)
Device ID : 1978h (ES1978 Maestro Audiodrive)
Revision ID : 10h
Subsystem Vendor ID : 0E11h (Compaq)
Subsystem Device ID : B112h (info unavailable)
Base class code : 04h (Multimedia Device)
Sub-class code : 01h (Audio Device)
Programming interface : 00h (Audio Device)
Base Address Registers:
-----------------------------------------------------
BAR Type Base Size Comments
-----------------------------------------------------
0 I/O 00003400h 00000100h 256 B.
Interrupt Pin : INTA#
Interrupt Line : IRQ11
Command register : 05h
--------------------------------------------------------------------------------
I/O space access : enabled
Memory space access : disabled
Bus master : enabled
Special cycles operations : ignore
Memory write and Invalidate : disabled
VGA palette snoop : disabled
Parity error response : disabled
Wait cycle control : disabled
System error line #SERR : disabled
Fast back-to-back transaction : disabled
Device Status Register : 90h
--------------------------------------------------------------------------------
Capable of running at 66MHz : No
UDF supported : No
Fast back-to-back Capable : Yes
Data parity error detected : No
Device select timing : medium
Signalled Target Abort : No
Received Target Abort : No
Received Master Abort : No
Signalled System Error : No
Detected parity error : No
New Capabilities Linked List is available
PCI Power Management Interface capability ID found
Header Type : 00h (Device, Single)
Built-In Self-Test : No
Cache Line Size : not specified
Desirable settings for Latency Timer values
MIN_GNT : 500 nanosecs. (*)
MAX_LAT : 6000 nanosecs. (*)
*) MIN_GNT - specify how long a burst period
the device needs assuming a clock
rate of 33 MHz)
MAX_LAT - specify how often the device needs
to gain access to the PCI bus)
PCI configuration space
================================================================================
Legacy Audio Control
--------------------------------------------------------------------------------
Sound Blaster : enabled
FM synthesis : enabled
Game port : enabled
MPU-401 I/O : enabled
MPU-401 IRQ : enabled
I/O address aliasing : enabled (10-bit I/O)
DMA channel : Channel 1
IRQ channel : IRQ5
Serial IRQs : disabled
Legacy audio : disabled
Configuration A
--------------------------------------------------------------------------------
SID and SVID : Read-only
Sound Blaster decode : 22x
MPU-401 decode : 33x
Emulate ISA timing : Off (Use PCI timing)
Posted write : disabled
ISA DMA policy : Distributed DMA
Game port mode : disabled
PIC snoop mode : Reserved
Configuration B
--------------------------------------------------------------------------------
DSP interface/CHI bus : disabled
Hardware volume control : enabled
S\PDIF output : disabled
Clock Devider : Devided by 49
PM control for CLKRUN# : enabled
Clock multiplier mode : 0
Clock input select : External crystal oscillator
Internal clock multiplier : enabled
ACPI Control A
--------------------------------------------------------------------------------
Stop clock control for:
the Wave Processor : D1 state
the game port : D1 state
MIDI : D1 state
Ring Bus\AC-link : D1 state
FM : D1 state
Sound Blaster : D1 state
the ASSP interface : D1 state
GPIO : D1 state
HW volume control : D1 state
the PCI interface : D1 state
GLUE : D1 state
SPDIF : D1 state
the ES978 : D1 state
the 24 MHz clock
to the C24 output : D1 state
the 24 MHz clock to the
secondary CODEC output : D1 state
ACPI Control B
--------------------------------------------------------------------------------
Enable stop clock for:
the Wave Processor : No
the game port : No
MIDI : No
Ring Bus\AC-link : No
FM : No
Sound Blaster : No
the ASSP interface : No
GPIO : No
HW volume control : No
the PCI interface : No
GLUE : No
SPDIF : No
the ES978 : No
the 24 MHz clock
to the C24 output : No
the 24 MHz clock to the
secondary CODEC output : No
User Configuration A
--------------------------------------------------------------------------------
1st PCI*2 arbiter : disabled
Route SPDIF output to : GPIO3(pin 48)
ES978 function : disabled
ES978 hardware
volume control : disabled
Tri-state of output
buffers (except C24) at
D3 state : disabled
Tri-state of C24 output
buffer at D3 state : disabled
Delay of MIDI data
transmit when docked : disabled
Stop clock for C24
output buffer : enabled
2nd PCI*2 arbiter : disabled
ES978 mixer volume
control : enabled
Non-glitch masking on
49.152 MHz clock input : disabled
Select game port : local
Distributed DMA Control
--------------------------------------------------------------------------------
Distributed DMA : disabled
Distributed DMA base
address : 000
Dump of PCI Configuration Space
--------------------------------------------------------------------------------
0000: 5D 12 78 19 - 05 00 90 02 "].x....."
0008: 10 00 01 04 - 00 40 00 00 ".....@.."
0010: 01 34 00 00 - 00 00 00 00 ".4......"
0018: 00 00 00 00 - 00 00 00 00 "........"
0020: 00 00 00 00 - 00 00 00 00 "........"
0028: 00 00 00 00 - 11 0E 12 B1 "........"
0030: 00 00 00 00 - C0 00 00 00 "........"
0038: 00 00 00 00 - 0B 01 02 18 "........"
0040: 7F 90 00 00 - 00 00 00 00 "........"
0048: 00 00 00 00 - 00 00 00 00 "........"
0050: 40 00 C0 8A - 00 00 00 00 "@......."
0058: 00 00 00 00 - 00 00 00 00 "........"
0060: 00 00 00 00 - 00 00 00 00 "........"
0068: 00 00 00 00 - 00 00 00 00 "........"
0070: 00 00 00 00 - 00 00 00 00 "........"
0078: 00 00 00 00 - 00 00 00 00 "........"
0080: 00 00 00 00 - 00 00 00 00 "........"
0088: 00 00 00 00 - 00 00 00 00 "........"
0090: 00 00 00 00 - 00 00 00 00 "........"
0098: 00 00 00 00 - 00 00 00 00 "........"
00A0: 00 00 00 00 - 00 00 00 00 "........"
00A8: 00 00 00 00 - 00 00 00 00 "........"
00B0: 00 00 00 00 - 00 00 00 00 "........"
00B8: 00 00 00 00 - 00 00 00 00 "........"
00C0: 01 00 22 76 - 00 00 00 00 ".."v...."
00C8: 00 00 00 00 - 00 00 00 00 "........"
00D0: 00 00 00 00 - 00 00 00 00 "........"
00D8: 00 00 00 00 - 00 00 00 00 "........"
00E0: 00 00 00 00 - 00 00 00 00 "........"
00E8: 00 00 00 00 - 00 00 00 00 "........"
00F0: 00 00 00 00 - 00 00 00 00 "........"
00F8: 00 00 00 00 - 00 00 00 00 "........"
|
Other communications device |
|---|
LT WinModem 56k
Other communications device
================================================================================
PCI Device 0:9:0 (Hex) (Bus:Device:Function)
Vendor ID : 11C1h (AT&T Microelectronics (Lucent))
Device ID : 0449h (LT WinModem 56k)
Revision ID : 01h
Subsystem Vendor ID : 0E11h (Compaq)
Subsystem Device ID : B14Dh (56k V.90 Modem)
Base class code : 07h (Simple Communication Controller)
Sub-class code : 80h (Other communications device)
Programming interface : 00h (Other communications device)
Base Address Registers:
-----------------------------------------------------
BAR Type Base Size Comments
-----------------------------------------------------
0 Mem 41100000h 00000100h 256 B. 32 bit. Locate anywhere in 32 bit address space
1 I/O 00003C30h 00000008h 8 B.
2 I/O 00003800h 00000100h 256 B.
Interrupt Pin : INTA#
Interrupt Line : IRQ11
Command register : 03h
--------------------------------------------------------------------------------
I/O space access : enabled
Memory space access : enabled
Bus master : disabled
Special cycles operations : ignore
Memory write and Invalidate : disabled
VGA palette snoop : disabled
Parity error response : disabled
Wait cycle control : disabled
System error line #SERR : disabled
Fast back-to-back transaction : disabled
Device Status Register : 90h
--------------------------------------------------------------------------------
Capable of running at 66MHz : No
UDF supported : No
Fast back-to-back Capable : Yes
Data parity error detected : No
Device select timing : medium
Signalled Target Abort : No
Received Target Abort : No
Received Master Abort : No
Signalled System Error : No
Detected parity error : No
New Capabilities Linked List is available
PCI Power Management Interface capability ID found
Header Type : 00h (Device, Single)
Built-In Self-Test : No
Cache Line Size : not specified
Desirable settings for Latency Timer values
MIN_GNT : 63000 nanosecs. (*)
MAX_LAT : 3500 nanosecs. (*)
*) MIN_GNT - specify how long a burst period
the device needs assuming a clock
rate of 33 MHz)
MAX_LAT - specify how often the device needs
to gain access to the PCI bus)
Pointer to CIS : 00000040h
Dump of PCI Configuration Space
--------------------------------------------------------------------------------
0000: C1 11 49 04 - 03 00 90 02 "..I....."
0008: 01 00 80 07 - 00 00 00 00 "........"
0010: 00 00 10 41 - 31 3C 00 00 "...A1<.."
0018: 01 38 00 00 - 00 00 00 00 ".8......"
0020: 00 00 00 00 - 00 00 00 00 "........"
0028: 40 00 00 00 - 11 0E 4D B1 "@.....M."
0030: 00 00 00 00 - F8 00 00 00 "........"
0038: 00 00 00 00 - 0B 01 FC 0E "........"
0040: FF FF FF FF - FF FF FF FF "........"
0048: FF FF FF FF - FF FF FF FF "........"
0050: FF FF FF FF - FF FF FF FF "........"
0058: FF FF FF FF - FF FF FF FF "........"
0060: FF FF FF FF - FF FF FF FF "........"
0068: FF FF FF FF - FF FF FF FF "........"
0070: FF FF FF FF - FF FF FF FF "........"
0078: FF FF FF FF - FF FF FF FF "........"
0080: FF FF FF FF - FF FF FF FF "........"
0088: FF FF FF FF - FF FF FF FF "........"
0090: FF FF FF FF - FF FF FF FF "........"
0098: FF FF FF FF - FF FF FF FF "........"
00A0: FF FF FF FF - FF FF FF FF "........"
00A8: FF FF FF FF - FF FF FF FF "........"
00B0: FF FF FF FF - FF FF FF FF "........"
00B8: FF FF FF FF - FF FF FF FF "........"
00C0: FF FF FF FF - FF FF FF FF "........"
00C8: FF FF FF FF - FF FF FF FF "........"
00D0: FF FF FF FF - FF FF FF FF "........"
00D8: FF FF FF FF - FF FF FF FF "........"
00E0: FF FF FF FF - FF FF FF FF "........"
00E8: FF FF FF FF - FF FF FF FF "........"
00F0: FF FF FF FF - FF FF FF FF "........"
00F8: 01 00 22 E4 - 00 00 00 00 ".."....."
|
PCI Bus 01 |
|---|
PCI Bus 01 |
Platform |
|---|
Compaq ================================================================================ COMPAQ model ID : 053Ch Computer type code: -------------------------------------------------------------------------------- Model byte : FCh Submodel byte : 01h Revision byte : 00h System configuration byte description: -------------------------------------------------------------------------------- Second 8259 (PIC) installed Real-Time clock installed INT 15h (Function 4Fh) called upon INT 09h Extended BIOS area allocated System Parameters Table Dump: 0AD0:0350 -------------------------------------------------------------------------------- 0000: 08 00 FC 01 - 00 74 00 00 ".....t.." |
Network |
|---|
No Network Card Found or Network Card is not Configured |
APM Bios |
|---|
APM Bios ================================================================================ APM BIOS version 1.2 is enabled BIOS Power Management disengaged Real mode API supported via INT 15 32-bit protected mode API supported -------------------------------------------------------------------------------- Physical address of entry point : F000:000021EF Physical data segment : F000 Code segment limit : FFFFh Data segment limit : FFFFh 16-bit protected mode API supported -------------------------------------------------------------------------------- Physical address of entry point : F000:2212 Physical data segment : F000 Code segment limit : FFFFh Data segment limit : FFFFh OEM APM found. OEM identifier : 0090h |
APM Bios Tests Folder |
|---|
Suspend-Resume test |
|---|
Not Tested |
Battery |
|---|
2 Battery Unit(s) Found |
Battery Tests Folder |
|---|
APM Battery Test |
|---|
Not Tested |
Unit 1 |
|---|
AC Line Status : On-Line Battery Status : High Percentage of Full Charge : 100 % Remaining Battery Life : 0:1:48 (h/mm/ss) |
Unit 2 |
|---|
AC Line Status : On-Line Battery Status : Not installed |
CMOS |
|---|
CMOS ================================================================================ Real-time clock settings -------------------------------------------------------------------------------- Date (Y/M/D) : 2002:05:08 Time : 13:21:00 Real-Time clock alarm : not set Memory info -------------------------------------------------------------------------------- Base Memory : 640 KB Extended Memory : 15360 KB Floppy Disk Drive Types : 40h -------------------------------------------------------------------------------- Drive A: : 1.44MB, 3.5" drive Drive B: : No drive Hard Disk Drive Types -------------------------------------------------------------------------------- Hard Disk 1 Type : F0h Hard Disk 2 Type : 00h Equipment byte : 03h -------------------------------------------------------------------------------- Number of Floppy Drives : 1 Primary Video Display : Video card with BIOS ROM Display : disabled Keyboard : disabled FPU Installed : Yes Floppy Drive Installed : Yes Status register A : 26h -------------------------------------------------------------------------------- Divider control. : Normal (32768 Hz) Rate selection : 0.976562 ms (default) Status register B : 02h -------------------------------------------------------------------------------- Cycle update : disabled Periodic interrupt : disabled Alarm interrupt : disabled Update ended interrupt : disabled Square wave output : disabled Daylight savings time : disabled Time and calendar stored as BCD values Hours are stored in 24 hour mode Status register D : 80h -------------------------------------------------------------------------------- RTC Power is : good Diagnostic Status : 00h Shutdown Status : 00h (Vendor specific) Information Flags : F0h (Vendor specific) CMOS Checksum : 06E5h CMOS RAM Raw Table -------------------------------------------------------------------------------- 0000: 00 14 21 43 - 13 23 03 08 "..!C.#.." 0008: 05 02 26 02 - 50 80 00 00 "..&.P..." 0010: 40 F2 F0 00 - 03 80 02 00 "@......." 0018: 3C 01 00 00 - 00 F0 63 30 "<.....c0" 0020: 80 40 00 00 - 00 01 A0 40 ".@.....@" 0028: 00 93 02 45 - 03 00 06 E5 "...E...." 0030: 00 3C 20 F0 - 01 01 00 00 ".< ....." 0038: 00 00 00 00 - 00 00 00 00 "........" 0040: 01 2C 9D FF - 02 02 4B 44 ".,....KD" 0048: 00 10 46 08 - 10 00 FF 01 "..F....." 0050: 1A 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 32 - 00 00 02 00 "...2...." 0060: 00 00 00 00 - 00 78 73 00 ".....xs." 0068: 00 00 00 0F - 00 00 05 12 "........" 0070: 00 06 10 01 - 00 FC 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" |
CMOS Tests Folder |
|---|
CMOS test |
|---|
Not Tested |
Keyboard |
|---|
Enhanced AT keyboard ================================================================================ Keyboard IDs : AB 41 Command Byte : 75h |
Keyboard Tests Folder |
|---|
Diagnostic echo |
|---|
Not Tested |
Keyboard interactive test |
|---|
Not Tested |
PIC |
|---|
PIC Tests Folder |
|---|
PIC base test |
|---|
Not Tested |
PCMCIA |
|---|
PCMCIA Adapter(s) Detected: 1 |
Texas Instruments PCI1211 (CardBus) |
|---|
PC Card Adapter : Texas Instruments PCI1211 (CardBus) Location : PCI Device on Motherboard Socket(s) : 2 I/O Base : 03E0h I/O Size : 0002h |
BIOS |
|---|
BIOS ================================================================================ BIOS Date : 11/30/1999 BIOS Copyright : Copyright COMPAQ Computer Corporation 1982,98-All rights reserv BIOS Sign On : BIOS32 Service Directory found at address F000:A000 -------------------------------------------------------------------------------- Physical Address of BIOS32 Entry Point : 000F0000 Revision Level : 00h Length of Data Structure : 16 bytes |
DMA |
|---|
DMA Tests Folder |
|---|
DMA base test |
|---|
Not Tested |
SMBus |
|---|
SMBus ================================================================================ System Management Bus BIOS Interface is not Installed PIIX4 SMBus Information: -------------------------------------------------------------------------------- Base Address of SMBus I/O Registers : 4000h Revision ID : 0000h Host config : 0001h The SMBus Controller Host Interface : enabled Interrupt Generated By SMBus Controller : SMI# |
SDRAM in bank 0 |
|---|
SERIAL PRESENCE DETECT (SPD) Device Data Found. DIMM Bank Number: 0 Memory Type : SDRAM Error Detect/Correct scheme : None Intel Specification For Frequency : 100 MHz Manufacturer's Identification Code: FF Number of Module Rows : 2 Density of Each Row on Module : 32 MB Module's data width : 64 Number of Banks on SDRAM Device : 4 Total size of SDRAM Device : 64 MB Module's voltage interface : LVTTL (not 5V tolerant) Refresh Period : Normal (15.625 us) Self Refresh : Yes Checksum : 05h (invalid) Acceptable CAS latencies : 2,3 Acceptable CS latencies : 1 Acceptable WE latencies : 1 SDRAM Cycle Time (ns) (Minimum cycle time at the highest CAS Latency) : 10.0 SDRAM Access from Clock (ns) : 6.0 Minimum Row Precharge Time (ns) : 20 Row Active to Row Active Delay(ns): 20 (minimum) Minimum RAS to CAS Delay (ns) : 20 Minimum RAS Pulse Width (ns) : 50 SDRAM Modules Attributes : 00h ----------------------------------------------- Buffered Address and Contol Inputs: No Registered Address and Ctl. Inputs: No On-Card PLL (Clock) : No Buffered DQMB Inputs : No Registered DQMB Inputs : No Differential Clock Input : No Redundant Addressing : No SDRAM Device Attributes : 0Eh ----------------------------------------------- Suport Early RAS Precharge : No Supports Auto-Precharge : Yes Supports Precharge All : Yes Supports Write1/Read Burst : Yes Lower Vcc tolerance : 10 % Upper Vcc tolerance : 10 % Dump of EEPROM Data -------------------------------------------------------------------------------- 0000: 80 08 04 0C - 08 02 40 00 "......@." 0008: 01 A0 60 00 - 80 10 00 01 "..`....." 0010: 8F 04 06 01 - 01 00 0E A0 "........" 0018: 60 00 00 14 - 14 14 32 08 "`.....2." 0020: 20 10 20 10 - 00 00 00 00 " . ....." 0028: 00 00 00 00 - 00 00 00 00 "........" 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 00 00 12 05 "........" 0040: FF FF FF FF - FF FF FF FF "........" 0048: FF FF FF FF - FF FF FF FF "........" 0050: FF FF FF FF - FF FF FF FF "........" 0058: FF FF FF FF - FF FF FF FF "........" 0060: FF FF FF FF - FF FF FF FF "........" 0068: FF FF FF FF - FF FF FF FF "........" 0070: FF FF FF FF - FF FF FF FF "........" 0078: FF FF FF FF - FF FF 64 CF "......d." |
IDE |
|---|
IDE controller(s) found: 1 ================================================================================ 1. 82371AB/EB PIIX4 EIDE Controller |
82371AB/EB PIIX4 EIDE Controller |
|---|
IDE Channel(s) Found: 2 |
Primary IDE Channel |
|---|
Primary IDE Channel ================================================================================ Location : PCI Device on Motherboard First I/O Range : 01F0h - 01F7h Second I/O Range : 03F6h - 03F7h IRQ : 14 Master Device : IBM-DBCA-206480 Slave Device : None |
IBM-DBCA-206480 |
|---|
Hard Disk (Primary Master) ================================================================================ Model : IBM-DBCA-206480 Serial Number : HR0HRMM0637 Firmware revision : BC4OA87F Number of Sectors : 12685680 Cyl./Head/Secs. : 13424/15/63 Size : 6194 Mb (6.19 Gb) General Configuration -------------------------------------------------------------------------------- Hard sectored...............................Yes Soft sectored...............................No Not MFM encoded.............................Yes Head switch time > 15 usec..................Yes Spindle motor control option implemented....No Fixed drive.................................Yes Removable cartridge drive...................No Disk transfer rate <= 5 MBs.................No Disk transfer rate > 5 MBs,but <= 10 Mbs...No Disk transfer rate > 10 MBs.................Yes Rotational speed tolerance is > 0.5%........No Data strobe offset option available.........No Track offset option available...............No Format speed tolerance gap required.........No Non-magnetic drive..........................No Number of cylinders.........................13424 Number of heads.............................15 Number of unformatted bytes per track.......0 Number of unformatted bytes per sector......0 Number of sectors per track.................63 Buffer type.................................dual ported multi-sector with cache Buffer size.................................420 kB Number of ECC bytes available...............4 Number of sectors that can be transferred per interrupt on read/write multiple commands Maximum.....................................16 Current.....................................16 Can perform doubleword IO...................No DMA supported...............................Yes LBA supported...............................Yes PIO data transfer cycle timing mode.........2 DMA data transfer cycle timing mode.........2 Number of Current cylinders.................13424 Number of Current heads.....................15 Number of Current sectors/track.............63 Current capacity in sectors.................12685680 Total number of sectors in LBA mode.........12685680 Single word DMA transfer modes supported....0,1,2 Multiword DMA transfer modes supported......0,1,2 Ultra DMA transfer modes supported..........0,1,2 Ultra DMA transfer mode active..............2 |
Secondary IDE Channel |
|---|
Secondary IDE Channel ================================================================================ Location : PCI Device on Motherboard First I/O Range : 0170h - 0177h Second I/O Range : 0376h - 0377h IRQ : 15 Master Device : CD-224E Slave Device : None |
CD-224E |
|---|
ATAPI Device (Secondary Master) ================================================================================ Model : CD-224E Serial Number : Firmware revision : 9.0B Single word DMA transfer modes supported....0,1,2 Multiword DMA transfer modes supported......0,1,2 Multiword DMA transfer mode active..........2 Peripheral device type .....................CD-ROM Device Removable device............................Yes Command packet DRQ type ....................accelerated (fastest=50 us) Command packet size.........................12 bytes DMA supported.............................. Yes LBA supported.............................. Yes IORDY may be disabled ..................... Yes IORDY supported............................ Yes ATA software reset required (obsolete) .... No Overlap operation supported................ Yes Command queuing supported.................. No Interleaved DMA supported.................. No Typical time until the device performs a bus release: from the receipt of a PACKET command...... 896 us from the receipt of a SERVICE command...... 115 us Inquiry Device Data -------------------------------------------------------------------------------- Peripheral device type..................... CD-ROM Device Removable media ........................... Yes ANSI version............................... 0 ECMA version............................... 0 ISO version................................ 0 ATAPI version.............................. 2 Product identification..................... COMPAQ Vendor identification...................... CD-224E Product revision level..................... 9.0B CD-ROM Capabilities and Mechanical Status Page Data -------------------------------------------------------------------------------- General characteristics: Drive buffer size ......................... 512 KB Maximum Drive Speed (KBytes/second)........ 4234 (~X24 [X=176]) Number of discrete volume levels........... 256 Media Function Capabilities: Read of CD-R disc (Orange Book Part II).... Yes Read of CD-E disc (Orange Book Part III)... No Read of CD-R media written using fixed packet tracks using Addressing Method 2........... No Write of CD-R disc (Orange Book Part II)... No Write of CD-E disc (Orange Book Part III).. No Audio play/overlap operation............... Yes Read sectors in Mode 2 Form 1 (XA) format.. Yes Read sectors in Mode 2 Form 2 format....... Yes Read multiple session of Photo-CD discs.... Yes Red Book audio can be read using READ-CD command ................................... Yes Software commands really lock media into drive...................................... Yes Prevent/Allow jumper present (optional).... No Drive can eject disc using software command.................................... Yes Drive has tray type loading mechanism |
CD-224E Tests Folder |
|---|
Surface Test |
|---|
Not Tested |
Seek Test |
|---|
Not Tested |
ACPI |
|---|
Root System Description Pointer Structure -------------------------------------------------------------------------------- Location : F997:0000H Signature : 'RSD PTR ' Checksum : D6h OEMID : COMPAQ RSDT Address : 03FF4800h |
RSDT |
|---|
Root System Description Table -------------------------------------------------------------------------------- Signature : RSDT Table length : 40 Byte Revision : 01h Checksum : 56h OEM ID : COMPAQ OEM Table ID : RSDTBL OEM Revision : 01 00 00 00 Creator ID : CPQ Creator Revision : 01 00 00 00 Total entries : 1 Entry # 0 : 6B070024H |
FACP |
|---|
Fixed ACPI Description Table -------------------------------------------------------------------------------- Signature : FACP Table length : 116 Byte Revision : 01h Checksum : 8Eh OEM ID : COMPAQ OEM Table ID : CPQB131 OEM Revision : 15 02 01 20 Creator ID : CPQ Creator Revision : 01 00 00 00 FIRMWARE_CTRL : 03FFFE80h DSDT : 03FF48A0h INT_MODEL : 00h (Dual PIC, industry standard PC-AT type) SCI_INT : 0009h SMI_CMD : B200h ACPI_ENABLE : 00h ACPI_DISABLE : 00h S4BIOS_REQ : F1h PM1a_EVT_BLK : 000000F0h PM1b_EVT_BLK : 00000050h PM1a_CNT_BLK : 04000000h PM1b_CNT_BLK : 04000060h PM2_CNT_BLK : 22000050h PM_TMR_BLK : 08000000h GPE0_BLK : 0C000050h GPE1_BLK : 00000050h PM1_EVT_LEN : 00h PM1_CNT_LEN : 04h PM2_CNT_LEN : 02h PM_TM_LEN : 01h GPE0_BLK_LEN : 04h GPE1_BLK_LEN : 04h GPE1_BASE : 00h P_LVL2_LAT : 6400h P_LVL3_LAT : D000h FLUSH_SIZE : 0007h FLUSH_STRIDE : 0000h DUTY_OFFSET : 00h DUTY_WIDTH : 01h DAY_ALRM : 03h MON_ALRM : 0Dh CENTURY : 00h Flags : 0002A500h |
DSDT |
|---|
Differentiated System Description Table
--------------------------------------------------------------------------------
Signature : DSDT
Table length : 27247 Byte
Revision : 01h
Checksum : D1h
OEM ID : COMPAQ
OEM Table ID : ARMADAM3
OEM Revision : 00 00 01 00
Creator ID : MSFT
Creator Revision : 0C 00 00 01
{
Scope(\_SB_) {
Name(C000, Package(0x0C) {
0x4000
0x4000
0x4000
0x4000
0x4000
0x4000
0x4000
0x4000
0x4000
0x4000
0x4000
0x4000
})
Name(C001, Package(0x07){})
Name(C002, Package(0x07){})
Name(C003, 0xFFFFFFFD)
Mutex(C004, 0x00)
Device(C005) {
Name(_HID, *PNP0A03)
Name(_ADR, 0x00)
OperationRegion(C006, 0x02, 0x5A, 0x06)
Field(C006, 0x00) {
C007, 0x30,
}
Name(_PRW, Package(0x02) {
0x0A
0x03
})
Name(_S1D, 0x02)
Name(_S3D, 0x02)
Name(_S4D, 0x03)
Method(C008, 0x00) {
Acquire(C004)
Ones
Ones
If(LEqual(C003, 0xFFFFFFFD)) {
Store(0x00, Local0)
Store(Local0, C003)
Store(Local0, Local2)
Store(C007, Local5)
Store(Null, Local5)
Local0
Zero
Local1
Store(0x000C0000, Local4)
While(LAnd(LNot(LGreater(Local4, 0x000F0000)), LLess(C003, 0x06))) {
If(LEqual(And(Local1, 0x03, Zero), 0x00)) {
If(LEqual(Local2, 0x00)) {
Store(Local4, Index(C001, C003))
Zero
}
Store(0x01, Local2)
}
Else {
If(Local2) {
Subtract(Local4, 0x01, Index(C002, C003))
Zero
Increment(C003)
}
Store(0x00, Local2)
}
If(LLess(Local4, 0x000F0000)) {
Add(Local4, Null, C000)
Local0
Zero
Local4
ShiftRight(Local1, 0x04, Local1)
If(And(Local0, 0x01, Zero)) {
Store(0x01, Local1)
If(LLess(Local4, 0x000F0000)) {
ShiftRight(Local0, 0x01, Local6)
Increment(Local6)
Store(Null, Local5)
Local6
Zero
Local1
}
}
}
Else {
Increment(Local4)
}
Increment(Local0)
}
}
Release(C004)
}
Method(_INI, 0x00) {
C008
}
Name(C009, Buffer(0x6E) {
0x88, 0x0D, 0x00, 0x02, 0x0D, 0x00, 0x00, 0x00,
0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x01,
0x47, 0x01, 0xF8, 0x0C, 0xF8, 0x0C, 0x01, 0x08,
0x88, 0x0D, 0x00, 0x01, 0x0C, 0x03, 0x00, 0x00,
0x00, 0x00, 0xF7, 0x0C, 0x00, 0x00, 0xF8, 0x0C,
0x88, 0x0D, 0x00, 0x01, 0x0C, 0x03, 0x00, 0x00,
0x00, 0x0D, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0xF3,
0x87, 0x17, 0x00, 0x00, 0x0C, 0x03, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0xFF, 0xFF,
0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x02, 0x00, 0x87, 0x17, 0x00, 0x00, 0x0C, 0x03,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
0xFF, 0xFF, 0xF7, 0xFF, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0xF8, 0xFE, 0x79, 0x00, })
Method(C00B, 0x04) {
Store(Arg1, Local2)
Store(Arg3, Local4)
Add(Local4, 0x1A, Local5)
While(LLess(Local4, Local5)) {
Store(Null, C009)
Local4
Zero
Index(Arg0, Local2)
Zero
Increment(Local4)
Increment(Local2)
}
Store(Arg1, Local2)
Add(Local2, 0x0A, Local2)
CreateDWordField(Arg0, Local2, C00C)
Add(Local2, 0x04, Local2)
CreateDWordField(Arg0, Local2, C00D)
Add(Local2, 0x08, Local2)
CreateDWordField(Arg0, Local2, C00E)
Store(Null, C001)
Arg2
Zero
C00C
Store(Null, C002)
Arg2
Zero
C00D
Subtract(C00D, C00C, Local3)
Add(Local3, 0x01, C00E)
Add(Local2, 0x04, Local2)
Return(Local2)
}
Method(C00F, 0x00) {
Acquire(C004)
Ones
Ones
Multiply(C003, 0x1A, Local1)
Add(SizeOf(C009), Local1, Local2)
Store(Buffer(Local2){}, Local0)
Store(0x00, Local1)
Store(0x00, Local2)
While(LLess(Local1, SizeOf(C009))) {
Store(Null, C009)
Local1
Zero
Index(Local0, Local2)
Zero
Increment(Local2)
Increment(Local1)
}
Store(0x00, Local1)
Subtract(Local2, 0x02, Local2)
Subtract(Local2, 0x1A, Local3)
While(LLess(Local1, C003)) {
Store(C00B, Local0)
Local2
Local1
Local3
Local2
Increment(Local1)
}
CreateWordField(Local0, Local2, C010)
Store(0x79, C010)
Release(C004)
Return(Local0)
}
Method(_CRS, 0x00) {
CreateDWordField(C009, 0x5C, C00C)
CreateDWordField(C009, 0x68, C00E)
Store(\_SB_.C011, Local0)
Add(Local0, 0x00100000, Local1)
Store(Local1, C00C)
Subtract(0xFFF7FFFF, Local1, Local1)
Add(Local1, 0x01, C00E)
Store(C00F, Local2)
Return(Local2)
}
Device(C012){}
}
}
OperationRegion(C013, 0x01, 0x5018, 0x02)
Field(C013, 0x00) {
C014, 0x10,
}
OperationRegion(C015, 0x01, 0x5020, 0x02)
Field(C015, 0x00) {
C016, 0x10,
}
OperationRegion(C017, 0x01, 0x5028, 0x04)
Field(C017, 0x00) {
C018, 0x20,
}
OperationRegion(C019, 0x01, 0x5030, 0x04)
Field(C019, 0x01) {
C01A, 0x8,
C01B, 0x8,
C01C, 0x8,
C01D, 0x8,
}
Mutex(\C01E, 0x00)
Name(\C01F, 0x00)
Name(\C020, 0x00)
Method(\C021, 0x00) {
Acquire(\C01E)
Ones
Ones
If(LEqual(\C020, 0x00)) {
Store(C018, Local0)
And(Local0, 0xFFFEFFFE, Local0)
Store(Local0, C018)
}
Increment(\C020)
Release(\C01E)
}
Method(\C022, 0x00) {
Acquire(\C01E)
Ones
Ones
Decrement(\C020)
If(LEqual(\C020, 0x00)) {
Store(C018, Local0)
Or(Local0, 0x00010001, Local0)
Store(Local0, C018)
}
Release(\C01E)
}
Mutex(\C023, 0x00)
Method(\C024, 0x01) {
Acquire(\C023)
Ones
Ones
If(LEqual(Arg0, 0x01)) {
Store(C01A, Local0)
}
Else {
If(LEqual(Arg0, 0x02)) {
Store(C01B, Local0)
}
Else {
If(LEqual(Arg0, 0x03)) {
Store(C01C, Local0)
}
Else {
Store(C01D, Local0)
}
}
}
Release(\C023)
Return(Local0)
}
Scope(\_SB_.C005.C012) {
Name(_ADR, 0x00070000)
Name(C025, 0x00)
Name(C026, 0x00)
Name(C027, 0x00)
Name(C028, 0x00)
Name(C029, 0x00)
Name(C02A, 0x00)
Name(C02B, 0x00)
Name(C02C, 0x00)
Name(C02D, 0x00)
Name(C02E, 0x00)
OperationRegion(C02F, 0x02, 0x60, 0x04)
Field(C02F, 0x00) {
C030, 0x8,
C031, 0x8,
C032, 0x8,
C033, 0x8,
}
OperationRegion(C034, 0x02, 0x90, 0x02)
Field(C034, 0x00) {
C035, 0x10,
}
OperationRegion(C036, 0x02, 0xB0, 0x04)
Field(C036, 0x00) {
C037, 0x8,
C038, 0x8,
C039, 0x8,
C03A, 0x8,
}
OperationRegion(C03B, 0x01, 0xB2, 0x01)
Field(C03B, 0x00) {
C03C, 0x8,
}
OperationRegion(C03D, 0x00, 0x000F8000, 0x02)
Field(C03D, 0x02) {
C03E, 0x10,
}
Method(C03F, 0x00) {
Add(C03E, 0x000F0000, Local0)
Return(Local0)
}
OperationRegion(C040, 0x00, C03F, 0x05)
Field(C040, 0x00) {
C041, 0x8,
C042, 0x8,
C043, 0x8,
C044, 0x8,
C045, 0x8,
}
Method(C046, 0x02) {
Multiply(Arg0, 0x02, Local0)
ShiftLeft(0x03, Local0, Local1)
ShiftLeft(Arg1, Local0, Local2)
Store(C035, Local3)
And(Local3, Not(Local1, Zero), Local3)
Or(Local3, Local2, Local3)
Store(Local3, C035)
}
}
Scope(\_SB_.C005) {
Device(C047) {
Name(_ADR, 0x00070003)
OperationRegion(C048, 0x02, 0x50, 0x28)
Field(C048, 0x00) {
C049, 0x20,
C04A, 0x20,
C04B, 0x20,
C04C, 0x20,
C04D, 0x20,
C04E, 0x20,
C04F, 0x20,
C050, 0x20,
C051, 0x20,
C052, 0x20,
}
Method(C053, 0x01) {
If(LEqual(Arg0, 0x00)) {
Store(C04D, Local0)
Store(0xDFFFFFFF, Local1)
And(Local0, Local1, Local0)
Store(Local0, C04D)
}
If(LEqual(Arg0, 0x03)) {
Store(C04C, Local0)
Store(0x7FFFFFFF, Local1)
And(Local0, Local1, Local0)
Store(Local0, C04C)
}
If(LEqual(Arg0, 0x04)) {
Store(C04E, Local0)
Store(0xF7FFFFFF, Local1)
And(Local0, Local1, Local0)
Store(Local0, C04E)
}
If(LEqual(Arg0, 0x05)) {
Store(C04E, Local0)
Store(0x7FFFFFFF, Local1)
Store(0xFF9FFFFF, Local2)
And(Local1, Local2, Local3)
And(Local0, Local3, Local0)
Store(Local0, C04E)
}
}
Method(C054, 0x03) {
If(LEqual(Arg0, 0x00)) {
Store(C04D, Local0)
And(Local0, 0xEFFFFFFF, Local0)
Or(Local0, 0x20000000, Local1)
If(LEqual(Arg1, 0x0370)) {
Or(Local1, 0x10000000, Local1)
}
Store(Local1, C04D)
}
If(LEqual(Arg0, 0x03)) {
Store(C04D, Local0)
And(Local0, 0xF9FFFFFF, Local0)
If(LEqual(Arg1, 0x0378)) {
Or(Local0, 0x02000000, Local0)
}
Else {
If(LEqual(Arg1, 0x0278)) {
Or(Local0, 0x04000000, Local0)
}
}
Store(Local0, C04D)
Store(C04C, Local1)
Or(Local1, 0x80000000, Local2)
Store(Local2, C04C)
}
If(LEqual(Arg0, 0x04)) {
Store(C04E, Local0)
And(Local0, 0xF8FFFFFF, Local0)
If(LEqual(Arg1, 0x02F8)) {
Or(Local0, 0x01000000, Local0)
}
Else {
If(LEqual(Arg1, 0x02E8)) {
Or(Local0, 0x05000000, Local0)
}
Else {
If(LEqual(Arg1, 0x03E8)) {
Or(Local0, 0x07000000, Local0)
}
}
}
Or(Local0, 0x08000000, Local1)
Store(Local1, C04E)
}
If(LEqual(Arg0, 0x05)) {
Store(C04E, Local0)
And(Local0, 0x8FFFFFFF, Local0)
If(LEqual(Arg1, 0x02F8)) {
Or(Local0, 0x10000000, Local0)
}
Else {
If(LEqual(Arg1, 0x02E8)) {
Or(Local0, 0x50000000, Local0)
}
Else {
If(LEqual(Arg1, 0x03E8)) {
Or(Local0, 0x70000000, Local0)
}
}
}
Or(Local0, 0x80000000, Local0)
And(Local0, 0xFFF0FFFF, Local0)
Or(Local0, 0x00070000, Local0)
And(Local0, 0xFFFF0000, Local0)
Or(Local0, 0x0100, Local0)
If(LEqual(Arg2, 0x0110)) {
Or(Local0, 0x0110, Local0)
}
Else {
If(LEqual(Arg2, 0x0120)) {
Or(Local0, 0x0120, Local0)
}
Else {
If(LEqual(Arg2, 0x0130)) {
Or(Local0, 0x0130, Local0)
}
}
}
Or(Local0, 0x00600000, Local0)
Store(Local0, C04E)
}
}
Method(C055, 0x05) {
\_SB_.C005.C047.C053
Arg0
If(LNot(LEqual(Arg1, 0x00))) {
\_SB_.C005.C047.C054
Arg0
Arg1
Arg2
}
}
}
}
Scope(\_SB_) {
Device(C056) {
Name(_HID, *PNP0C0E)
Name(_PRW, Package(0x02) {
0x0B
0x04
})
Method(_PSW, 0x01) {
Store(Arg0, Local0)
If(LEqual(Local0, 0x01)) {
Store(Enable Sleep button to wake up the system, Debug)
\C057
0xFF
0x02
}
Else {
Store(Disable Sleep button to wake up the system, Debug)
\C057
0x00
0x02
}
}
}
}
Scope(\_SB_.C005.C012) {
Device(C058) {
Name(_HID, *PNP0A06)
OperationRegion(C059, 0x01, 0xE0, 0x02)
Field(C059, 0x01) {
C05A, 0x8,
C05B, 0x8,
}
OperationRegion(C05C, 0x01, 0xE2, 0x02)
Field(C05C, 0x01) {
C05D, 0x8,
C05E, 0x8,
}
IndexField(C05D, C05E, 0x01) {
0x00, 0x410,
C05F, 0x8,
C060, 0x8,
C061, 0x8,
C062, 0x8,
C063, 0x8,
C064, 0x8,
C065, 0x8,
C066, 0x8,
C067, 0x8,
C068, 0x8,
C069, 0x8,
C06A, 0x8,
C06B, 0x8,
C06C, 0x8,
C06D, 0x8,
C06E, 0x8,
0x00, 0x70,
C06F, 0x8,
C070, 0x8,
C071, 0x8,
C072, 0x8,
C073, 0x8,
C074, 0x8,
C075, 0x8,
C076, 0x8,
C077, 0x8,
C078, 0x8,
C079, 0x8,
C07A, 0x8,
C07B, 0x8,
C07C, 0x8,
C07D, 0x8,
C07E, 0x8,
}
OperationRegion(C07F, 0x01, 0xE0, 0x01)
Field(C07F, 0x01) {
C080, 0x8,
}
Mutex(C081, 0x00)
Mutex(C082, 0x00)
Mutex(C083, 0x00)
Mutex(C084, 0x00)
Mutex(C085, 0x00)
Mutex(C086, 0x00)
Name(C087, 0xFFFFFFFD)
Name(C088, 0x00)
Method(_INI, 0x00) {
Acquire(\_GL_)
Ones
Ones
Store(\_SB_.C005.C012.C058.C067, \_SB_.C005.C012.C025)
Store(\_SB_.C005.C012.C058.C069, \_SB_.C005.C012.C026)
Store(\_SB_.C005.C012.C058.C06A, \_SB_.C005.C012.C027)
Store(\_SB_.C005.C012.C058.C07B, \_SB_.C005.C012.C028)
Store(\_SB_.C005.C012.C058.C07C, \_SB_.C005.C012.C029)
Store(\_SB_.C005.C012.C058.C089, \_SB_.C005.C012.C02A)
Store(0x39, \_SB_.C005.C012.C058.C088)
Release(\_GL_)
}
Method(C08A, 0x00) {
Store(0x55, C080)
}
Method(C08B, 0x00) {
Store(0xAA, C080)
}
Method(C08C, 0x01) {
Acquire(^C081)
Ones
Ones
Acquire(\_GL_)
Ones
Ones
^C08A
Store(Arg0, C05A)
Store(C05B, Local0)
^C08B
Release(\_GL_)
Release(^C081)
Return(Local0)
}
Method(C08D, 0x02) {
Acquire(^C081)
Ones
Ones
Acquire(\_GL_)
Ones
Ones
^C08A
Store(Arg0, C05A)
Store(Arg1, C05B)
^C08B
Release(\_GL_)
Release(^C081)
}
Method(C08E, 0x02) {
Acquire(^C081)
Ones
Ones
Acquire(\_GL_)
Ones
Ones
^C08A
Store(0x07, C05A)
Store(Arg0, C05B)
Store(Arg1, C05A)
Store(C05B, Local0)
^C08B
Release(\_GL_)
Release(^C081)
Return(Local0)
}
Method(C08F, 0x03) {
Acquire(^C081)
Ones
Ones
Acquire(\_GL_)
Ones
Ones
^C08A
Store(0x07, C05A)
Store(Arg0, C05B)
Store(Arg1, C05A)
Store(Arg2, C05B)
^C08B
Release(\_GL_)
Release(^C081)
}
Method(C090, 0x02) {
Return(^C08E)
Arg0
Arg1
}
Method(C091, 0x03) {
Return(^C08F)
Arg0
Arg1
Arg2
}
Method(C092, 0x04) {
Store(^C090, Arg0)
Arg1
Local0
And(Arg2, Local0, Local1)
Or(Arg3, Local1, Local2)
^C091
Arg0
Arg1
Local2
}
Method(C089, 0x00) {
Acquire(\_GL_)
Ones
Ones
Store(\_SB_.C005.C012.C058.C069, Local0)
Release(\_GL_)
If(And(Local0, 0x01, Local0)) {
Acquire(\_GL_)
Ones
Ones
Store(\_SB_.C005.C012.C058.C06A, Local0)
Release(\_GL_)
ShiftRight(Local0, 0x04, Local0)
And(Local0, 0x07, Local0)
If(Local0) {
Return(Local0)
}
}
Return(0x00)
}
Method(C093, 0x01) {
^C091
Arg0
0x61
0x00
^C091
Arg0
0x60
0x00
^C091
Arg0
0x63
0x00
^C091
Arg0
0x62
0x00
^C091
Arg0
0x70
0x00
^C091
Arg0
0x74
0x04
^C091
Arg0
0x30
0x00
}
Method(C094, 0x05) {
If(LEqual(Arg3, 0x00)) {
Store(0x00, Local1)
}
Else {
FindSetRightBit(Arg3, Local1)
Decrement(Local1)
}
Store(^C095, Arg4)
Local2
^C091
Arg0
0x61
Arg1
ShiftRight(Arg1, 0x08, Local0)
^C091
Arg0
0x60
Local0
^C091
Arg0
0x63
Arg2
ShiftRight(Arg2, 0x08, Local0)
^C091
Arg0
0x62
Local0
^C092
Arg0
0x70
0xF0
Local1
^C092
Arg0
0x74
0xF0
Local2
}
Method(C095, 0x01) {
Store(0x04, Local0)
If(LNot(LEqual(Arg0, 0x00))) {
FindSetRightBit(Arg0, Local0)
Decrement(Local0)
If(LEqual(Local0, 0x02)) {
Store(0x01, Local0)
}
Else {
If(LEqual(Local0, 0x03)) {
Store(0x00, Local0)
}
Else {
If(LEqual(Local0, 0x05)) {
Store(0x02, Local0)
}
Else {
Store(0x04, Local0)
}
}
}
}
Return(Local0)
}
Method(C096, 0x01) {
Store(0x00, Local1)
If(LNot(LEqual(Arg0, 0x04))) {
If(LEqual(Arg0, 0x00)) {
Store(0x03, Local0)
}
Else {
If(LEqual(Arg0, 0x01)) {
Store(0x02, Local0)
}
Else {
If(LEqual(Arg0, 0x02)) {
Store(0x05, Local0)
}
Else {
Store(0x00, Local0)
}
}
}
ShiftLeft(0x01, Local0, Local1)
}
Store(Local1, Debug)
Return(Local1)
}
Method(C097, 0x05) {
Store(Buffer(0x04){}, Local6)
CreateByteField(Local6, 0x00, C098)
CreateByteField(Local6, 0x01, C099)
CreateByteField(Local6, 0x02, C09A)
CreateByteField(Local6, 0x03, C09B)
Store(Buffer(0x05){}, Local7)
CreateByteField(Local7, 0x00, C09C)
CreateByteField(Local7, 0x01, C09D)
CreateByteField(Local7, 0x02, C09E)
CreateByteField(Local7, 0x03, C09F)
CreateByteField(Local7, 0x04, C0A0)
Acquire(^C083)
Ones
Ones
Acquire(\_GL_)
Ones
Ones
While(LNot(LEqual(0x00, \_SB_.C005.C012.C058.C05F))) {
Stall(0x64)
}
Store(\_SB_.C005.C012.C058.C061, C098)
Store(\_SB_.C005.C012.C058.C062, C099)
Store(\_SB_.C005.C012.C058.C063, C09A)
Store(\_SB_.C005.C012.C058.C064, C09B)
Store(Arg1, \_SB_.C005.C012.C058.C061)
Store(Arg2, \_SB_.C005.C012.C058.C062)
Store(Arg3, \_SB_.C005.C012.C058.C063)
Store(Arg4, \_SB_.C005.C012.C058.C064)
Store(Arg0, \_SB_.C005.C012.C058.C05F)
While(LNot(LEqual(0x00, \_SB_.C005.C012.C058.C05F))) {
Stall(0x64)
}
Store(\_SB_.C005.C012.C058.C061, C09D)
Store(\_SB_.C005.C012.C058.C062, C09E)
Store(\_SB_.C005.C012.C058.C063, C09F)
Store(\_SB_.C005.C012.C058.C064, C0A0)
Store(C098, \_SB_.C005.C012.C058.C061)
Store(C099, \_SB_.C005.C012.C058.C062)
Store(C09A, \_SB_.C005.C012.C058.C063)
Store(C09B, \_SB_.C005.C012.C058.C064)
Release(\_GL_)
Release(^C083)
Return(Local7)
}
Method(C0A1, 0x04) {
Store(Buffer(0x04){}, Local7)
CreateByteField(Local7, 0x00, C0A2)
CreateByteField(Local7, 0x01, C0A3)
CreateByteField(Local7, 0x02, C0A4)
CreateByteField(Local7, 0x03, C0A5)
Acquire(^C084)
Ones
Ones
Acquire(\_GL_)
Ones
Ones
\C021
Store(0x01, \_SB_.C005.C012.C058.C06B)
While(LNot(LEqual(0x00, \_SB_.C005.C012.C058.C06B))) {
Stall(0x64)
}
Store(Arg3, \_SB_.C005.C012.C058.C06E)
Store(Arg2, \_SB_.C005.C012.C058.C06D)
Store(Arg1, \_SB_.C005.C012.C058.C06C)
Store(Arg0, \_SB_.C005.C012.C058.C06B)
While(LNot(LEqual(0x00, \_SB_.C005.C012.C058.C06B))) {
Stall(0x64)
}
Store(\_SB_.C005.C012.C058.C06B, C0A2)
Store(\_SB_.C005.C012.C058.C06C, C0A3)
Store(\_SB_.C005.C012.C058.C06D, C0A4)
Store(\_SB_.C005.C012.C058.C06E, C0A5)
If(LNot(LEqual(Arg0, 0x17))) {
Store(0x02, \_SB_.C005.C012.C058.C06B)
While(LNot(LEqual(0x00, \_SB_.C005.C012.C058.C06B))) {
Stall(0x64)
}
}
Release(\_GL_)
\C022
Release(^C084)
Return(Local7)
}
Method(C0A6, 0x02) {
Store(Buffer(0x04){}, Local6)
CreateByteField(Local6, 0x00, C098)
CreateByteField(Local6, 0x01, C099)
CreateByteField(Local6, 0x02, C09A)
CreateByteField(Local6, 0x03, C09B)
Acquire(^C083)
Ones
Ones
Acquire(\_GL_)
Ones
Ones
Name(C0A7, Package(0x10){})
Store(0x01, Local3)
Store(0x09C4, Local0)
While(LAnd(LNot(LEqual(0x00, \_SB_.C005.C012.C058.C05F)), LGreater(Local0, 0x00))) {
Stall(0x64)
Decrement(Local0)
}
Store(\_SB_.C005.C012.C058.C061, C098)
Store(\_SB_.C005.C012.C058.C062, C099)
Store(\_SB_.C005.C012.C058.C063, C09A)
Store(\_SB_.C005.C012.C058.C064, C09B)
Store(Arg1, \_SB_.C005.C012.C058.C062)
Store(Arg0, \_SB_.C005.C012.C058.C061)
Store(0x00, Local0)
While(LAnd(LEqual(Local0, 0x00), LNot(LGreater(Local3, Arg1)))) {
Store(0x07, \_SB_.C005.C012.C058.C05F)
Store(0x09C4, Local0)
While(LAnd(LNot(LEqual(0x00, \_SB_.C005.C012.C058.C05F)), LGreater(Local0, 0x00))) {
Stall(0x64)
Decrement(Local0)
}
Store(\_SB_.C005.C012.C058.C064, Local0)
Store(Local0, Index(C0A7, 0x00))
Zero
Store(\_SB_.C005.C012.C058.C063, Local2)
Store(Local2, Index(C0A7, Local3))
Zero
Increment(Local3)
}
Store(C098, \_SB_.C005.C012.C058.C061)
Store(C099, \_SB_.C005.C012.C058.C062)
Store(C09A, \_SB_.C005.C012.C058.C063)
Store(C09B, \_SB_.C005.C012.C058.C064)
Release(\_GL_)
Release(^C083)
Return(C0A7)
}
Method(C0A8, 0x03) {
Store(Buffer(0x04){}, Local6)
CreateByteField(Local6, 0x00, C098)
CreateByteField(Local6, 0x01, C099)
CreateByteField(Local6, 0x02, C09A)
CreateByteField(Local6, 0x03, C09B)
Store(0x00, Local1)
Acquire(^C083)
Ones
Ones
Acquire(\_GL_)
Ones
Ones
Store(0x09C4, Local0)
While(LAnd(LNot(LEqual(0x00, \_SB_.C005.C012.C058.C05F)), LGreater(Local0, 0x00))) {
Stall(0x64)
Decrement(Local0)
}
Store(\_SB_.C005.C012.C058.C061, C098)
Store(\_SB_.C005.C012.C058.C062, C099)
Store(\_SB_.C005.C012.C058.C063, C09A)
Store(\_SB_.C005.C012.C058.C064, C09B)
Store(Arg1, \_SB_.C005.C012.C058.C062)
Store(Arg0, \_SB_.C005.C012.C058.C061)
Store(0x00, Local0)
While(LAnd(LEqual(Local0, 0x00), LGreater(Arg1, 0x00))) {
Store(Null, Arg2)
Local1
Zero
Local2
Store(Local2, \_SB_.C005.C012.C058.C063)
Store(0x06, \_SB_.C005.C012.C058.C05F)
Store(0x09C4, Local0)
While(LAnd(LNot(LEqual(0x00, \_SB_.C005.C012.C058.C05F)), LGreater(Local0, 0x00))) {
Stall(0x64)
Decrement(Local0)
}
Store(\_SB_.C005.C012.C058.C064, Local0)
Decrement(Arg1)
Increment(Local1)
}
Store(C098, \_SB_.C005.C012.C058.C061)
Store(C099, \_SB_.C005.C012.C058.C062)
Store(C09A, \_SB_.C005.C012.C058.C063)
Store(C09B, \_SB_.C005.C012.C058.C064)
Release(\_GL_)
Release(^C083)
Return(Local0)
}
Method(C0A9, 0x01) {
Store(\_SB_.C005.C012.C058.C097, 0x1C)
0x01
0x00
0x00
0x00
Local0
Store(Null, Local0)
0x04
Zero
Local1
Store(Arg0, Local2)
While(LAnd(LNot(LEqual(0x00, Local1)), LGreater(Local2, 0x00))) {
Sleep(0x5A)
Store(\_SB_.C005.C012.C058.C097, 0x1C)
0x01
0x00
0x00
0x00
Local0
Store(Null, Local0)
0x04
Zero
Local1
Decrement(Local2)
}
Return(Local1)
}
Method(C0AA, 0x00) {
Store(\_SB_.C005.C012.C058.C097, 0x1C)
0x00
0x00
0x00
0x00
Local0
Store(Null, Local0)
0x04
Zero
Local1
Return(Local1)
}
Method(C0AB, 0x00) {
Store(\_SB_.C005.C012.C058.C0A1, 0x03)
0x00
0x00
0x00
Local0
CreateByteField(Local0, 0x01, C0AC)
CreateByteField(Local0, 0x02, C0AD)
Or(C0AD, 0x08, C0AD)
\_SB_.C005.C012.C058.C0A1
0x04
C0AC
C0AD
0x00
}
Method(C0AE, 0x00) {
Store(\_SB_.C005.C012.C058.C0A1, 0x03)
0x00
0x00
0x00
Local0
CreateByteField(Local0, 0x01, C0AC)
CreateByteField(Local0, 0x02, C0AD)
And(C0AD, 0xFFFFFFF7, C0AD)
\_SB_.C005.C012.C058.C0A1
0x04
C0AC
C0AD
0x00
}
}
}
Scope(\_SB_.C005) {
Device(C0AF) {
Name(_ADR, 0x000C0000)
Name(_EJD, _SB.C005.C0B0)
OperationRegion(C0B1, 0x02, 0x40, 0x02)
Field(C0B1, 0x00) {
C0B2, 0x8,
C0B3, 0x8,
}
Name(_PRW, Package(0x02) {
0x0A
0x03
})
Name(_S1D, 0x03)
Name(_S3D, 0x03)
Name(_S4D, 0x03)
Method(C0B4, 0x0A) {
Store(C0B3, Local0)
Not(Local0, Local0)
If(LEqual(Arg0, 0x02)) {
And(Local0, Arg1, Local0)
Return(Local0)
}
Else {
And(Local0, Not(Arg1, Zero), Local0)
If(Arg0) {
Or(Local0, Arg1, Local0)
}
Store(Local0, C0B3)
}
}
}
}
Processor(\_PR_.C0B5, 0x01, 0x00005010, 0x06){}
Scope(\_SB_) {
Device(C0B6) {
Name(_HID, *PNP0C02)
Name(_UID, 0x00)
Name(C0B7, Package(0x10){})
Name(C0B8, Package(0x10){})
Name(C0B9, Package(0x11){})
Name(C0BA, Package(0x11){})
Name(C0BB, 0xFFFFFFFD)
Mutex(C0BC, 0x00)
OperationRegion(C03D, 0x00, 0x000F802A, 0x02)
Field(C03D, 0x02) {
C0BD, 0x10,
}
Method(C0BE, 0x00) {
Add(C0BD, 0x000F0000, Local0)
Return(Local0)
}
OperationRegion(C0BF, 0x00, C0BE, 0xB0)
Field(C0BF, 0x00) {
C0C0, 0x280,
C0C1, 0x300,
}
Method(C0C2, 0x01) {
OperationRegion(C0C3, 0x00, Arg0, 0x03)
Field(C0C3, 0x01) {
C0C4, 0x10,
C0C5, 0x8,
}
Store(0x00, Local0)
If(LEqual(C0C4, 0xAA55)) {
ShiftLeft(C0C5, 0x09, Local0)
Add(Arg0, Local0, Local0)
Decrement(Local0)
}
Return(Local0)
}
Method(C0C6, 0x04) {
Store(Arg0, Local0)
Store(Arg1, Local3)
Store(0x00, Local4)
Add(Arg3, 0x01, Local7)
Store(0x01, Local1)
While(LAnd(Local1, LNot(LGreater(Local3, 0x10)))) {
Store(Null, Local0)
Add(Local4, Arg3, Zero)
Zero
Local2
Or(ShiftLeft(Null, Local0, Add(Local4, Local7, Zero)), Zero, 0x08)
Zero
Local2
Local1
ShiftLeft(Local1, 0x04, Local1)
If(Local1) {
Store(Local1, Index(C0B7, Local3))
Zero
Store(Null, Local0)
Add(Local4, 0x02, Zero)
Zero
Local5
Add(Local1, ShiftLeft(Local5, 0x09, Zero), Local5)
Decrement(Local5)
Store(Local5, Index(C0B8, Local3))
Zero
Increment(Local3)
Add(Local4, Arg2, Local4)
}
}
Return(Local3)
}
Method(C0C7, 0x00) {
Store(C0C6, C0C0)
0x00
0x05
0x03
Local3
Store(C0C6, C0C1)
Local3
0x06
0x00
Local3
Store(Local3, Local4)
Store(0x00, Local2)
Store(Local2, Local7)
While(LLess(Local2, Local4)) {
Store(0x000FFFFF, Local1)
Store(Local2, Local5)
While(LLess(Local5, Local3)) {
Store(Null, C0B7)
Local5
Zero
Local6
If(LGreater(Local6, Local7)) {
If(LLess(Local6, Local1)) {
Store(Local5, Local0)
Store(Local6, Local1)
}
}
Else {
If(LEqual(Local6, Local7)) {
Decrement(Local4)
}
}
Increment(Local5)
}
If(LGreater(Local0, Local2)) {
Store(Null, C0B8)
Local0
Zero
Local7
Store(Null, C0B7)
Local2
Zero
Index(C0B7, Local0)
Zero
Store(Null, C0B8)
Local2
Zero
Index(C0B8, Local0)
Zero
Store(Local1, Index(C0B7, Local2))
Zero
Store(Local7, Index(C0B8, Local2))
Zero
}
Store(C0C2, Local1)
Local7
If(Local7) {
Store(Local7, Index(C0B8, Local2))
Zero
}
Store(Local1, Local7)
Increment(Local2)
}
Return(Local4)
}
Method(C0C8, 0x01) {
Acquire(C004)
Ones
Ones
Store(0x00, Local0)
Store(Local0, C0BB)
Store(Local0, Local2)
Store(Local0, Local3)
While(LNot(LGreater(Local0, 0x10))) {
Store(Local2, Index(C0B9, Local0))
Zero
Store(Local2, Index(C0BA, Local0))
Zero
Increment(Local0)
}
Store(0x000F0000, Index(C001, C003))
Zero
Store(0x000F0000, Index(C002, C003))
Zero
Store(0x000F0000, Index(C0B7, Arg0))
Zero
Store(0x000F0000, Index(C0B8, Arg0))
Zero
While(LAnd(LNot(LGreater(Local2, Arg0)), LNot(LGreater(Local3, C003)))) {
Store(Null, C001)
Local3
Zero
Local0
Add(Null, C002, Local3)
Zero
0x01
Local1
Store(Null, C0B7)
Local2
Zero
Local4
Add(Null, C0B8, Local2)
Zero
0x01
Local5
Store(Null, C0B9)
C0BB
Zero
Local6
If(LNot(LGreater(Local1, Local4))) {
If(Local6) {
Subtract(Local0, Local6, Index(C0BA, C0BB))
Zero
Increment(C0BB)
}
If(LLess(Local1, Local4)) {
Store(Local1, Index(C0B9, C0BB))
Zero
}
Increment(Local3)
}
Else {
If(Local6) {
Subtract(Local4, Local6, Local7)
If(LGreater(Local7, 0x00)) {
Store(Local7, Index(C0BA, C0BB))
Zero
Increment(C0BB)
}
}
If(LGreater(Local0, Local5)) {
Store(Local5, Index(C0B9, C0BB))
Zero
}
Increment(Local2)
}
}
Release(C004)
}
Method(C0C9, 0x00) {
Acquire(C0BC)
Ones
Ones
If(LEqual(C0BB, 0xFFFFFFFD)) {
\_SB_.C005.C008
Store(C0C7, Local0)
C0C8
Local0
}
Store(C0BB, Local1)
Release(C0BC)
Return(Local1)
}
Method(_INI, 0x00) {
C0C9
}
Method(C00B, 0x03) {
Store(Arg1, Local2)
CreateDWordField(Arg0, Local2, C0CA)
Store(0x0986, C0CA)
Add(Local2, 0x04, Local2)
CreateDWordField(Arg0, Local2, C0CB)
Store(Null, C0B9)
Arg2
Zero
C0CB
Add(Local2, 0x04, Local2)
CreateDWordField(Arg0, Local2, C0CC)
Store(Null, C0BA)
Arg2
Zero
C0CC
Add(Local2, 0x04, Local2)
Return(Local2)
}
Method(C0CD, 0x00) {
Multiply(C0BB, 0x0C, Local1)
Add(SizeOf(C0CE), Local1, Local2)
Store(Buffer(Local2){}, Local0)
Store(0x00, Local1)
Store(Local1, Local2)
While(LLess(Local1, C0BB)) {
Store(C00B, Local0)
Local2
Local1
Local2
Increment(Local1)
}
Store(0x00, Local1)
While(LLess(Local1, SizeOf(C0CE))) {
Store(Null, C0CE)
Local1
Zero
Index(Local0, Local2)
Zero
Increment(Local2)
Increment(Local1)
}
Return(Local0)
}
Name(C0CE, Buffer(0x0E) {
0x86, 0x09, 0x00, 0x0A, 0x00, 0x00, 0xF8, 0xFF,
0x00, 0x00, 0x08, 0x00, 0x79, 0x00, })
Method(_CRS, 0x00) {
Store(C0CE, Local0)
Acquire(C0BC)
Ones
Ones
If(LGreater(C0BB, 0x00)) {
Store(C0CD, Local0)
}
Release(C0BC)
Return(Local0)
}
Method(_STA, 0x00) {
Subtract(SizeOf(C0CE), 0x02, Local0)
Or(C0C9, Local0, Local0)
If(Local0) {
Store(0x0F, Local0)
}
Return(Local0)
}
}
Device(C0CF) {
Name(_HID, *PNP0C01)
Method(_CRS, 0x00) {
Name(C0CE, Buffer(0x26) {
0x86, 0x09, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x0A, 0x00, 0x86, 0x09, 0x00, 0x00,
0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x01, 0x00,
0x86, 0x09, 0x00, 0x01, 0x00, 0x00, 0x10, 0x00,
0x00, 0x00, 0xF0, 0x00, 0x79, 0x00, })
CreateDWordField(C0CE, 0x20, C00E)
Store(\_SB_.C011, C00E)
Return(C0CE)
}
}
}
Scope(\_SB_.C005) {
Device(C0D1) {
Name(_HID, *PNP0C02)
Name(_UID, 0x01)
Name(_CRS, Buffer(0x32) {
0x47, 0x01, 0xD0, 0x04, 0xD0, 0x04, 0x01, 0x02,
0x47, 0x01, 0x00, 0x08, 0x00, 0x08, 0x01, 0x80,
0x47, 0x01, 0x00, 0x40, 0x00, 0x40, 0x01, 0x10,
0x47, 0x01, 0x00, 0x50, 0x00, 0x50, 0x01, 0x64,
0x47, 0x01, 0x04, 0x60, 0x04, 0x60, 0x01, 0x02,
0x47, 0x01, 0x00, 0xF0, 0x00, 0xF0, 0x01, 0xD0,
0x79, 0x00, })
}
}
Scope(\_SB_.C005.C012) {
Device(C0D2) {
Name(_HID, *PNP0C02)
Name(_UID, 0x02)
Method(_CRS, 0x00) {
Name(C0CE, Buffer(0x62) {
0x47, 0x01, 0x10, 0x00, 0x10, 0x00, 0x01, 0x10,
0x47, 0x01, 0x24, 0x00, 0x24, 0x00, 0x01, 0x1A,
0x47, 0x01, 0x50, 0x00, 0x50, 0x00, 0x01, 0x04,
0x47, 0x01, 0x63, 0x00, 0x63, 0x00, 0x01, 0x01,
0x47, 0x01, 0x65, 0x00, 0x65, 0x00, 0x01, 0x01,
0x47, 0x01, 0x67, 0x00, 0x67, 0x00, 0x01, 0x01,
0x47, 0x01, 0x74, 0x00, 0x74, 0x00, 0x01, 0x04,
0x47, 0x01, 0x90, 0x00, 0x90, 0x00, 0x01, 0x02,
0x47, 0x01, 0x92, 0x00, 0x92, 0x00, 0x01, 0x01,
0x47, 0x01, 0x93, 0x00, 0x93, 0x00, 0x01, 0x0D,
0x47, 0x01, 0xA4, 0x00, 0xA4, 0x00, 0x01, 0x1A,
0x47, 0x01, 0xE0, 0x00, 0xE0, 0x00, 0x01, 0x04,
0x79, 0x00, })
Return(C0CE)
}
}
Device(C0D3) {
Name(_HID, *PNP0C04)
Name(_CRS, Buffer(0x0D) {
0x47, 0x01, 0xF0, 0x00, 0xF0, 0x00, 0x01, 0x10,
0x22, 0x00, 0x20, 0x79, 0x00, })
}
Device(C0D4) {
Name(_HID, *PNP0000)
Name(_CRS, Buffer(0x15) {
0x47, 0x01, 0x20, 0x00, 0x20, 0x00, 0x01, 0x02,
0x47, 0x01, 0xA0, 0x00, 0xA0, 0x00, 0x01, 0x02,
0x22, 0x04, 0x00, 0x79, 0x00, })
}
Device(C0D5) {
Name(_HID, *PNP0100)
Name(_CRS, Buffer(0x0D) {
0x47, 0x01, 0x40, 0x00, 0x40, 0x00, 0x01, 0x04,
0x22, 0x01, 0x00, 0x79, 0x00, })
}
Device(C0D6) {
Name(_HID, *PNP0200)
Name(_CRS, Buffer(0x1D) {
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x10,
0x47, 0x01, 0x80, 0x00, 0x80, 0x00, 0x01, 0x10,
0x47, 0x01, 0xC0, 0x00, 0xC0, 0x00, 0x01, 0x20,
0x2A, 0x10, 0x02, 0x79, 0x00, })
}
Device(C0D7) {
Name(_HID, *PNP0800)
Name(_CRS, Buffer(0x0A) {
0x47, 0x01, 0x61, 0x00, 0x61, 0x00, 0x01, 0x01,
0x79, 0x00, })
}
Device(C0D8) {
Name(_HID, *PNP0B00)
Name(_CRS, Buffer(0x15) {
0x47, 0x01, 0x70, 0x00, 0x70, 0x00, 0x01, 0x02,
0x47, 0x01, 0x72, 0x00, 0x72, 0x00, 0x01, 0x02,
0x22, 0x00, 0x01, 0x79, 0x00, })
}
Device(C0D9) {
Name(_HID, *PNP0303)
Name(_CRS, Buffer(0x15) {
0x47, 0x01, 0x60, 0x00, 0x60, 0x00, 0x01, 0x01,
0x47, 0x01, 0x64, 0x00, 0x64, 0x00, 0x01, 0x01,
0x22, 0x02, 0x00, 0x79, 0x00, })
}
Device(C0DA) {
Name(_HID, *PNP0F13)
Name(_CID, 0x0E0FD041)
Name(C0DB, 0x01)
PowerResource(C0DC, al7)
}
Else {
If(LEqual(Arg0, One)) {
Store(Arg1, C0E0)
Store(Arg2, C0E1)
}
Else {
If(LEqual(Arg0, 0x02)) {
Store(Arg1, C0E0)
Store(C0E1, Local0)
And(Local0, Arg3, Local0)
Or(Local0, Arg2, Local0)
Store(Local0, C0E1)
}
Else {
If(LEqual(Arg0, 0x03)) {
Store(0x10, Local0)
Store(Zero, Local1)
While(LNot(LGreater(Local0, 0x2D))) {
Store(Local0, C0E0)
Store(C0E1, Local4)
Add(Local4, Local1, Local1)
Increment(Local0)
}
ShiftRight(Local1, 0x08, Local2)
Store(0x2E, C0E0)
Store(Local2, C0E1)
Store(0x2F, C0E0)
Store(Local1, C0E1)
Store(0x40, Local0)
Store(Zero, Local1)
While(LNot(LGreater(Local0, 0x6D))) {
Store(Local0, C0E0)
Store(C0E1, Local4)
Add(Local4, Local1, Local1)
Increment(Local0)
}
ShiftRight(Local1, 0x08, Local2)
Store(0x6E, C0E0)
Store(Local2, C0E1)
Store(0x6F, C0E0)
Store(Local1, C0E1)
}
}
}
}
Release(C0DD)
Return(Local7)
}
Mutex(\C0E2, 0x00)
Method(\C0E3, 0x04) {
OperationRegion(C0E4, 0x01, 0x72, 0x02)
Field(C0E4, 0x00) {
C0E5, 0x8,
C0E6, 0x8,
}
Store(0x00, Local7)
Acquire(\C0E2)
Ones
Ones
If(LEqual(Arg0, Zero)) {
Store(Arg1, C0E5)
Store(C0E6, Local7)
}
Else {
If(LEqual(Arg0, One)) {
Store(Arg1, C0E5)
Store(Arg2, C0E6)
}
Else {
If(LEqual(Arg0, 0x02)) {
Store(Arg1, C0E5)
Store(C0E6, Local0)
And(Local0, Arg3, Local0)
Or(Local0, Arg2, Local0)
Store(Local0, C0E6)
}
Else {
If(LEqual(Arg0, 0x03)) {
Store(0x10, Local0)
Store(Zero, Local1)
While(LNot(LGreater(Local0, 0x5D))) {
Store(Local0, C0E5)
Store(C0E6, Local4)
Add(Local4, Local1, Local1)
Increment(Local0)
}
ShiftRight(Local1, 0x08, Local2)
Store(0x5E, C0E5)
Store(Local2, C0E6)
Store(0x5F, C0E5)
Store(Local1, C0E6)
}
}
}
}
Release(\C0E2)
Return(Local7)
}
Method(\C057, 0x02) {
Store(\_SB_.C005.C012.C02E, Local1)
Not(Arg1, Local2)
And(Local1, Local2, Local1)
And(Arg0, Arg1, Local2)
Or(Local2, Local1, Local1)
Store(Local1, \_SB_.C005.C012.C02E)
ShiftLeft(Local1, 0x04, Local1)
\C0E3
0x02
0x68
Local1
0x0F
}
Scope(\_SB_) {
Method(C011, 0x00) {
ShiftLeft(\C0E3, 0x00, 0x01)
0x00
0x00
0x18
Local0
ShiftLeft(\C0E3, 0x00, 0x02)
0x00
0x00
0x10
Local1
Or(Local0, Local1, Local0)
ShiftLeft(\C0DE, 0x00, 0x31)
0x00
0x00
0x12
Local1
ShiftLeft(\C0DE, 0x00, 0x30)
0x00
0x00
0x0A
Local2
Or(Local1, Local2, Local1)
Add(Local0, Local1, Local0)
Return(Local0)
}
Method(C0E7, 0x00) {
Store(\_SB_.C011, Local0)
Add(Local0, 0x00100000, Local1)
Subtract(Local1, 0x0100, Local2)
Return(Local2)
}
OperationRegion(C0E8, 0x00, C0E7, 0x0100)
Field(C0E8, 0x00) {
0x00, 0x140,
C0E9, 0x20,
C0EA, 0x20,
C0EB, 0x20,
C0EC, 0x20,
0x00, 0xA0,
C0ED, 0x20,
}
Mutex(C0EE, 0x00)
Method(C0EF, 0x04) {
Acquire(C0EE)
Ones
Ones
Acquire(\_GL_)
Ones
Ones
ShiftLeft(Arg0, 0x10, C0E9)
Store(Arg1, C0EC)
Store(Arg2, C0EA)
Store(Arg3, C0EB)
Store(0x00, C0ED)
While(And(C014, 0x20, Zero)) {
Stall(0x01)
}
Store(Arg0, \_SB_.C005.C012.C03C)
While(LNot(LEqual(And(C014, 0x20, Zero), 0x00))) {
Stall(0x01)
}
Store(C0ED, Local0)
Release(\_GL_)
Release(C0EE)
Return(Local0)
}
Method(C0F0, 0x00) {
Acquire(\_GL_)
Ones
Ones
Store(\_SB_.C005.C012.C058.C069, Local0)
Release(\_GL_)
And(Local0, 0x10, Local0)
Store(ShiftRight(Local0, 0x04, Zero), Local1)
Return(Local1)
}
}
Method(\C0F1, 0x02) {
Store(0x00, Local0)
If(LNot(LEqual(SizeOf(Arg0), SizeOf(Arg1)))) {
Store(0x01, Local0)
Return(Local0)
}
Store(SizeOf(Arg0), Local7)
Name(C0F2, Buffer(Local7){})
Name(C0F3, Buffer(Local7){})
Store(Arg0, C0F2)
Store(Arg1, C0F3)
Store(0x00, Local6)
While(LAnd(LNot(LEqual(Local6, Local7)), LEqual(Local0, 0x00))) {
Store(Null, C0F2)
Local6
Zero
Local2
Store(Null, C0F3)
Local6
Zero
Local3
Increment(Local6)
If(LNot(LEqual(Local2, Local3))) {
Store(0x01, Local0)
}
}
Return(Local0)
}
Method(\C0F4, 0x01) {
Name(C0F5, Package(0x0A) {
0
1
2
3
4
5
6
7
8
9
})
Store(Arg0, Local0)
Store(, Local3)
Store(, Local7)
If(LEqual(Local0, 0x00)) {
Store(0, Local7)
Return(Local7)
}
While(LNot(LEqual(Local0, 0x00))) {
Divide(Local0, 0x0A, Local1, Local0)
Store(Null, C0F5)
Local1
Zero
Local2
Concat(Local2, Local3, Local7)
Store(Local7, Local3)
}
Return(Local7)
}
Method(\C0F6, 0x02) {
Name(C0F5, Package(0x10) {
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
})
Store(Arg0, Local0)
Store(, Local3)
Store(, Local7)
If(LEqual(Local0, 0x00)) {
Store(0, Local7)
Return(Local7)
}
While(LNot(LEqual(Local0, 0x00))) {
Divide(Local0, 0x10, Local1, Local0)
Store(Null, C0F5)
Local1
Zero
Local2
Concat(Local2, Local3, Local7)
Store(Local7, Local3)
}
While(LLess(SizeOf(Local7), Arg1)) {
Concat(0, Local3, Local7)
Store(Local7, Local3)
}
Return(Local7)
}
Scope(\_SB_) {
Device(C0F7) {
Name(_HID, ACPI0003)
Name(_PCL, Package(0x01) {
\_SB_
})
Method(_PSR, 0x00) {
Acquire(\_GL_)
Ones
Ones
Store(\_SB_.C005.C012.C058.C06A, Local0)
Release(\_GL_)
And(Local0, 0x01, Local0)
Return(Local0)
}
}
Method(C0F8, 0x02) {
Name(C0F9, Package(0x0D) {
0x00
0xB3B0
0xB3B0
0x01
0x3840
0x0318
0x01F4
0x01
0x01
Primary Battery
100000
LIon
COMPAQ
})
Store(\_SB_.C005.C012.C058.C097, 0x0A)
Arg0
0x00
0x00
0x00
Local0
Store(ShiftLeft(Null, Local0, 0x01), Zero)
0x08
Zero
Local1
Or(Local1, Null, Local0)
0x02
Zero
Local1
If(LEqual(Local1, 0x00)) {
Store(_SB.BATx._BIF: No Battery but _BIF Called, Debug)
Return(C0F9)
}
Else {
Multiply(Local1, 0x03E8, Local1)
Store(Local1, Index(C0F9, 0x01))
Zero
Store(Local1, Index(C0F9, 0x02))
Zero
}
Store(\_SB_.C005.C012.C058.C0A9, 0x03)
Local1
If(Local1) {
Return(C0F9)
}
\_SB_.C005.C012.C058.C0A8
Arg1
0x01
Package(0x01) {
0x09
}
Store(\_SB_.C005.C012.C058.C0A6, Arg1)
0x06
Local0
\_SB_.C005.C012.C058.C0AA
If(Null) {
Local0
0x00
Zero
Store(_SB.BATx._BST: Get Serial Number ReadI2C Failed!, Debug)
Return(C0F9)
}
Name(C0FA, )
Store(Null, Local0)
0x02
Zero
C0FA
Store(, Local2)
Concat(Local2, C0FA, Local3)
Store(Null, Local0)
0x01
Zero
Local1
Store(\C0F6, Local1)
0x02
Local2
Concat(Local3, Local2, Local4)
Store(ShiftLeft(Null, Local0, 0x04), Zero)
0x08
Zero
Local1
Or(Local1, Null, Local0)
0x03
Zero
Local1
Store(\C0F6, Local1)
0x04
Local2
Concat(Local4, Local2, Local3)
Store(ShiftLeft(Null, Local0, 0x06), Zero)
0x08
Zero
Local1
Or(Local1, Null, Local0)
0x05
Zero
Local1
Store(\C0F6, Local1)
0x04
Local2
Concat(Local3, Local2, Local4)
Store(Local4, Index(C0F9, 0x0A))
Zero
If(LEqual(Arg0, 0x01)) {
Store(Multi-Bay Battery, Index(C0F9, 0x09))
Zero
}
Else {
If(LEqual(Arg0, 0x02)) {
Store(Dock Bay Battery, Index(C0F9, 0x09))
Zero
}
}
Return(C0F9)
}
Method(C0FB, 0x02) {
Name(C0FC, Package(0x04) {
0x00
0x2EE0
0xB3B0
0x3F7A
})
Acquire(\_GL_)
Ones
Ones
Store(\_SB_.C005.C012.C058.C067, Local0)
Store(\_SB_.C005.C012.C058.C077, Local1)
Release(\_GL_)
ShiftLeft(0x01, Arg0, Local2)
If(LEqual(And(Local0, Local2, Zero), 0x00)) {
Store(_SB.BATx._BST: No Battery but BST Called, Debug)
Return(C0FC)
}
Store(0x00, Local6)
Name(C0FD, 0x00)
And(Local1, Local2, Local3)
ShiftLeft(Local2, 0x04, Local2)
And(Local0, Local2, Local4)
And(Local1, Local2, Local5)
If(LNot(LEqual(Local3, 0x00))) {
Or(0x01, Local6, Local6)
Store(0x02, C0FD)
}
If(LNot(LEqual(Local4, 0x00))) {
Or(0x02, Local6, Local6)
Store(0x01, C0FD)
}
If(LNot(LEqual(Local5, 0x00))) {
Or(0x04, Local6, Local6)
}
Store(Local6, Index(C0FC, 0x00))
Zero
Store(\_SB_.C005.C012.C058.C097, 0x0A)
Arg0
0x01
0x00
0x00
Local0
Store(ShiftLeft(Null, Local0, 0x01), Zero)
0x08
Zero
Local1
Or(Local1, Null, Local0)
0x02
Zero
Local1
Multiply(Local1, 0x03E8, Local1)
Store(Local1, Index(C0FC, 0x02))
Zero
If(LEqual(C0FD, 0x00)) {
Store(0x00, Index(C0FC, 0x01))
Zero
}
Else {
Store(\_SB_.C005.C012.C058.C097, 0x0A)
Arg0
0x04
0x00
0x00
Local0
Store(ShiftLeft(Null, Local0, 0x01), Zero)
0x08
Zero
Local1
Or(Local1, Null, Local0)
0x02
Zero
Local1
Store(Local1, Index(C0FC, 0x01))
Zero
}
Store(\_SB_.C005.C012.C058.C097, 0x0A)
Arg0
0x02
0x00
0x00
Local0
Store(ShiftLeft(Null, Local0, 0x01), Zero)
0x08
Zero
Local1
Or(Local1, Null, Local0)
0x02
Zero
Local1
Store(Local1, Index(C0FC, 0x03))
Zero
Return(C0FC)
}
Method(C0FE, 0x01) {
Acquire(\_GL_)
Ones
Ones
Store(\_SB_.C005.C012.C058.C067, Local0)
Release(\_GL_)
And(Local0, Arg0, Local0)
If(Local0) {
Return(0x1F)
}
Else {
Return(0x0F)
}
}
Device(C0FF) {
Name(_HID, *PNP0C0A)
Name(_UID, 0x01)
Method(_STA, 0x00) {
Return(C0FE)
0x01
}
Method(_BIF, 0x00) {
Return(C0F8)
0x00
0x30
}
Method(_BST, 0x00) {
Return(C0FB)
0x00
0x30
}
Method(_PCL, 0x00) {
If(\_SB_.C005.C012.C058.C089) {
Store(Package(0x00){}, Local0)
}
Else {
Store(Package(0x01) {
\_SB_
}, Local0)
}
Return(Local0)
}
}
Device(C100) {
Name(_HID, *PNP0C0A)
Name(_UID, 0x02)
Method(_STA, 0x00) {
Return(C0FE)
0x02
}
Method(_BIF, 0x00) {
Return(C0F8)
0x01
0x32
}
Method(_BST, 0x00) {
Return(C0FB)
0x01
0x32
}
Method(_PCL, 0x00) {
If(\_SB_.C005.C012.C058.C089) {
Store(Package(0x00){}, Local0)
}
Else {
Store(Package(0x01) {
\_SB_
}, Local0)
}
Return(Local0)
}
}
Device(C101) {
Name(_HID, *PNP0C0A)
Name(_UID, 0x03)
Name(_EJD, _SB.C005.C0B0)
Method(_INI, 0x00) {
Store(\_OS_, Local0)
Store(\C0F1, Local0)
Microsoft Windows NT
Local1
If(LEqual(Local1, 0x01)) {
Store(_SB.C005.C102, _EJD)
}
}
Method(_STA, 0x00) {
If(LEqual(\_SB_.C005.C012.C058.C089, 0x05)) {
Return(C0FE)
0x04
}
Else {
Return(0x00)
}
}
Method(_BIF, 0x00) {
Return(C0F8)
0x02
0x34
}
Method(_BST, 0x00) {
Return(C0FB)
0x02
0x34
}
}
Device(C005.C102) {
Name(_HID, 0x1AB1110E)
Name(_STA, 0x00)
Name(_UID, 0x01)
}
}
Scope(\_SB_.C005) {
Device(C103) {
Name(_ADR, 0x00040000)
OperationRegion(C104, 0x02, 0x44, 0x04)
Field(C104, 0x00) {
C105, 0x20,
}
Method(_INI, 0x00) {
Store(0x00, \_SB_.C005.C103.C105)
}
}
}
Scope(\_SB_.C005.C012.C058) {
Device(C106) {
Name(_HID, *PNP0501)
Name(_CID, 0x0005D041)
Name(_DDN, COM1)
Name(_EJD, _SB.C005.C0B0)
Name(C107, Buffer(0x33) {
0x30, 0x47, 0x01, 0xF8, 0x03, 0xF8, 0x03, 0x01,
0x08, 0x22, 0x10, 0x00, 0x30, 0x47, 0x01, 0xF8,
0x02, 0xF8, 0x02, 0x01, 0x08, 0x22, 0x08, 0x00,
0x30, 0x47, 0x01, 0xE8, 0x03, 0xE8, 0x03, 0x01,
0x08, 0x22, 0x10, 0x00, 0x30, 0x47, 0x01, 0xE8,
0x02, 0xE8, 0x02, 0x01, 0x08, 0x22, 0x08, 0x00,
0x38, 0x79, 0x00, })
Method(_STA, 0x00) {
Store(\_SB_.C005.C012.C058.C090, 0x04)
0x61
Local0
Or(Local0, ShiftLeft(\_SB_.C005.C012.C058.C090, 0x04, 0x60), 0x08)
Zero
Local0
If(LEqual(Local0, 0x00)) {
Return(0x0D)
}
Else {
Return(0x0F)
}
}
Method(_DIS, 0x00) {
If(LEqual(0x00, 0x01)) {
Return(0x00)
}
If(LEqual(^_STA, 0x0D)) {
Return(0x00)
}
\_SB_.C005.C047.C055
0x04
0x00
0x00
0x00
0x00
\_SB_.C005.C012.C058.C093
0x04
}
Method(_PRS, 0x00) {
Return(^C107)
}
Method(_SRS, 0x01) {
CreateWordField(Arg0, 0x02, C108)
CreateWordField(Arg0, 0x09, C109)
\_SB_.C005.C047.C055
0x04
C108
0x00
C109
0x00
\_SB_.C005.C012.C058.C094
0x04
C108
0x00
C109
0x00
\_SB_.C005.C012.C058.C091
0x04
0x30
0x01
}
Method(_CRS, 0x00) {
Name(C0CE, Buffer(0x0D) {
0x47, 0x01, 0xF8, 0x03, 0xF8, 0x03, 0x01, 0x08,
0x22, 0x10, 0x00, 0x79, 0x00, })
CreateWordField(C0CE, 0x02, C108)
CreateWordField(C0CE, 0x04, C10A)
CreateByteField(C0CE, 0x07, C10B)
CreateWordField(C0CE, 0x09, C109)
Store(\_SB_.C005.C012.C058.C090, 0x04)
0x30
Local0
If(LEqual(Local0, 0x00)) {
Store(0x00, C108)
Store(0x00, C10A)
Store(0x00, C10B)
Store(0x00, C109)
Return(C0CE)
}
Store(\_SB_.C005.C012.C058.C090, 0x04)
0x61
Local0
Store(\_SB_.C005.C012.C058.C090, 0x04)
0x60
Local1
ShiftLeft(Local1, 0x08, Local1)
Or(Local0, Local1, C108)
Store(C108, C10A)
Store(\_SB_.C005.C012.C058.C090, 0x04)
0x70
Local0
ShiftLeft(0x01, Local0, C109)
Return(C0CE)
}
}
}
Scope(\_SB_.C005.C0AF) {
Device(C10C) {
Name(_ADR, 0x00070000)
Device(C10D) {
Name(_ADR, 0x00)
Device(C10E) {
Name(_ADR, 0x00)
Name(_RMV, 0x01)
}
Device(C10F) {
Name(_ADR, 0x01)
Name(_RMV, 0x01)
}
}
Device(C110) {
Name(_ADR, 0x01)
Device(C111) {
Name(_ADR, 0x00)
Name(_RMV, 0x01)
}
Device(C112) {
Name(_ADR, 0x01)
Name(_RMV, 0x01)
}
}
}
}
Scope(\_SB_.C005.C012.C058) {
Device(C113) {
Name(_HID, *PNP0700)
Device(C114) {
Name(_ADR, 0x00)
Name(_RMV, 0x01)
Name(_EJD, _SB.C005.C0B0)
Method(_STA, 0x00) {
Store(0x00, Local0)
Acquire(\_GL_)
Ones
Ones
Store(\_SB_.C005.C012.C058.C069, Local3)
Store(\_SB_.C005.C012.C058.C07B, Local7)
Release(\_GL_)
If(And(Local3, 0x20, Zero)) {
Store(0x20, Local7)
}
Else {
Store(\C024, 0x03)
Local1
And(Local1, 0x08, Local1)
If(LEqual(Local1, 0x00)) {
Store(0x20, Local7)
}
}
Store(\_SB_.C005.C012.C02A, Local6)
If(LEqual(Local6, 0x00)) {
If(LEqual(Local7, 0x20)) {
Store(0x0F, Local0)
}
}
Else {
If(LOr(LEqual(Local6, 0x01), LEqual(Local6, 0x03))) {
If(And(Local3, 0x20, Zero)) {
Store(0x0F, Local0)
}
Else {
If(LEqual(Local7, 0x20)) {
Store(0x0F, Local0)
}
}
}
If(LEqual(Local6, 0x05)) {
Store(\_SB_.C005.C012.C058.C08E, 0x00)
0xF0
Local1
If(LEqual(And(Local1, 0x10, Zero), 0x00)) {
If(LEqual(Local7, 0x20)) {
Store(0x0F, Local0)
}
Else {
Acquire(\_GL_)
Ones
Ones
Store(\_SB_.C005.C012.C058.C07D, Local3)
Release(\_GL_)
Store(And(Local3, 0x0F, Zero), Local3)
If(LEqual(Local3, 0x02)) {
Store(0x0F, Local0)
}
}
}
Else {
Acquire(\_GL_)
Ones
Ones
Store(\_SB_.C005.C012.C058.C07C, Local2)
Release(\_GL_)
Store(And(Local2, 0x0F, Zero), Local4)
Store(And(Local2, 0xF0, Zero), Local5)
If(LOr(LEqual(Local5, 0x20), LEqual(Local4, 0x02))) {
Store(0x0F, Local0)
}
}
}
}
Return(Local0)
}
Name(_FDI, Package(0x10) {
0x00
0x04
0x4F
0x12
0x01
0xDF
0x02
0x25
0x02
0x12
0x1B
0xFF
0x65
0xF6
0x0F
0x08
})
}
Device(C115) {
Name(_ADR, 0x01)
Name(_RMV, 0x01)
Name(_EJD, _SB.C005.C0B0)
Method(_STA, 0x00) {
Store(0x00, Local0)
If(LEqual(\_SB_.C005.C012.C02A, 0x05)) {
Acquire(\_GL_)
Ones
Ones
Store(\_SB_.C005.C012.C058.C069, Local3)
Store(\_SB_.C005.C012.C058.C07B, Local7)
Release(\_GL_)
And(Local7, 0x0F, Local7)
ShiftLeft(Local7, 0x04, Local7)
Store(\_SB_.C005.C012.C058.C08E, 0x00)
0xF0
Local1
If(LEqual(And(Local1, 0x10, Zero), 0x00)) {
Acquire(\_GL_)
Ones
Ones
Store(\_SB_.C005.C012.C058.C07C, Local2)
Release(\_GL_)
Store(And(Local2, 0x0F, Zero), Local4)
Store(And(Local2, 0xF0, Zero), Local5)
If(LOr(LEqual(Local5, 0x20), LEqual(Local4, 0x02))) {
Store(0x0F, Local0)
}
}
Else {
If(LEqual(Local7, 0x20)) {
Store(0x0F, Local0)
}
Else {
Acquire(\_GL_)
Ones
Ones
Store(\_SB_.C005.C012.C058.C07D, Local3)
Release(\_GL_)
Store(And(Local3, 0x0F, Zero), Local3)
If(LEqual(Local3, 0x02)) {
Store(0x0F, Local0)
}
}
}
}
Return(Local0)
}
Name(_FDI, Package(0x10) {
0x01
0x04
0x4F
0x12
0x01
0xDF
0x02
0x25
0x02
0x12
0x1B
0xFF
0x65
0xF6
0x0F
0x08
})
}
Method(_FDE, 0x00) {
Name(C116, Buffer(0x14) {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x02, 0x00, 0x00, 0x00, })
CreateByteField(C116, 0x00, C117)
CreateByteField(C116, 0x04, C118)
Store(\_SB_.C005.C012.C058.C113.C114._STA, Local0)
Store(\_SB_.C005.C012.C058.C113.C115._STA, Local1)
If(LEqual(Local0, 0x0F)) {
Store(0x01, C117)
}
If(LEqual(Local1, 0x0F)) {
Store(0x01, C118)
}
Return(C116)
}
Name(C107, Buffer(0x18) {
0x47, 0x01, 0xF0, 0x03, 0xF0, 0x03, 0x01, 0x06,
0x47, 0x01, 0xF7, 0x03, 0xF7, 0x03, 0x01, 0x01,
0x22, 0x40, 0x00, 0x2A, 0x0C, 0x00, 0x79, 0x00, })
Method(_STA, 0x00) {
Store(\_SB_.C005.C012.C058.C08E, 0x00)
0x61
Local0
Or(Local0, ShiftLeft(\_SB_.C005.C012.C058.C08E, 0x00, 0x60), 0x08)
Zero
Local0
If(LEqual(Local0, 0x00)) {
Store(0x0D, Local0)
}
Else {
Store(0x0F, Local0)
}
Return(Local0)
}
Method(_DIS, 0x00) {
If(LEqual(^_STA, 0x0D)) {
Return(0x00)
}
\_SB_.C005.C047.C055
0x00
0x00
0x00
0x00
0x00
\_SB_.C005.C012.C058.C093
0x00
}
Method(_PRS, 0x00) {
Return(^C107)
}
Method(_SRS, 0x01) {
CreateWordField(Arg0, 0x02, C108)
CreateWordField(Arg0, 0x0A, C119)
CreateWordField(Arg0, 0x11, C109)
CreateWordField(Arg0, 0x14, C0D6)
\_SB_.C005.C047.C055
0x00
C108
C119
C109
C0D6
\_SB_.C005.C012.C058.C094
0x00
C108
C119
C109
C0D6
\_SB_.C005.C012.C058.C091
0x00
0x30
0x01
}
Method(_CRS, 0x00) {
Name(C0CE, Buffer(0x18) {
0x47, 0x01, 0xF0, 0x03, 0xF0, 0x03, 0x01, 0x06,
0x47, 0x01, 0xF7, 0x03, 0xF7, 0x03, 0x01, 0x01,
0x22, 0x40, 0x00, 0x2A, 0x04, 0x00, 0x79, 0x00, })
CreateWordField(C0CE, 0x02, C108)
CreateWordField(C0CE, 0x04, C10A)
CreateByteField(C0CE, 0x07, C10B)
CreateByteField(C0CE, 0x0A, C119)
CreateByteField(C0CE, 0x0C, C11A)
CreateByteField(C0CE, 0x0F, C11B)
CreateWordField(C0CE, 0x11, C109)
CreateWordField(C0CE, 0x14, C0D6)
Store(\_SB_.C005.C012.C058.C08E, 0x00)
0x30
Local0
If(LEqual(Local0, 0x00)) {
Store(0x00, C108)
Store(0x00, C10A)
Store(0x00, C10B)
Store(0x00, C119)
Store(0x00, C11A)
Store(0x00, C11B)
Store(0x00, C109)
Store(0x00, C0D6)
Return(C0CE)
}
Store(\_SB_.C005.C012.C058.C08E, 0x00)
0x61
Local0
Store(\_SB_.C005.C012.C058.C08E, 0x00)
0x60
Local1
ShiftLeft(Local1, 0x08, Local1)
Or(Local0, Local1, Local0)
Store(Local0, C108)
Store(C108, C10A)
Store(\_SB_.C005.C012.C058.C08E, 0x00)
0x70
Local0
ShiftLeft(0x01, Local0, C109)
Store(\_SB_.C005.C012.C058.C08E, 0x00)
0x74
Local0
Store(\_SB_.C005.C012.C058.C096, Local0)
Local1
Store(Local1, C0D6)
Return(C0CE)
}
}
}
Scope(\_SB_.C005.C012.C058) {
Device(C11C) {
Name(_HID, *SMCF010)
Name(_CID, 0x1105D041)
Name(C11D, 0x01)
PowerResource(C11E, 1, 0x10, 0x08, 0x22,
0xA8, 0x06, 0x2A, 0x20, 0x02, 0x30, 0x47, 0x01,
0xE8, 0x02, 0xE8, 0x02, 0x01, 0x08, 0x47, 0x01,
0x00, 0x01, 0x30, 0x01, 0x10, 0x08, 0x22, 0xA8,
0x06, 0x2A, 0x20, 0x02, 0x30, 0x47, 0x01, 0xE8,
0x03, 0xE8, 0x03, 0x01, 0x08, 0x47, 0x01, 0x00,
0x01, 0x30, 0x01, 0x10, 0x08, 0x22, 0xA8, 0x06,
0x2A, 0x0C, 0x00, 0x30, 0x47, 0x01, 0xE8, 0x02,
0xE8, 0x02, 0x01, 0x08, 0x47, 0x01, 0x00, 0x01,
0x30, 0x01, 0x10, 0x08, 0x22, 0xA8, 0x06, 0x2A,
0x0C, 0x00, 0x30, 0x47, 0x01, 0xF8, 0x03, 0xF8,
0x03, 0x01, 0x08, 0x47, 0x01, 0x00, 0x01, 0x30,
0x01, 0x10, 0x08, 0x22, 0xA8, 0x06, 0x2A, 0x0C,
0x00, 0x30, 0x47, 0x01, 0xF8, 0x02, 0xF8, 0x02,
0x01, 0x08, 0x47, 0x01, 0x00, 0x01, 0x30, 0x01,
0x10, 0x08, 0x22, 0xA8, 0x06, 0x2A, 0x0C, 0x00,
0x38, 0x79, 0x00, })
Method(_STA, 0x00) {
Store(\_SB_.C005.C012.C058.C090, 0x05)
0x61
Local0
Or(Local0, ShiftLeft(\_SB_.C005.C012.C058.C090, 0x05, 0x60), 0x08)
Zero
Local0
If(LEqual(Local0, 0x00)) {
Return(0x0D)
}
Else {
Return(0x0F)
}
}
Method(_DIS, 0x00) {
If(LEqual(^_STA, 0x0D)) {
Return(0x00)
}
\_SB_.C005.C047.C055
0x05
0x00
0x00
0x00
0x00
\_SB_.C005.C012.C058.C093
0x05
}
Method(_PRS, 0x00) {
Return(^C107)
}
Method(_SRS, 0x01) {
CreateWordField(Arg0, 0x02, C108)
CreateWordField(Arg0, 0x0A, C119)
CreateWordField(Arg0, 0x11, C109)
CreateWordField(Arg0, 0x14, C0D6)
\_SB_.C005.C047.C055
0x05
C108
C119
C109
C0D6
\_SB_.C005.C012.C058.C094
0x05
C108
C119
C109
C0D6
\_SB_.C005.C012.C058.C091
0x05
0x30
0x01
}
Method(_CRS, 0x00) {
Name(C0CE, Buffer(0x18) {
0x47, 0x01, 0xE8, 0x03, 0xE8, 0x03, 0x01, 0x08,
0x47, 0x01, 0x00, 0x01, 0x00, 0x01, 0x01, 0x08,
0x22, 0x08, 0x00, 0x2A, 0x20, 0x02, 0x79, 0x00, })
CreateWordField(C0CE, 0x02, C108)
CreateWordField(C0CE, 0x04, C10A)
CreateByteField(C0CE, 0x07, C10B)
CreateWordField(C0CE, 0x0A, C119)
CreateWordField(C0CE, 0x0C, C11A)
CreateByteField(C0CE, 0x0F, C11B)
CreateWordField(C0CE, 0x11, C109)
CreateWordField(C0CE, 0x14, C0D6)
Store(\_SB_.C005.C012.C058.C090, 0x05)
0x30
Local0
If(LEqual(Local0, 0x00)) {
Store(0x00, C108)
Store(0x00, C10A)
Store(0x00, C10B)
Store(0x00, C119)
Store(0x00, C11A)
Store(0x00, C11B)
Store(0x00, C109)
Store(0x00, C0D6)
Return(C0CE)
}
Store(\_SB_.C005.C012.C058.C090, 0x05)
0x61
Local0
Store(\_SB_.C005.C012.C058.C090, 0x05)
0x60
Local1
ShiftLeft(Local1, 0x08, Local1)
Or(Local0, Local1, C108)
Store(C108, C10A)
Store(\_SB_.C005.C012.C058.C090, 0x05)
0x63
Local0
Store(\_SB_.C005.C012.C058.C090, 0x05)
0x62
Local1
ShiftLeft(Local1, 0x08, Local1)
Or(Local0, Local1, C119)
Store(C119, C11A)
Store(\_SB_.C005.C012.C058.C090, 0x05)
0x70
Local0
ShiftLeft(0x01, Local0, C109)
Store(\_SB_.C005.C012.C058.C090, 0x05)
0x74
Local0
Store(\_SB_.C005.C012.C058.C096, Local0)
Local1
Store(Local1, C0D6)
Return(C0CE)
}
}
}
Scope(\_SB_.C005.C012.C058) {
Device(C11F) {
Name(_HID, *PNP0401)
Name(_EJD, _SB.C005.C0B0)
Name(C107, Buffer(0xD4) {
0x31, 0x00, 0x47, 0x01, 0x78, 0x03, 0x78, 0x03,
0x01, 0x08, 0x47, 0x01, 0x78, 0x07, 0x78, 0x07,
0x01, 0x03, 0x22, 0xA0, 0x00, 0x2A, 0x0C, 0x00,
0x31, 0x00, 0x47, 0x01, 0x78, 0x02, 0x78, 0x02,
0x01, 0x08, 0x47, 0x01, 0x78, 0x06, 0x78, 0x06,
0x01, 0x03, 0x22, 0xA0, 0x00, 0x2A, 0x0C, 0x00,
0x30, 0x47, 0x01, 0xBC, 0x03, 0xBC, 0x03, 0x01,
0x04, 0x47, 0x01, 0xBC, 0x07, 0xBC, 0x07, 0x01,
0x03, 0x22, 0xA0, 0x00, 0x2A, 0x0C, 0x00, 0x30,
0x47, 0x01, 0x78, 0x03, 0x78, 0x03, 0x01, 0x08,
0x47, 0x01, 0x78, 0x07, 0x78, 0x07, 0x01, 0x03,
0x22, 0xA0, 0x00, 0x2A, 0x00, 0x00, 0x30, 0x47,
0x01, 0x78, 0x02, 0x78, 0x02, 0x01, 0x08, 0x47,
0x01, 0x78, 0x06, 0x78, 0x06, 0x01, 0x03, 0x22,
0xA0, 0x00, 0x2A, 0x00, 0x00, 0x30, 0x47, 0x01,
0xBC, 0x03, 0xBC, 0x03, 0x01, 0x04, 0x47, 0x01,
0xBC, 0x07, 0xBC, 0x07, 0x01, 0x03, 0x22, 0xA0,
0x00, 0x2A, 0x00, 0x00, 0x30, 0x47, 0x01, 0x78,
0x03, 0x78, 0x03, 0x01, 0x08, 0x47, 0x01, 0x78,
0x07, 0x78, 0x07, 0x01, 0x03, 0x22, 0x00, 0x00,
0x2A, 0x00, 0x00, 0x30, 0x47, 0x01, 0x78, 0x02,
0x78, 0x02, 0x01, 0x08, 0x47, 0x01, 0x78, 0x06,
0x78, 0x06, 0x01, 0x03, 0x22, 0x00, 0x00, 0x2A,
0x00, 0x00, 0x30, 0x47, 0x01, 0xBC, 0x03, 0xBC,
0x03, 0x01, 0x04, 0x47, 0x01, 0xBC, 0x07, 0xBC,
0x07, 0x01, 0x03, 0x22, 0x00, 0x00, 0x2A, 0x00,
0x00, 0x38, 0x79, 0x00, })
Method(_STA, 0x00) {
Store(\_SB_.C005.C012.C058.C090, 0x03)
0x61
Local0
Or(Local0, ShiftLeft(\_SB_.C005.C012.C058.C090, 0x03, 0x60), 0x08)
Zero
Local0
If(LEqual(Local0, 0x00)) {
Return(0x0D)
}
Else {
Return(0x0F)
}
}
Method(_DIS, 0x00) {
If(LEqual(^_STA, 0x0D)) {
Return(0x00)
}
\_SB_.C005.C047.C055
0x03
0x00
0x00
0x00
0x00
\_SB_.C005.C012.C058.C093
0x03
}
Method(_PRS, 0x00) {
Return(^C107)
}
Method(_SRS, 0x01) {
CreateWordField(Arg0, 0x02, C108)
CreateWordField(Arg0, 0x0A, C119)
CreateWordField(Arg0, 0x11, C109)
CreateWordField(Arg0, 0x14, C0D6)
\_SB_.C005.C047.C055
0x03
C108
C119
C109
C0D6
\_SB_.C005.C012.C058.C094
0x03
C108
C119
C109
C0D6
\_SB_.C005.C012.C058.C091
0x03
0x30
0x01
}
Method(_CRS, 0x00) {
Name(C0CE, Buffer(0x18) {
0x47, 0x01, 0x78, 0x03, 0x78, 0x03, 0x01, 0x08,
0x47, 0x01, 0x78, 0x07, 0x78, 0x07, 0x01, 0x03,
0x22, 0x80, 0x00, 0x2A, 0x08, 0x00, 0x79, 0x00, })
CreateWordField(C0CE, 0x02, C108)
CreateWordField(C0CE, 0x04, C10A)
CreateByteField(C0CE, 0x07, C10B)
CreateWordField(C0CE, 0x0A, C119)
CreateWordField(C0CE, 0x0C, C11A)
CreateByteField(C0CE, 0x0F, C11B)
CreateWordField(C0CE, 0x11, C109)
CreateWordField(C0CE, 0x14, C0D6)
Store(\_SB_.C005.C012.C058.C090, 0x03)
0x30
Local0
If(LEqual(Local0, 0x00)) {
Store(0x00, C108)
Store(0x00, C10A)
Store(0x00, C10B)
Store(0x00, C119)
Store(0x00, C11A)
Store(0x00, C11B)
Store(0x00, C109)
Store(0x00, C0D6)
Return(C0CE)
}
Store(\_SB_.C005.C012.C058.C090, 0x03)
0x61
Local0
Store(\_SB_.C005.C012.C058.C090, 0x03)
0x60
Local1
If(LEqual(Local0, 0xBC)) {
Store(0x04, C10B)
}
ShiftLeft(Local1, 0x08, Local1)
Or(Local0, Local1, Local0)
Store(Local0, C108)
Store(Local0, C10A)
Add(Local0, 0x0400, C119)
Store(C119, C11A)
Store(\_SB_.C005.C012.C058.C090, 0x03)
0x70
Local0
ShiftLeft(0x01, Local0, C109)
Store(\_SB_.C005.C012.C058.C090, 0x03)
0x74
Local0
Store(\_SB_.C005.C012.C058.C096, Local0)
Local1
Store(Local1, C0D6)
Return(C0CE)
}
}
}
Scope(\_SB_.C005) {
Device(C120) {
Name(_ADR, 0x00100000)
Name(_EJD, _SB.C005.C0B0)
}
Device(C121) {
Name(_ADR, 0x00100001)
Name(_EJD, _SB.C005.C0B0)
}
Device(C122) {
Name(_ADR, 0x00100002)
Name(_EJD, _SB.C005.C0B0)
}
Device(C123) {
Name(_ADR, 0x00100003)
Name(_EJD, _SB.C005.C0B0)
}
Device(C124) {
Name(_ADR, 0x00100004)
Name(_EJD, _SB.C005.C0B0)
}
Device(C125) {
Name(_ADR, 0x00100005)
Name(_EJD, _SB.C005.C0B0)
}
Device(C126) {
Name(_ADR, 0x00100006)
Name(_EJD, _SB.C005.C0B0)
}
Device(C127) {
Name(_ADR, 0x00100007)
Name(_EJD, _SB.C005.C0B0)
}
Device(C0B0) {
Method(C128, 0x00) {
Acquire(\_GL_)
Ones
Ones
Store(\_SB_.C005.C012.C058.C06A, Local0)
Release(\_GL_)
ShiftRight(Local0, 0x04, Local0)
And(Local0, 0x07, Local0)
Store(0x18B1110E, Local1)
If(LEqual(Local0, 0x03)) {
Store(0x19B1110E, Local1)
}
Else {
If(LEqual(Local0, 0x01)) {
Store(0x1AB1110E, Local1)
}
}
Return(Local1)
}
Method(_HID, 0x00) {
Return(C128)
}
Method(_BDN, 0x00) {
Return(C128)
}
Name(_CID, 0x150CD041)
Method(_UID, 0x00) {
Return(\_SB_.C005.C012.C058.C129)
}
Method(_DCK, 0x01) {
Store(0x01, Local0)
If(LEqual(Arg0, 0x01)) {
Store(\_GPE.C12A, 0x01)
Local0
Store(\_SB_.C005.C012.C058.C089, \_SB_.C005.C012.C02A)
}
Else {
Store(\_SB_.C005.C012.C02A, Local1)
If(LNot(LEqual(Local1, 0x05))) {
Store(\_SB_.C005.C012.C058.C089, Local2)
If(LAnd(LEqual(Local1, 0x01), LEqual(Local2, 0x00))) {
\_GPE.C12A
0x00
Store(\_SB_.C005.C012.C058.C089, \_SB_.C005.C012.C02A)
}
}
}
Return(Local0)
}
Method(_EJ0, 0x01) {
Store(\_SB_.C005.C012.C02A, Local0)
If(LEqual(Local0, 0x05)) {
C12B
}
Else {
If(Local0) {
\_GPE.C12A
0x00
}
}
Store(\_SB_.C005.C012.C058.C089, \_SB_.C005.C012.C02A)
}
Method(C12B, 0x00) {
Store(\_SB_.C0FF._STA, Local4)
Store(\_SB_.C100._STA, Local5)
If(LAnd(LNot(LEqual(Local4, 0x1F)), LNot(LEqual(Local5, 0x1F)))) {
Return(0x00)
}
Store(\_SB_.C005.C012.C058.C097, 0x26)
0x00
0x00
0x00
0x00
Local3
Store(Null, Local3)
0x01
Zero
Local4
Store(Null, Local3)
0x04
Zero
Local5
If(LNot(LEqual(Local5, 0x00))) {
Return(0x00)
}
Else {
If(LEqual(Local4, 0x01)) {
Return(0x00)
}
}
^^C0AF.C0B4
0x01
0x08
\_GPE.C12A
0x00
}
Method(_STA, 0x00) {
If(\_SB_.C005.C012.C02A) {
Return(0x0F)
}
Else {
Return(0x00)
}
}
}
Method(\_SB_.C005.C012.C058.C129, 0x00) {
Acquire(C086)
Ones
Ones
If(LEqual(C089, 0x00)) {
Store(0x00, Local5)
}
Else {
Store(C087, Local5)
Store(\C0E3, 0x00)
0x05
0x00
0x00
Local0
And(Local0, 0x20, Local0)
If(LEqual(Local0, 0x00)) {
Store(0x00, C087)
Release(C086)
Return(0x00)
}
If(LEqual(Local5, 0xFFFFFFFD)) {
Store(0x00, Local6)
Store(0xFF, Local2)
While(LAnd(LLess(Local6, 0x64), LNot(LEqual(Local2, 0x00)))) {
Store(C0A9, 0x03)
Local2
If(LEqual(Local2, 0x00)) {
C0A8
0xA8
0x01
Package(0x01) {
0x18
}
Store(C0A6, 0xA8)
0x08
Local0
Store(Null, Local0)
0x00
Zero
Local2
If(LEqual(Local2, 0x00)) {
C0A8
0xA8
0x01
Package(0x01) {
0x20
}
Store(C0A6, 0xA8)
0x09
Local1
Store(Null, Local1)
0x00
Zero
Local2
}
Store(C0AA, Local3)
Store(LOr(Local2, Local3), Local2)
}
If(Local2) {
Increment(Local6)
Sleep(0x14)
}
}
If(LEqual(Local6, 0x64)) {
Store(0x00, C087)
Release(C086)
Return(0x00)
}
Store(Null, Local0)
0x01
Zero
Local2
Store(Null, Local0)
0x02
Zero
Local3
If(LAnd(LEqual(Local2, 0xFF), LEqual(Local3, 0xFF))) {
Store(0x00, Local5)
}
Else {
Store(0x01, Local6)
Store(0x01, Local2)
Store(0x00, Local3)
Store(0x01, Local7)
While(LAnd(LNot(LGreater(Local2, 0x08)), LNot(LEqual(Local7, 0x00)))) {
Store(Null, Local0)
Local2
Zero
Local7
Add(Local3, Local7, Local3)
Increment(Local2)
}
Subtract(Local2, 0x01, Local4)
If(LNot(LEqual(Local7, 0x00))) {
Store(0x01, Local2)
While(LAnd(LNot(LGreater(Local2, 0x08)), LNot(LEqual(Local7, 0x00)))) {
Store(Null, Local1)
Local2
Zero
Local7
Add(Local3, Local7, Local3)
Increment(Local2)
}
If(LEqual(Local7, 0x00)) {
Decrement(Local2)
}
Decrement(Local2)
Add(Local4, Local2, Local4)
}
Add(Local3, Local4, Local3)
And(Local3, 0xFF, Local3)
If(LNot(LEqual(Local3, Null))) {
Local1
0x09
Zero
Store(0x00, Local6)
Store(0x00, Local5)
}
If(LEqual(Local6, 0x01)) {
Store(Null, Local0)
0x06
Zero
Local5
ShiftLeft(Local5, 0x04, Local5)
Store(Null, Local0)
0x03
Zero
Local6
Subtract(Local6, 0x30, Local6)
And(Local6, 0x0F, Local6)
Or(Local5, Local6, Local5)
ShiftLeft(Local5, 0x04, Local5)
Store(Null, Local0)
0x04
Zero
Local6
Subtract(Local6, 0x30, Local6)
And(Local6, 0x0F, Local6)
Or(Local5, Local6, Local5)
ShiftLeft(Local5, 0x04, Local5)
Store(Null, Local0)
0x02
Zero
Local6
Subtract(Local6, 0x30, Local6)
And(Local6, 0x0F, Local6)
Or(Local5, Local6, Local5)
ShiftLeft(Local5, 0x04, Local5)
Store(Null, Local1)
0x04
Zero
Local6
Subtract(Local6, 0x30, Local6)
And(Local6, 0x0F, Local6)
Or(Local5, Local6, Local5)
ShiftLeft(Local5, 0x04, Local5)
Store(Null, Local1)
0x02
Zero
Local6
Subtract(Local6, 0x30, Local6)
And(Local6, 0x0F, Local6)
Or(Local5, Local6, Local5)
ShiftLeft(Local5, 0x04, Local5)
Store(Null, Local1)
0x03
Zero
Local6
Subtract(Local6, 0x30, Local6)
And(Local6, 0x0F, Local6)
Or(Local5, Local6, Local5)
}
}
}
}
Store(Local5, C087)
Release(C086)
Return(Local5)
}
}
Scope(\_SB_.C005) {
Device(C12C) {
Name(_ADR, 0x00070001)
Device(C12D) {
Name(_ADR, 0x00)
Device(C12E) {
Name(_ADR, 0x00)
}
}
Device(C12F) {
Name(_ADR, 0x01)
Device(C130) {
Name(_ADR, 0x00)
Name(_RMV, 0x01)
}
}
}
Device(C131) {
Name(_ADR, 0x00140001)
Name(_EJD, _SB.C005.C0B0)
Device(C132) {
Name(_ADR, 0x00)
Device(C133) {
Name(_ADR, 0x00)
}
Device(C134) {
Name(_ADR, 0x01)
}
}
Device(C135) {
Name(_ADR, 0x01)
Device(C136) {
Name(_ADR, 0x00)
}
Device(C137) {
Name(_ADR, 0x01)
}
}
}
}
Device(\_SB_.C138) {
Name(_HID, *PNP0C0F)
Name(_UID, 0x60)
Name(_PRS, Buffer(0x06) {0x23, 0x00, 0x08, 0x18, 0x79, 0x00, })
Method(_STA, 0x00) {
Store(\_SB_.C005.C012.C030, Local0)
And(Local0, 0x80, Local0)
If(LEqual(Local0, 0x00)) {
Store(0x0B, Local0)
}
Else {
Store(0x09, Local0)
}
Return(Local0)
}
Method(_DIS, 0x00) {
Store(\_SB_.C005.C012.C030, Local0)
And(Local0, 0xF0, Local0)
Or(Local0, 0x80, Local0)
Store(Local0, \_SB_.C005.C012.C030)
}
Method(_SRS, 0x01) {
CreateByteField(Arg0, 0x02, C139)
Store(C139, Local2)
FindSetLeftBit(Local2, Local0)
If(LEqual(Local0, 0x00)) {
CreateByteField(Arg0, 0x01, C13A)
Store(C13A, Local1)
FindSetLeftBit(Local1, Local0)
Subtract(Local0, 0x01, Local3)
}
Else {
Subtract(Local0, 0x01, Local3)
Add(Local3, 0x08, Local3)
}
Store(Local3, \_SB_.C005.C012.C030)
}
Method(_CRS, 0x00) {
Name(C13B, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateByteField(C13B, 0x01, C13C)
CreateByteField(C13B, 0x02, C13D)
Store(0x00, Local3)
Store(0x00, Local4)
Store(\_SB_.C005.C012.C030, Local0)
And(Local0, 0x8F, Local0)
If(LLess(Local0, 0x80)) {
And(Local0, 0x0F, Local0)
If(LGreater(Local0, 0x07)) {
Subtract(Local0, 0x08, Local2)
ShiftLeft(0x01, Local2, Local4)
}
Else {
ShiftLeft(0x01, Local0, Local3)
}
}
Store(Local3, C13C)
Store(Local4, C13D)
Return(C13B)
}
}
Device(\_SB_.C13E) {
Name(_HID, *PNP0C0F)
Name(_UID, 0x61)
Name(_PRS, Buffer(0x06) {0x23, 0x00, 0x08, 0x18, 0x79, 0x00, })
Method(_STA, 0x00) {
Store(\_SB_.C005.C012.C031, Local0)
And(Local0, 0x80, Local0)
If(LEqual(Local0, 0x00)) {
Store(0x0B, Local0)
}
Else {
Store(0x09, Local0)
}
Return(Local0)
}
Method(_DIS, 0x00) {
Store(\_SB_.C005.C012.C031, Local0)
And(Local0, 0xF0, Local0)
Or(Local0, 0x80, Local0)
Store(Local0, \_SB_.C005.C012.C031)
}
Method(_SRS, 0x01) {
Store(0x0B, \_SB_.C005.C012.C031)
}
Method(_CRS, 0x00) {
Name(C13B, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateByteField(C13B, 0x01, C13C)
CreateByteField(C13B, 0x02, C13D)
Store(0x00, Local3)
Store(0x00, Local4)
Store(\_SB_.C005.C012.C031, Local0)
And(Local0, 0x8F, Local0)
If(LLess(Local0, 0x80)) {
And(Local0, 0x0F, Local0)
If(LGreater(Local0, 0x07)) {
Subtract(Local0, 0x08, Local2)
ShiftLeft(0x01, Local2, Local4)
}
Else {
ShiftLeft(0x01, Local0, Local3)
}
}
Store(Local3, C13C)
Store(Local4, C13D)
Return(C13B)
}
}
Device(\_SB_.C13F) {
Name(_HID, *PNP0C0F)
Name(_UID, 0x62)
Name(_PRS, Buffer(0x06) {0x23, 0x00, 0x08, 0x18, 0x79, 0x00, })
Method(_STA, 0x00) {
Store(\_SB_.C005.C012.C032, Local0)
And(Local0, 0x80, Local0)
If(LEqual(Local0, 0x00)) {
Store(0x0B, Local0)
}
Else {
Store(0x09, Local0)
}
Return(Local0)
}
Method(_DIS, 0x00) {
Store(\_SB_.C005.C012.C032, Local0)
And(Local0, 0xF0, Local0)
Or(Local0, 0x80, Local0)
Store(Local0, \_SB_.C005.C012.C032)
}
Method(_SRS, 0x01) {
CreateByteField(Arg0, 0x02, C139)
Store(C139, Local2)
FindSetLeftBit(Local2, Local0)
If(LEqual(Local0, 0x00)) {
CreateByteField(Arg0, 0x01, C13A)
Store(C13A, Local1)
FindSetLeftBit(Local1, Local0)
Subtract(Local0, 0x01, Local3)
}
Else {
Subtract(Local0, 0x01, Local3)
Add(Local3, 0x08, Local3)
}
Store(Local3, \_SB_.C005.C012.C032)
}
Method(_CRS, 0x00) {
Name(C13B, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateByteField(C13B, 0x01, C13C)
CreateByteField(C13B, 0x02, C13D)
Store(0x00, Local3)
Store(0x00, Local4)
Store(\_SB_.C005.C012.C032, Local0)
And(Local0, 0x8F, Local0)
If(LLess(Local0, 0x80)) {
And(Local0, 0x0F, Local0)
If(LGreater(Local0, 0x07)) {
Subtract(Local0, 0x08, Local2)
ShiftLeft(0x01, Local2, Local4)
}
Else {
ShiftLeft(0x01, Local0, Local3)
}
}
Store(Local3, C13C)
Store(Local4, C13D)
Return(C13B)
}
}
Device(\_SB_.C140) {
Name(_HID, *PNP0C0F)
Name(_UID, 0x63)
Name(_PRS, Buffer(0x06) {0x23, 0x00, 0x08, 0x18, 0x79, 0x00, })
Method(_STA, 0x00) {
Store(\_SB_.C005.C012.C033, Local0)
And(Local0, 0x80, Local0)
If(LEqual(Local0, 0x00)) {
Store(0x0B, Local0)
}
Else {
Store(0x09, Local0)
}
Return(Local0)
}
Method(_DIS, 0x00) {
Store(\_SB_.C005.C012.C033, Local0)
And(Local0, 0xF0, Local0)
Or(Local0, 0x80, Local0)
Store(Local0, \_SB_.C005.C012.C033)
}
Method(_SRS, 0x01) {
CreateByteField(Arg0, 0x02, C139)
Store(C139, Local2)
FindSetLeftBit(Local2, Local0)
If(LEqual(Local0, 0x00)) {
CreateByteField(Arg0, 0x01, C13A)
Store(C13A, Local1)
FindSetLeftBit(Local1, Local0)
Subtract(Local0, 0x01, Local3)
}
Else {
Subtract(Local0, 0x01, Local3)
Add(Local3, 0x08, Local3)
}
Store(Local3, \_SB_.C005.C012.C033)
}
Method(_CRS, 0x00) {
Name(C13B, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateByteField(C13B, 0x01, C13C)
CreateByteField(C13B, 0x02, C13D)
Store(0x00, Local3)
Store(0x00, Local4)
Store(\_SB_.C005.C012.C033, Local0)
And(Local0, 0x8F, Local0)
If(LLess(Local0, 0x80)) {
And(Local0, 0x0F, Local0)
If(LGreater(Local0, 0x07)) {
Subtract(Local0, 0x08, Local2)
ShiftLeft(0x01, Local2, Local4)
}
Else {
ShiftLeft(0x01, Local0, Local3)
}
}
Store(Local3, C13C)
Store(Local4, C13D)
Return(C13B)
}
}
Name(\_SB_.C005._PRT, Package(0x0A) {
Package(0x04) {
0x0005FFFF
0x00
\_SB_.C138
0x00
}
Package(0x04) {
0x0004FFFF
0x00
\_SB_.C138
0x00
}
Package(0x04) {
0x0007FFFF
0x03
\_SB_.C140
0x00
}
Package(0x04) {
0x0008FFFF
0x00
\_SB_.C13F
0x00
}
Package(0x04) {
0x0009FFFF
0x00
\_SB_.C13F
0x00
}
Package(0x04) {
0x0009FFFF
0x01
\_SB_.C140
0x00
}
Package(0x04) {
0x0010FFFF
0x00
\_SB_.C138
0x00
}
Package(0x04) {
0x0010FFFF
0x01
\_SB_.C13E
0x00
}
Package(0x04) {
0x0010FFFF
0x02
\_SB_.C13F
0x00
}
Package(0x04) {
0x0010FFFF
0x03
\_SB_.C140
0x00
}
})
Name(\_SB_.C005.C0AF._PRT, Package(0x0D) {
Package(0x04) {
0x0007FFFF
0x00
\_SB_.C138
0x00
}
Package(0x04) {
0x0008FFFF
0x00
\_SB_.C138
0x00
}
Package(0x04) {
0x0008FFFF
0x01
\_SB_.C13E
0x00
}
Package(0x04) {
0x0008FFFF
0x02
\_SB_.C13F
0x00
}
Package(0x04) {
0x0008FFFF
0x03
\_SB_.C140
0x00
}
Package(0x04) {
0x0009FFFF
0x00
\_SB_.C13E
0x00
}
Package(0x04) {
0x0009FFFF
0x01
\_SB_.C13F
0x00
}
Package(0x04) {
0x0009FFFF
0x02
\_SB_.C140
0x00
}
Package(0x04) {
0x0009FFFF
0x03
\_SB_.C138
0x00
}
Package(0x04) {
0x000AFFFF
0x00
\_SB_.C13F
0x00
}
Package(0x04) {
0x000AFFFF
0x01
\_SB_.C140
0x00
}
Package(0x04) {
0x000AFFFF
0x02
\_SB_.C138
0x00
}
Package(0x04) {
0x000AFFFF
0x03
\_SB_.C13E
0x00
}
})
Name(\_S0_, Package(0x04) {
0x05
0x05
0x05
0x05
})
Name(\_S1_, Package(0x04) {
0x07
0x07
0x07
0x07
})
Name(\_S3_, Package(0x04) {
0x01
0x01
0x01
0x01
})
Name(\_S4_, Package(0x04) {
0x00
0x00
0x00
0x00
})
Name(\_S5_, Package(0x04) {
0x00
0x00
0x00
0x00
})
Method(\_PTS, 0x01) {
Store(_PTS: Enter, Debug)
Store(Arg0, Debug)
If(LOr(LEqual(Arg0, 0x01), LEqual(Arg0, 0x03))) {
Store(Going into Suspend to RAM State, Debug)
}
If(LEqual(Arg0, 0x04)) {
Store(Going into Suspend to Disk State, Debug)
\C0DE
0x02
0x71
0x01
0xFE
\C0DE
0x03
0x00
0x00
0x00
}
If(LEqual(Arg0, 0x05)) {
Store(Going into SOFTOFF State, Debug)
\C0DE
0x02
0x71
0x00
0xFE
\C0DE
0x03
0x00
0x00
0x00
}
Store(_PTS: Exit, Debug)
}
Method(\_WAK, 0x01) {
Store(_WAK: Enter, Debug)
Store(Arg0, Debug)
Store(0x00, \_SB_.C005.C012.C02E)
\C0E3
0x02
0x68
0x00
0x0F
If(LEqual(Arg0, 0x04)) {
Store(\_SB_.C005.C012.C058.C0A1, 0x03)
0x00
0x00
0x00
Local0
Store(Null, Local0)
0x01
Zero
Local1
Store(Null, Local0)
0x02
Zero
Local2
Or(Local1, 0x20, Local1)
\_SB_.C005.C012.C058.C0A1
0x04
Local1
Local2
0x00
}
Store(\_OS_, Local0)
Store(\C0F1, Local0)
Microsoft Windows
Local1
If(LEqual(Local1, 0x00)) {
Notify(\_SB_.C056, 0x02)
}
Notify(\_SB_.C005.C12C.C12F.C130, 0x00)
Notify(\_SB_.C005.C141, 0x00)
Store(\_SB_.C005.C012.C058.C089, Local0)
If(LEqual(Local0, 0x05)) {
Notify(\_SB_.C005.C0AF.C10C.C10D.C10E, 0x00)
Notify(\_SB_.C005.C0AF.C10C.C110.C111, 0x00)
Notify(\_SB_.C005.C0AF.C10C.C110.C112, 0x00)
}
Notify(\_SB_.C005.C012.C058.C113, 0x00)
Store(\_SB_.C005.C012.C02A, Local0)
If(LNot(LEqual(Local0, 0x00))) {
If(LEqual(\_SB_.C005.C012.C058.C089, 0x00)) {
Store(\_SB_.C005.C012.C02A, Local0)
Notify(\_SB_.C005.C0B0, 0x01)
}
}
Store(_WAK: Exit, Debug)
Return(Package(0x02) {
0x00
0x00
})
}
Scope(\_TZ_) {
Name(C142, Package(0x02) {
Package(0x02) {
Package(0x05) {
0x05AC
0x0CA0
0x0D36
0x0D68
0x0E4E
}
Package(0x05) {
0x0CD2
0x0D68
0x0D9A
0x0E80
0x0FA2
}
}
Package(0x02) {
Package(0x05) {
0x05AC
0x0CA0
0x0D04
0x0D68
0x0E1C
}
Package(0x05) {
0x0CD2
0x0D36
0x0D9A
0x0E58
0x0FA2
}
}
})
Name(C143, Package(0x02) {
Package(0x03) {
0x64
0x4B
0x32
}
Package(0x03) {
0x64
0x4B
0x32
}
})
Name(C144, 0x00)
Name(C145, 0x00)
Name(C146, 0x00)
Name(C147, 0x00)
Name(C148, 0x03)
Name(C149, 0x00)
Name(C14A, 0x01)
Name(C14B, 0x02)
Mutex(C14C, 0x00)
Name(C14D, 0x01)
Name(C14E, 0x0B9C)
Name(C14F, 0x0B9C)
Name(C150, 0xFFFFFFFD)
Name(C151, 0x00)
Device(C152) {
Method(_INI, 0x00) {
Store(\_SB_.C0F0, C151)
\_TZ_.C153._SCP
0x00
Subtract(0x0EB2, 0x0AAC, Local1)
Divide(Local1, 0x0A, Local0, Local2)
\_SB_.C005.C012.C058.C0A1
0x0E
Local2
0x00
0x00
Store(Null, Null)
\_TZ_.C143
C151
Zero
0x00
Zero
C144
Store(Null, Null)
\_TZ_.C143
C151
Zero
0x01
Zero
C145
Store(Null, Null)
\_TZ_.C143
C151
Zero
0x02
Zero
C146
}
PowerResource(C154, Less(Local1, C145))) {
If(And(C147, 0x02, Zero)) {
Store(0x01, Local2)
}
}
Else {
Subtract(C145, Local1, Local3)
If(LNot(LGreater(Local3, 0x02))) {
If(And(C147, 0x02, Zero)) {
Store(0x01, Local2)
}
}
}
Return(Local2)
Method(_ON_, 0x00) {
If(LEqual(And(C147, 0x03, Zero), 0x00)) {
\_SB_.C005.C012.C058.C0A1
0x20
C145
0x00
0x00
}
Or(C147, 0x02, C147)
}
Method(_OFF, 0x00) {
And(C147, 0xFFFFFFFD, C147)
Store(0x00, Local0)
If(And(C147, 0x04, Zero)) {
Store(C146, Local0)
}
\_SB_.C005.C012.C058.C0A1
0x20
Local0
0x00
0x00
}
}
Name(_HID, *PNP0C0B)
Name(_UID, 0x01)
Name(_PR0, Package(0x01) {
C156
})
}
Device(C157) {
PowerResource(C158, Return(Local2)
Method(_ON_, 0x00) {
If(LEqual(And(C147, 0x07, Zero), 0x00)) {
\_SB_.C005.C012.C058.C0A1
0x20
C146
0x00
0x00
}
Or(C147, 0x04, C147)
}
Method(_OFF, 0x00) {
And(C147, 0xFFFFFFFB, C147)
\_SB_.C005.C012.C058.C0A1
0x20
0x00
0x00
0x00
}
}
Name(_HID, *PNP0C0B)
Name(_UID, 0x02)
Name(_PR0, Package(0x01) {
C158
})
}
Method(C159, 0x01) {
Store(0x01, Local0)
Store(Arg0, Local1)
If(LLess(Arg0, C150)) {
Store(0x00, Local0)
Add(Arg0, 0x01, Local1)
}
Return(Null)
Null
Null
\_TZ_.C142
C151
Zero
Local0
Zero
Local1
Zero
}
ThermalZone(C153) {
Name(_AL0, Package(0x01) {
\_TZ_.C152
})
Name(_AL1, Package(0x01) {
\_TZ_.C155
})
Name(_AL2, Package(0x01) {
\_TZ_.C157
})
Method(_AC0, 0x00) {
Return(\_TZ_.C159)
\_TZ_.C14B
}
Method(_AC1, 0x00) {
Return(\_TZ_.C159)
\_TZ_.C14A
}
Method(_AC2, 0x00) {
Return(\_TZ_.C159)
\_TZ_.C149
}
Method(_PSV, 0x00) {
Return(\_TZ_.C159)
\_TZ_.C148
}
Name(_PSL, Package(0x01) {
\_PR_.C0B5
})
Method(_SCP, 0x01) {
Store(0x00, \_TZ_.C149)
Store(0x01, \_TZ_.C14A)
Store(0x02, \_TZ_.C14B)
Store(0x03, \_TZ_.C148)
}
Name(_TSP, 0x64)
Name(_TC1, 0x01)
Name(_TC2, 0x02)
Name(_CRT, 0x0EB2)
Method(_TMP, 0x00) {
Store(\_SB_.C005.C012.C058.C0A1, 0x08)
0x00
0x00
0x00
Local0
Store(Null, Local0)
0x01
Zero
Local2
If(And(Local2, 0x80, Zero)) {
Subtract(0x0100, Local2, Local2)
}
Multiply(Local2, 0x0A, Local1)
Add(Local1, 0x0AAC, Local1)
Store(Local1, Local2)
If(LLess(Local1, 0x0B4B)) {
If(LLess(C14E, 0x0B4B)) {
Store(0x0B4B, C14F)
}
Store(C14F, Local1)
}
Store(Local2, C14E)
Store(Local1, C14F)
Acquire(C14C)
Ones
Ones
If(LEqual(C14D, 0x01)) {
Store(Match(Null, Null, \_TZ_.C142, C151, Zero, 0x01), Zero)
Null
Zero
0x00
0x00
Local0
If(LNot(LEqual(Local0, C150))) {
Store(Local0, C150)
C15A
Local0
}
Store(0x00, C14D)
}
Release(C14C)
Return(Local1)
}
Method(C15A, 0x01) {
Store(Null, Null)
Null
\_TZ_.C142
C151
Zero
0x01
Zero
Arg0
Zero
Local0
Subtract(Local0, 0x0AAC, Local0)
Divide(Local0, 0x0A, Local1, Local2)
\_SB_.C005.C012.C058.C0A1
0x0C
Local2
0xFF
0x00
Store(Null, Null)
Null
\_TZ_.C142
C151
Zero
0x00
Zero
Arg0
Zero
Local0
If(LLess(Local0, 0x0AAC)) {
Subtract(0x0AAC, Local0, Local1)
Divide(Local1, 0x0A, Local3, Local2)
Not(Local2, Local2)
Add(Local2, 0x01, Local2)
And(Local2, 0xFF, Local2)
}
Else {
Subtract(Local0, 0x0AAC, Local0)
Divide(Local0, 0x0A, Local1, Local2)
}
\_SB_.C005.C012.C058.C0A1
0x0A
Local2
0x00
0x00
Notify(\_TZ_.C153, 0x81)
}
}
}
Scope(\_GPE) {
Method(_L00, 0x00) {
Notify(\_TZ_.C153, 0x80)
}
Method(_L08, 0x00) {
Notify(\_SB_.C005, 0x02)
}
Method(_L09, 0x00) {
Store(_L09: Enter, Debug)
Store(\_SB_.C005.C012.C058.C097, 0x30)
0x00
0x00
0x00
0x00
Local0
CreateByteField(Local0, 0x01, C15B)
CreateByteField(Local0, 0x02, C15C)
CreateByteField(Local0, 0x03, C15D)
CreateByteField(Local0, 0x04, C15E)
Store(C15B, Local4)
If(And(Local4, 0x10, Zero)) {
Store(\_SB_.C005.C012.C025, Local5)
Store(\_SB_.C005.C012.C027, Local6)
Acquire(\_GL_)
Ones
Ones
Store(\_SB_.C005.C012.C058.C067, \_SB_.C005.C012.C025)
Store(\_SB_.C005.C012.C058.C06A, \_SB_.C005.C012.C027)
Release(\_GL_)
XOr(Local5, \_SB_.C005.C012.C025, Local5)
XOr(Local6, \_SB_.C005.C012.C027, Local6)
If(And(Local6, 0x01, Zero)) {
Store(_L09: Power change event, Debug)
Notify(\_SB_.C0F7, 0x80)
}
If(And(Local6, 0x06, Zero)) {
Store(_L0B: Low battery event, Debug)
Notify(\_SB_.C0FF, 0x80)
Notify(\_SB_.C100, 0x80)
}
If(And(Local5, 0x01, Zero)) {
Store(_L09: Battery 0 insertion/removal event, Debug)
If(And(\_SB_.C005.C012.C025, 0x01, Zero)) {
Notify(\_SB_.C0FF, 0x00)
}
Else {
Notify(\_SB_.C0FF, 0x01)
}
}
If(And(Local5, 0x02, Zero)) {
Store(_L09: Battery 1 insertion/removal event, Debug)
If(And(\_SB_.C005.C012.C025, 0x02, Zero)) {
Notify(\_SB_.C100, 0x00)
}
Else {
Notify(\_SB_.C100, 0x01)
}
}
If(And(Local5, 0x04, Zero)) {
Store(_L09: Battery 2 insertion/removal event, Debug)
Store(\_SB_.C005.C012.C058.C089, Local7)
If(And(\_SB_.C005.C012.C025, 0x04, Zero)) {
If(LEqual(Local7, 0x05)) {
Notify(\_SB_.C101, 0x00)
}
}
Else {
If(LEqual(Local7, 0x05)) {
Notify(\_SB_.C101, 0x01)
}
}
}
}
If(And(Local4, 0x40, Zero)) {
Store(_L09: Thermal event, Debug)
Acquire(\_TZ_.C14C)
Ones
Ones
Store(0x01, \_TZ_.C14D)
Release(\_TZ_.C14C)
Notify(\_TZ_.C153, 0x80)
}
If(And(Local4, 0x80, Zero)) {
Store(\_SB_.C005.C012.C028, Local5)
Store(\_SB_.C005.C012.C029, Local6)
Store(\_SB_.C005.C012.C026, Local7)
Acquire(\_GL_)
Ones
Ones
Store(\_SB_.C005.C012.C058.C07B, \_SB_.C005.C012.C028)
Store(\_SB_.C005.C012.C058.C07C, \_SB_.C005.C012.C029)
Store(\_SB_.C005.C012.C058.C069, \_SB_.C005.C012.C026)
Release(\_GL_)
XOr(Local5, \_SB_.C005.C012.C028, Local5)
XOr(Local6, \_SB_.C005.C012.C029, Local6)
XOr(Local7, \_SB_.C005.C012.C026, Local7)
If(And(Local5, 0x0F, Zero)) {
Store(_L09: MultiBay 1 change event, Debug)
Notify(\_SB_.C005.C012.C058.C113, 0x00)
Notify(\_SB_.C005.C12C.C12F, 0x00)
}
If(And(Local5, 0xF0, Zero)) {
Store(_L09: MultiBay change event, Debug)
Notify(\_SB_.C005.C12C.C12F, 0x00)
Notify(\_SB_.C005.C012.C058.C113, 0x00)
}
If(And(Local7, 0x20, Zero)) {
Store(_L09: External Floppy change event, Debug)
Notify(\_SB_.C005.C012.C058.C113, 0x00)
And(\_SB_.C005.C012.C026, 0x20, Local1)
If(LEqual(Local1, 0x20)) {
Store(\_SB_.C005.C012.C058.C08C, 0x25)
Local2
Or(Local2, 0x10, Local2)
\_SB_.C005.C012.C058.C08D
0x25
Local2
\C0DE
0x02
0x5F
0x01
0xFE
\C0DE
0x03
0x00
0x00
0x00
}
Else {
Store(\_SB_.C005.C012.C058.C08C, 0x25)
Local2
And(Local2, 0xEF, Local2)
\_SB_.C005.C012.C058.C08D
0x25
Local2
\C0DE
0x02
0x5F
0x00
0xFE
\C0DE
0x03
0x00
0x00
0x00
}
}
If(LEqual(\_SB_.C005.C012.C02A, 0x05)) {
If(And(Local6, 0x0F, Zero)) {
Store(_L09: Docking MultiBay 1 change event, Debug)
Notify(\_SB_.C005.C0AF.C10C.C10D, 0x00)
Notify(\_SB_.C005.C012.C058.C113, 0x00)
}
If(And(Local6, 0xF0, Zero)) {
Store(_L09: Docking MultiBay 2 change event, Debug)
Notify(\_SB_.C005.C0AF.C10C.C110, 0x00)
Notify(\_SB_.C005.C0AF.C10C.C110, 0x00)
Notify(\_SB_.C005.C012.C058.C113, 0x00)
}
}
}
Store(_L09: Exit, Debug)
}
Method(_L0A, 0x00) {
Notify(\_SB_.C005, 0x02)
If(LEqual(\_SB_.C005.C012.C02A, 0x05)) {
Notify(\_SB_.C005.C0AF, 0x02)
}
}
Method(_L0B, 0x00) {
Store(_L0B: Enter, Debug)
Store(\_SB_.C005.C012.C058.C097, 0x30)
0x00
0x00
0x00
0x00
Local0
CreateByteField(Local0, 0x01, C15B)
CreateByteField(Local0, 0x02, C15C)
CreateByteField(Local0, 0x03, C15D)
CreateByteField(Local0, 0x04, C15E)
Store(C15B, Local4)
If(And(Local4, 0x01, Zero)) {
C15F
0x01
If(\_SB_.C005.C012.C02A) {
If(\_SB_.C005.C0AF.C0B4) {
0x02
0x01
\_SB_.C005.C0AF.C0B4
0x00
0x01
}
Store(0x01, Local2)
Store(\_SB_.C005.C012.C02A, Local0)
}
Else {
Store(0x00, Local2)
}
Notify(\_SB_.C005.C0B0, Local2)
}
If(And(Local4, 0x04, Zero)) {
Notify(\_SB_.C056, 0x80)
}
If(And(Local4, 0x08, Zero)) {
Notify(\_SB_.C056, 0x02)
}
If(And(Local4, 0x02, Zero)) {
Notify(\_SB_.C160, 0x80)
}
Store(_L0B: Exit, Debug)
}
Method(C15F, 0x01) {
If(LEqual(Arg0, 0x01)) {
Store(0x01, \_SB_.C005.C012.C02B)
}
Else {
If(LEqual(Arg0, 0x00)) {
Store(0x00, \_SB_.C005.C012.C02B)
}
}
Return(\_SB_.C005.C012.C02B)
}
Method(C12A, 0x01) {
Store(\_SB_.C005.C012.C058.C089, Local4)
If(LNot(LEqual(Arg0, 0x01))) {
If(LNot(LEqual(Local4, 0x05))) {
Sleep(0x05DC)
}
}
Acquire(\_SB_.C005.C012.C058.C084)
Ones
Ones
Store(Going to issue Dock Change, Debug)
Store(0xF3, \_SB_.C005.C012.C03C)
Sleep(0x64)
Release(\_SB_.C005.C012.C058.C084)
Store(\_SB_.C005.C012.C058.C069, Local5)
Store(\_SB_.C005.C012.C058.C089, Local7)
Store(Local7, \_SB_.C005.C012.C02A)
Acquire(\_SB_.C005.C012.C058.C086)
Ones
Ones
Store(0xFFFFFFFD, \_SB_.C005.C012.C058.C087)
Release(\_SB_.C005.C012.C058.C086)
C15F
0x00
Store(0x01, Local6)
If(LOr(LEqual(Local7, Local4), And(Local5, 0x80, Zero))) {
Store(0x00, Local6)
}
If(And(Local6, Arg0, Zero)) {
If(LEqual(Local7, 0x03)) {
Notify(\_SB_.C005.C120, 0x00)
Notify(\_SB_.C005.C121, 0x00)
Notify(\_SB_.C005.C122, 0x00)
Notify(\_SB_.C005.C123, 0x00)
Notify(\_SB_.C005.C124, 0x00)
Notify(\_SB_.C005.C125, 0x00)
Notify(\_SB_.C005.C126, 0x00)
Notify(\_SB_.C005.C127, 0x00)
}
If(LEqual(Local7, 0x05)) {
Notify(\_SB_.C005.C0AF, 0x00)
Notify(\_SB_.C101, 0x00)
}
Notify(\_SB_.C005.C012.C058.C113, 0x00)
}
Return(Local6)
}
}
Scope(\_SB_) {
Name(C161, 0x00)
OperationRegion(C162, 0x01, 0x84, 0x02)
Field(C162, 0x01) {
C163, 0x8,
C164, 0x8,
}
OperationRegion(C165, 0x01, 0x84, 0x02)
Field(C165, 0x02) {
C166, 0x10,
}
OperationRegion(C167, 0x01, 0x84, 0x04)
Field(C167, 0x03) {
C168, 0x20,
}
OperationRegion(C169, 0x01, 0x03F8, 0x08)
Field(C169, 0x00) {
C16A, 0x8,
C16B, 0x8,
C16C, 0x8,
C16D, 0x8,
C16E, 0x8,
C16F, 0x8,
C170, 0x8,
C171, 0x8,
}
Mutex(C172, 0x00)
Method(C173, 0x01) {
Acquire(C172)
Ones
Ones
Store(Arg0, C163)
If(LNot(LEqual(0x00, 0x00))) {
C174
C175
Arg0
}
Release(C172)
}
Method(C176, 0x01) {
Acquire(C172)
Ones
Ones
Store(Arg0, C164)
Release(C172)
}
Method(C177, 0x01) {
Acquire(C172)
Ones
Ones
Store(Arg0, C166)
If(LNot(LEqual(0x00, 0x00))) {
C174
C178
Arg0
}
Release(C172)
}
Method(C179, 0x01) {
Acquire(C172)
Ones
Ones
Store(Arg0, C168)
If(LNot(LEqual(0x00, 0x00))) {
C174
C17A
Arg0
}
Release(C172)
}
Method(C174, 0x00) {
Store(0x83, C16D)
Store(0x01, C16A)
Store(0x00, C16B)
Store(0x03, C16D)
}
Method(C175, 0x01) {
C17B
Arg0
C17C
0x20
}
Method(C178, 0x01) {
C17B
And(ShiftRight(Arg0, 0x08, Zero), 0xFF, Zero)
C17B
And(Arg0, 0xFF, Zero)
C17C
0x20
}
Method(C17A, 0x01) {
C17B
And(ShiftRight(Arg0, 0x18, Zero), 0xFF, Zero)
C17B
And(ShiftRight(Arg0, 0x10, Zero), 0xFF, Zero)
C17B
And(ShiftRight(Arg0, 0x08, Zero), 0xFF, Zero)
C17B
And(Arg0, 0xFF, Zero)
C17C
0x20
}
Method(C17B, 0x01) {
Store(Arg0, Local0)
Store(Arg0, Local1)
ShiftRight(Local0, 0x04, Local0)
Store(0x02, Local2)
While(LNot(LEqual(Local2, 0x00))) {
And(0x0F, Local0, Local0)
Add(Local0, 0x30, Local0)
If(LNot(LLess(Local0, 0x3A))) {
Add(Local0, 0x07, Local0)
}
While(LEqual(And(C16F, 0x20, Zero), 0x00)) {
Stall(0x01)
}
Store(Local0, C16A)
Store(Local1, Local0)
Decrement(Local2)
}
}
Method(C17C, 0x01) {
While(LEqual(And(C16F, 0x20, Zero), 0x00)) {
Stall(0x01)
}
Store(Arg0, C16A)
}
}
Scope(\_SB_.C005) {
Device(C17D) {
Name(_ADR, 0x00050000)
Name(_S1D, 0x03)
Name(_S3D, 0x03)
Name(_S4D, 0x03)
}
}
Scope(\_SB_) {
Device(C160) {
Name(_HID, *PNP0C0D)
Method(_LID, 0x00) {
Acquire(\_GL_)
Ones
Ones
Store(\_SB_.C005.C012.C058.C069, Local0)
Release(\_GL_)
And(Local0, 0x02, Local0)
ShiftRight(Local0, 0x01, Local0)
Return(Local0)
}
Name(_PRW, Package(0x02) {
0x0B
0x04
})
Method(_PSW, 0x01) {
Store(Arg0, Local0)
If(LEqual(Local0, 0x01)) {
\C057
0xFF
0x01
}
Else {
\C057
0x00
0x01
}
}
}
}
Scope(\_SB_.C005) {
Device(C141) {
Name(_ADR, 0x00070002)
Device(C17E) {
Name(_ADR, 0x00)
Device(C17F) {
Name(_ADR, 0x00)
}
Device(C180) {
Name(_ADR, 0x01)
}
Name(_EJD, _SB.C005.C0B0)
}
Name(_PRW, Package(0x02) {
0x08
0x01
})
Method(_PSW, 0x01) {
Store(Arg0, Local0)
If(LEqual(Local0, 0x01)) {
Store(Enable Wakeup of USB, Debug)
}
Else {
Store(Disable Wakeup of USB, Debug)
}
}
}
}
Scope(\_SB_.C005) {
Device(C181) {
Name(_ADR, 0x00090000)
}
Device(C182) {
Name(_ADR, 0x00090001)
}
Device(C183) {
Name(_ADR, 0x00080000)
}
}} |
FACS |
|---|
Firmware ACPI Control Structure -------------------------------------------------------------------------------- Signature : FACS Table length : 64 Byte Hardware signature : ð Firmware Waking Vector : 00000000h Global Lock : 00000000h Flags : 00000001h (S4BIOS_REQ is supported) |
CPU |
|---|
Mobile Pentium(R) II or Pentium(R) II Processor Mobile Module ================================================================================ Vendor : Intel Corp. Vendor ID String : GenuineIntel CPU Type : OEM Processor Family : 6 Model : 6 Stepping : A Signature : 0000066A FPU Model : Built-in FPU Internal Clock : 333 MHz Host Clock : 066 MHz Cache Type : Write-back Data Cache Size : 16 kB Instruction Cache Size : 16 kB L2 Cache Size : 256 kB Brand ID : 00H (not supported) Supported Processor Features -------------------------------------------------------------------------------- On-Chip FPU Enhanced V86 mode Debugging Extension Page Size Extensions (4MB paging) Time Stamp Counter Model Specific Register Physical Address Extensions Machine Check Exception Compare and Exchange 8 bytes instruction (CMPXCHG8B) Fast System Call Memory Type Range Registers Page Global Enable Machine Check Architecture Conditional Move Instructions (CMOVcc) Page Attribute Table 36-bit Page Size Extension MultiMedia Extensions (MMX) Fast Floating Point Save and Restore |
CPU Tests Folder |
|---|
Basic Test |
|---|
Not Tested |
CPU Benchmark |
|---|
Not Tested |
Floppy |
|---|
Floppy Drive(s) Installed : 1 ================================================================================ IRQ Level : 6 DMA Channel : 2 I/O Range : 03F2h-03F6h |
Drive A |
|---|
Drive A ================================================================================ Media type : 1.44MB, 3.5" Drive Maximum track number : 79 Maximum sector number : 18 Maximum head number : 1 Diskette Parameter Table Contents -------------------------------------------------------------------------------- Step Rate Time Code : 0Fh Head Unload Time Code : 0Dh Head Load Time Code : 00h Drive Motor Turn-Off Delay : 2035 ms Bytes Per Sector : 512 Sector Per Track : 18 GAP Length For Read/Write : 1Bh Data Transfer Length Code : FFh Format GAP Length : 65h Fill Byte For Format : F6h Head Settling Time : 15 ms Motor Startup Time : 1000 ms |
Drive A Tests Folder |
|---|
Controller test |
|---|
Not Tested |
Change-line test |
|---|
Not Tested |
Write protect test |
|---|
Not Tested |
Linear test |
|---|
Not Tested |
Random test |
|---|
Not Tested |
Butterfly test |
|---|
Not Tested |
Quick test |
|---|
Not Tested |
Seek test |
|---|
Not Tested |
Video system |
|---|
Video Adapter(s) Found: ================================================================================ Primary : Rage 3D LT Pro PCI (BGA-312 Package), 4 MB |
Rage 3D LT Pro PCI (BGA-312 Package) |
|---|
PCI Video Adapter
================================================================================
Location : PCI Device on Motherboard
Vendor Id : 1002h (ATI Technologies)
Device Id : 4C49h (Rage 3D LT Pro PCI (BGA-312 Package))
Class : 00h (VGA Compatible Controller)
Subsystem Vendor ID : 0E11h (Compaq)
Subsystem Device ID : B11Bh (info unavailable)
Video System Type : Primary
Video Adapter Type : Super VGA
Video Memory Size : 4 MB
OEM Vendor Name : "ATI Technologies Inc."
OEM Product Name : "MACH64LP"
OEM Product Revision : "01.00"
OEM Software Revision : 1.0
OEM String : "ATI MACH64"
VESA Version : 2.0
VESA Power Management Version : 1.0
VESA PM Supported States :
: STANDBY
: SUSPEND
: OFF
VESA Supported Video Modes : 40
+------------------------------------------+
| Number Mode HRes. VRes. Colors |
+------------------------------------------+
0100h Graphic 640 400 256
0101h Graphic 640 480 256
0110h Graphic 640 480 32K
0111h Graphic 640 480 64K
0112h Graphic 640 480 16M
0103h Graphic 800 600 256
0113h Graphic 800 600 32K
0114h Graphic 800 600 64K
0115h Graphic 800 600 16M
0105h Graphic 1024 768 256
0116h Graphic 1024 768 32K
0117h Graphic 1024 768 64K
0118h Graphic 1024 768 16M
0107h Graphic 1280 1024 256
0119h Graphic 1280 1024 32K
011Ah Graphic 1280 1024 64K
011Bh Graphic 1280 1024 16M
0302h Unknown VESA mode
0303h Unknown VESA mode
0304h Unknown VESA mode
0202h Unknown VESA mode
010Dh Graphic 320 200 32K
010Eh Graphic 320 200 64K
010Fh Graphic 320 200 16M
0212h Unknown VESA mode
0213h Unknown VESA mode
0214h Unknown VESA mode
0215h Unknown VESA mode
0222h Unknown VESA mode
0223h Unknown VESA mode
0224h Unknown VESA mode
0225h Unknown VESA mode
0232h Unknown VESA mode
0233h Unknown VESA mode
0234h Unknown VESA mode
0235h Unknown VESA mode
0242h Unknown VESA mode
0243h Unknown VESA mode
0244h Unknown VESA mode
0245h Unknown VESA mode
|
Rage 3D LT Pro PCI (BGA-312 Package) Tests Folder |
|---|
Random |
|---|
Not Tested |
Independent bits |
|---|
Not Tested |
Independent addresses |
|---|
Not Tested |
Monitor |
|---|
Monitor ================================================================================ Monitor Type : Analog color |
DMI |
|---|
Found SMBIOS Information via PnP Interface -------------------------------------------------------------------------------- Revision : 2.3 Number of structures : 59 Maximum structure size : 150h (336 decimal) bytes DMI Storage base : 000FF154h DMI Storage size : 06CEh SMBIOS 2.3 Structure Table Entry Point Structure (at F000:7980) -------------------------------------------------------------------------------- Anchor String : _SM_ Checksum : 2Dh Entry Point Structure Length : 1Fh bytes SMBIOS Revision : 2.3 Maximum Structure Size : 150h (336 decimal) bytes Entry Point Revision : 0 Formated Area (5 bytes) : 0 0 0 0 0 DMI BIOS Structure Entry Point Structure (at F000h:7980h) -------------------------------------------------------------------------------- Header : _DMI_ Checksum : E2h Length : 06CEh (1742 decimal) bytes BIOS Structure Table Address : 000FF154h Number of Structures : 59 DMI BIOS Revision : 2.3 |
BIOS |
|---|
Structure : BIOS (Type 0) Length : 14h (20 decimal) bytes Handle : 0000h (0 decimal) ================================================================================ BIOS Vendor : Compaq BIOS Version : 1.35 Starting Address Segment : F000h BIOS Release Date : 02/15/2001 BIOS ROM Size : 512K BIOS Characteristics: 0000DF90h 00000000h -------------------------------------------------------------------------------- ISA Supported : Yes MCA Supported : No EISA Supported : No PCI Supported : Yes PCMCIA Supported : Yes PnP Supported : Yes APM Supported : Yes Flashable BIOS : Yes BIOS shadowing : Yes VL-VESA Supported : No ESCD Supported : Yes CD-Boot Supported : Yes Selectable Boot Supported : No BIOS ROM Socketed : No Boot From PC Card Supported : No EDD Specification Supported : No NEC 9800 1.2mb Floppy Supported : No Toshiba 1.2mb Floppy Supported : No 5.25" / 360 KB Floppy Supported : No 5.25" / 1.2MB Floppy Supported : No 3.5" / 720 KB Floppy Supported : No 3.5" / 2.88 MB Floppy Supported : No Print Screen Supported : No 8042 Keyboard Supported : No Serial Services Supported : No Printer Services Supported : No CGA/Mono Video Supported : No NEC PC-98 : No BIOS Characteristics Extension Byte 1 (43h): -------------------------------------------------------------------------------- ACPI Supported : Yes USB Legacy Supported : Yes AGP Supported : No I2O Boot Supported : No LS-120 Boot Supported : No ATAPI ZIP Drive Boot Supported : No 1394 Boot Supported : Yes Smart Battery Supported : No BIOS Characteristics Extension Byte 2 (6Fh): -------------------------------------------------------------------------------- BIOS Boot Supported : Yes Network Boot Supported : Yes Dump of the structure (43 bytes): -------------------------------------------------------------------------------- 0000: 00 14 00 00 - 01 02 00 F0 "........" 0008: 03 07 90 DF - 00 00 00 00 "........" 0010: 00 00 13 03 - 43 6F 6D 70 "....Comp" 0018: 61 71 00 31 - 2E 33 35 00 "aq.1.35." 0020: 30 32 2F 31 - 35 2F 32 30 "02/15/20" 0028: 30 31 00 "01." |
System |
|---|
Structure : System (Type 1) Length : 19h (25 decimal) bytes Handle : 0001h (1 decimal) ================================================================================ Manufacturer : Compaq Product Name : Armada M300 Version : (none) Serial Number : 1J98CYB6710V UUID : 0000: C7 2F F0 0D - C9 FA DB 11 "./......" 0008: A7 C7 B6 F4 - 18 1D B8 FA "........" Wake-up Type : Power Switch Dump of the structure (93 bytes): -------------------------------------------------------------------------------- 0000: 01 19 01 00 - 01 02 00 03 "........" 0008: C7 2F F0 0D - C9 FA DB 11 "./......" 0010: A7 C7 B6 F4 - 18 1D B8 FA "........" 0018: 06 43 6F 6D - 70 61 71 00 ".Compaq." 0020: 41 72 6D 61 - 64 61 20 20 "Armada " 0028: 20 20 4D 33 - 30 30 20 20 " M300 " 0030: 20 20 20 20 - 20 20 20 20 " " 0038: 20 20 20 20 - 20 20 20 20 " " 0040: 20 20 20 20 - 20 20 20 20 " " 0048: 20 20 20 00 - 31 4A 39 38 " .1J98" 0050: 43 59 42 36 - 37 31 30 56 "CYB6710V" 0058: 20 20 20 20 - 00 " ." |
Base Board |
|---|
Structure : Base Board (Type 2) Length : 08h (8 decimal) bytes Handle : 0002h (2 decimal) ================================================================================ Manufacturer : Compaq Product : 053C Version : (none) Serial Number : (none) Dump of the structure (20 bytes): -------------------------------------------------------------------------------- 0000: 02 08 02 00 - 01 02 00 00 "........" 0008: 43 6F 6D 70 - 61 71 00 30 "Compaq.0" 0010: 35 33 43 00 "53C." |
System Enclosure or Chassis |
|---|
Structure : System Enclosure or Chassis (Type 3) Length : 0Dh (13 decimal) bytes Handle : 0003h (3 decimal) ================================================================================ Manufacturer : Compaq Type : Notebook Chassis Lock : Present Version : (none) Serial Number : 1J98CYB6710V Asset Tag Number : 1J98CYB6710V Bootup State : Safe Power Supply State : Safe Thermal State : Safe Security Status : External Interface Enabled Dump of the structure (54 bytes): -------------------------------------------------------------------------------- 0000: 03 0D 03 00 - 01 8A 00 02 "........" 0008: 03 03 03 03 - 05 43 6F 6D ".....Com" 0010: 70 61 71 00 - 31 4A 39 38 "paq.1J98" 0018: 43 59 42 36 - 37 31 30 56 "CYB6710V" 0020: 20 20 20 20 - 00 31 4A 39 " .1J9" 0028: 38 43 59 42 - 36 37 31 30 "8CYB6710" 0030: 56 20 20 20 - 20 00 "V ." |
Processor |
|---|
Structure : Processor (Type 4) Length : 23h (35 decimal) bytes Handle : 0004h (4 decimal) ================================================================================ Socket Designation : J1 Processor Type : 03h (Central Processor) Processor Family : 0Dh (Pentium II) Processor Manufacturer : Intel Processor ID : 0000066Ah 0183F9FFh Processor Version : Intel Pentium II External Clock : 66 MHz Max Speed : 333 MHz Current Speed : 333 MHz Status : 41h (CPU Socket Populated, Status Enabled) Processor Upgrade : 03h (Daughter Board) Voltage : 1.8V L1 Cache Handle : 09 L2 Cache Handle : 10 L3 Cache Handle : -1 (no L3 handle) Serial Number : (none) Asset Tag : (none) Part Number : (none) Dump of the structure (65 bytes): -------------------------------------------------------------------------------- 0000: 04 23 04 00 - 01 03 0D 02 ".#......" 0008: 6A 06 00 00 - FF F9 83 01 "j......." 0010: 03 92 42 00 - 4D 01 4D 01 "..B.M.M." 0018: 41 03 09 00 - 0A 00 FF FF "A......." 0020: 00 00 00 4A - 31 00 49 6E "...J1.In" 0028: 74 65 6C 00 - 49 6E 74 65 "tel.Inte" 0030: 6C 20 50 65 - 6E 74 69 75 "l Pentiu" 0038: 6D 20 49 49 - 20 20 20 20 "m II " 0040: 00 "." |
Memory Controller |
|---|
Structure : Memory Controller (Type 5) Length : 16h (22 decimal) bytes Handle : 0005h (5 decimal) ================================================================================ Error Detecting Method : 03h (None) Error Correcting Capability : 04h (None) Supported Interleave : 02h (Unknown) Current Interleave : 02h (Unknown) Maximum Memory Module Size : 08h (256 MB ) Supported Speeds : 0001h (Other) Supported Memory Types : 0400h (SDRAM) Memory Module Voltage : 02h (3.3V) Number of Associated Memory Slots : 02h Memory Module Configuration Handles : 06h 07h Enabled Error Correcting Capability : 04h (None) Dump of the structure (23 bytes): -------------------------------------------------------------------------------- 0000: 05 16 05 00 - 03 04 02 02 "........" 0008: 08 01 00 00 - 04 02 02 06 "........" 0010: 00 07 00 04 - 00 00 00 "......." |
Memory Module |
|---|
Structure : Memory Module (Type 6) Length : 0Ch (12 decimal) bytes Handle : 0006h (6 decimal) ================================================================================ Socket Designation : (none) Bank Connections : 01h (RAS 0, RAS 1) Current Speed : 10 Ns Current Memory Type : 0400h (SDRAM) Installed Size : 86h (64 MB - Double Bank) Enabled Size : 86h (64 MB) Error Status : 00h (Errors: Cor-None; UnCor-None) Dump of the structure (13 bytes): -------------------------------------------------------------------------------- 0000: 06 0C 06 00 - 01 01 0A 00 "........" 0008: 04 86 86 00 - 00 "....." |
Memory Module |
|---|
Structure : Memory Module (Type 6) Length : 0Ch (12 decimal) bytes Handle : 0007h (7 decimal) ================================================================================ Socket Designation : (none) Bank Connections : 23h (RAS 2, RAS 3) Current Speed : 10 Ns Current Memory Type : 0400h (SDRAM) Installed Size : 7Fh (Not Installed - Single Bank) Enabled Size : 7Fh (Not Installed) Error Status : 00h (Errors: Cor-None; UnCor-None) Dump of the structure (13 bytes): -------------------------------------------------------------------------------- 0000: 06 0C 07 00 - 00 23 0A 00 ".....#.." 0008: 04 7F 7F 00 - 00 "....." |
Memory Module |
|---|
Structure : Memory Module (Type 6) Length : 0Ch (12 decimal) bytes Handle : 0008h (8 decimal) ================================================================================ Socket Designation : (none) Bank Connections : 45h (RAS 4, RAS 5) Current Speed : 10 Ns Current Memory Type : 0400h (SDRAM) Installed Size : 7Fh (Not Installed - Single Bank) Enabled Size : 7Fh (Not Installed) Error Status : 00h (Errors: Cor-None; UnCor-None) Dump of the structure (13 bytes): -------------------------------------------------------------------------------- 0000: 06 0C 08 00 - 00 45 0A 00 ".....E.." 0008: 04 7F 7F 00 - 00 "....." |
Cache: Internal L1 Cache |
|---|
Structure : Cache (Type 7) Length : 13h (19 decimal) bytes Handle : 0009h (9 decimal) ================================================================================ Socket Designation : Internal L1 Cache Cache Configuration : 0180h (L1; Not Socketed; Internal; Enabled; WB) Maximum Cache Size : 0020h (32 K) Installed Size : 0020h (32 K) Supported SRAM Type : 0008h (Burst) Current SRAM Type : 0008h (Burst) Cache Speed : 0 Ns (unknown) Error Correcion Type : Unknown System Cache Type : Unknown Associativity : 4-way Set-Associative Dump of the structure (37 bytes): -------------------------------------------------------------------------------- 0000: 07 13 09 00 - 01 80 01 20 "....... " 0008: 00 20 00 08 - 00 08 00 00 ". ......" 0010: 02 02 05 49 - 6E 74 65 72 "...Inter" 0018: 6E 61 6C 20 - 4C 31 20 43 "nal L1 C" 0020: 61 63 68 65 - 00 "ache." |
Cache: Internal L2 Cache |
|---|
Structure : Cache (Type 7) Length : 13h (19 decimal) bytes Handle : 000Ah (10 decimal) ================================================================================ Socket Designation : Internal L2 Cache Cache Configuration : 01A1h (L2; Not Socketed; External; Enabled; WB) Maximum Cache Size : 8004h (512 K) Installed Size : 8004h (512 K) Supported SRAM Type : 0008h (Burst) Current SRAM Type : 0008h (Burst) Cache Speed : 0 Ns (unknown) Error Correcion Type : None System Cache Type : Unknown Associativity : 4-way Set-Associative Dump of the structure (37 bytes): -------------------------------------------------------------------------------- 0000: 07 13 0A 00 - 01 A1 01 04 "........" 0008: 80 04 80 08 - 00 08 00 00 "........" 0010: 03 02 05 49 - 6E 74 65 72 "...Inter" 0018: 6E 61 6C 20 - 4C 32 20 43 "nal L2 C" 0020: 61 63 68 65 - 00 "ache." |
Port Connector: COM A |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 000Bh (11 decimal) ================================================================================ Internal Reference Designator : (none) Internal Connector Type : 18h (9 Pin Dual Inline (pin 10 cut)) External Reference Designator : COM A External Connector Type : 08h (DB-9 pin male) Port Type : 09h (Serial Port 16550A Compatible) Dump of the structure (15 bytes): -------------------------------------------------------------------------------- 0000: 08 09 0B 00 - 00 18 01 08 "........" 0008: 09 43 4F 4D - 20 41 00 ".COM A." |
Port Connector: COM B |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 000Ch (12 decimal) ================================================================================ Internal Reference Designator : (none) Internal Connector Type : 18h (9 Pin Dual Inline (pin 10 cut)) External Reference Designator : COM B External Connector Type : 08h (DB-9 pin male) Port Type : 09h (Serial Port 16550A Compatible) Dump of the structure (15 bytes): -------------------------------------------------------------------------------- 0000: 08 09 0C 00 - 00 18 01 08 "........" 0008: 09 43 4F 4D - 20 42 00 ".COM B." |
Port Connector: LPT1 |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 000Dh (13 decimal) ================================================================================ Internal Reference Designator : (none) Internal Connector Type : 19h (25 Pin Dual Inline (pin 26 cut)) External Reference Designator : LPT1 External Connector Type : 05h (DB25 pin female) Port Type : 05h (Parallel Port ECP/EPP) Dump of the structure (14 bytes): -------------------------------------------------------------------------------- 0000: 08 09 0D 00 - 00 19 01 05 "........" 0008: 05 4C 50 54 - 31 00 ".LPT1." |
Port Connector: Keyboard |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 000Eh (14 decimal) ================================================================================ Internal Reference Designator : (none) Internal Connector Type : 0Fh (PS/2) External Reference Designator : Keyboard External Connector Type : 0Fh (PS/2) Port Type : 0Dh (Keyboard Port) Dump of the structure (18 bytes): -------------------------------------------------------------------------------- 0000: 08 09 0E 00 - 00 0F 01 0F "........" 0008: 0D 4B 65 79 - 62 6F 61 72 ".Keyboar" 0010: 64 00 "d." |
Port Connector: Mouse |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 000Fh (15 decimal) ================================================================================ Internal Reference Designator : (none) Internal Connector Type : 0Fh (PS/2) External Reference Designator : Mouse External Connector Type : 0Fh (PS/2) Port Type : 0Eh (Mouse Port) Dump of the structure (15 bytes): -------------------------------------------------------------------------------- 0000: 08 09 0F 00 - 00 0F 01 0F "........" 0008: 0E 4D 6F 75 - 73 65 00 ".Mouse." |
Port Connector: Primary IDE |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 0010h (16 decimal) ================================================================================ Internal Reference Designator : (none) Internal Connector Type : 16h (On Board IDE) External Reference Designator : Primary IDE External Connector Type : 00h (None) Port Type : 00h (None) Dump of the structure (21 bytes): -------------------------------------------------------------------------------- 0000: 08 09 10 00 - 00 16 01 00 "........" 0008: 00 50 72 69 - 6D 61 72 79 ".Primary" 0010: 20 49 44 45 - 00 " IDE." |
Port Connector: Secondary IDE |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 0011h (17 decimal) ================================================================================ Internal Reference Designator : (none) Internal Connector Type : 16h (On Board IDE) External Reference Designator : Secondary IDE External Connector Type : 00h (None) Port Type : 00h (None) Dump of the structure (23 bytes): -------------------------------------------------------------------------------- 0000: 08 09 11 00 - 00 16 01 00 "........" 0008: 00 53 65 63 - 6F 6E 64 61 ".Seconda" 0010: 72 79 20 49 - 44 45 00 "ry IDE." |
Port Connector: Floppy |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 0012h (18 decimal) ================================================================================ Internal Reference Designator : (none) Internal Connector Type : 17h (On Board Floppy) External Reference Designator : Floppy External Connector Type : 00h (None) Port Type : 00h (None) Dump of the structure (16 bytes): -------------------------------------------------------------------------------- 0000: 08 09 12 00 - 00 17 01 00 "........" 0008: 00 46 6C 6F - 70 70 79 00 ".Floppy." |
Port Connector: Line I/O:MIC |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 0013h (19 decimal) ================================================================================ Internal Reference Designator : (none) Internal Connector Type : FFh (Unknown) External Reference Designator : Line I/O:MIC External Connector Type : 0Dh (Mini-DIN) Port Type : 0Bh (MIDI Port) Dump of the structure (22 bytes): -------------------------------------------------------------------------------- 0000: 08 09 13 00 - 00 FF 01 0D "........" 0008: 0B 4C 69 6E - 65 20 49 2F ".Line I/" 0010: 4F 3A 4D 49 - 43 00 "O:MIC." |
Port Connector: Line I/O:Line Right |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 0014h (20 decimal) ================================================================================ Internal Reference Designator : (none) Internal Connector Type : FFh (Unknown) External Reference Designator : Line I/O:Line Right External Connector Type : 0Dh (Mini-DIN) Port Type : 0Bh (MIDI Port) Dump of the structure (29 bytes): -------------------------------------------------------------------------------- 0000: 08 09 14 00 - 00 FF 01 0D "........" 0008: 0B 4C 69 6E - 65 20 49 2F ".Line I/" 0010: 4F 3A 4C 69 - 6E 65 20 52 "O:Line R" 0018: 69 67 68 74 - 00 "ight." |
Port Connector: Line I/O:Line Left |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 0015h (21 decimal) ================================================================================ Internal Reference Designator : (none) Internal Connector Type : FFh (Unknown) External Reference Designator : Line I/O:Line Left External Connector Type : 0Dh (Mini-DIN) Port Type : 0Bh (MIDI Port) Dump of the structure (28 bytes): -------------------------------------------------------------------------------- 0000: 08 09 15 00 - 00 FF 01 0D "........" 0008: 0B 4C 69 6E - 65 20 49 2F ".Line I/" 0010: 4F 3A 4C 69 - 6E 65 20 4C "O:Line L" 0018: 65 66 74 00 "eft." |
Port Connector: Head Phone |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 0016h (22 decimal) ================================================================================ Internal Reference Designator : (none) Internal Connector Type : FFh (Unknown) External Reference Designator : Head Phone External Connector Type : 0Dh (Mini-DIN) Port Type : 0Bh (MIDI Port) Dump of the structure (20 bytes): -------------------------------------------------------------------------------- 0000: 08 09 16 00 - 00 FF 01 0D "........" 0008: 0B 48 65 61 - 64 20 50 68 ".Head Ph" 0010: 6F 6E 65 00 "one." |
Port Connector: FAN |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 0017h (23 decimal) ================================================================================ Internal Reference Designator : (none) Internal Connector Type : FFh (Unknown) External Reference Designator : FAN External Connector Type : 00h (None) Port Type : FFh (Unknown Port) Dump of the structure (13 bytes): -------------------------------------------------------------------------------- 0000: 08 09 17 00 - 00 FF 01 00 "........" 0008: FF 46 41 4E - 00 ".FAN." |
Port Connector: Speaker |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 0018h (24 decimal) ================================================================================ Internal Reference Designator : (none) Internal Connector Type : FFh (Unknown) External Reference Designator : Speaker External Connector Type : 00h (None) Port Type : FFh (Unknown Port) Dump of the structure (17 bytes): -------------------------------------------------------------------------------- 0000: 08 09 18 00 - 00 FF 01 00 "........" 0008: FF 53 70 65 - 61 6B 65 72 ".Speaker" 0010: 00 "." |
Port Connector: USB |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 0019h (25 decimal) ================================================================================ Internal Reference Designator : (none) Internal Connector Type : 12h (Access Bus) External Reference Designator : USB External Connector Type : 12h (Access Bus) Port Type : 10h (USB) Dump of the structure (13 bytes): -------------------------------------------------------------------------------- 0000: 08 09 19 00 - 00 12 01 12 "........" 0008: 10 55 53 42 - 00 ".USB." |
System Slot: PC CARD-Slot 0 |
|---|
Structure : System Slot (Type 9) Length : 0Dh (13 decimal) bytes Handle : 001Ah (26 decimal) ================================================================================ Slot Designation : PC CARD-Slot 0 Slot Type : 07h (PC Card (PCMCIA)) Slot Data Bus Width : 05h (32 bit) Current Usage : 03h (Available) Slot Length : 03h (Half Length) Slot ID : 00h Slot Characteristics : F6h (Provides 5.0 Volts, Provides 3.3 Volts, PC Card-16, Cardbus, Zoom Video, PC Card Slot support Modem Ring Resume) Slot Characteristics 2 : 01h (Supports PME#) Dump of the structure (28 bytes): -------------------------------------------------------------------------------- 0000: 09 0D 1A 00 - 01 07 05 03 "........" 0008: 03 00 00 F6 - 01 50 43 20 ".....PC " 0010: 43 41 52 44 - 2D 53 6C 6F "CARD-Slo" 0018: 74 20 30 00 "t 0." |
System Slot: PC CARD-Slot 1 |
|---|
Structure : System Slot (Type 9) Length : 0Dh (13 decimal) bytes Handle : 001Bh (27 decimal) ================================================================================ Slot Designation : PC CARD-Slot 1 Slot Type : 07h (PC Card (PCMCIA)) Slot Data Bus Width : 05h (32 bit) Current Usage : 03h (Available) Slot Length : 03h (Half Length) Slot ID : 00h Slot Characteristics : F6h (Provides 5.0 Volts, Provides 3.3 Volts, PC Card-16, Cardbus, Zoom Video, PC Card Slot support Modem Ring Resume) Slot Characteristics 2 : 01h (Supports PME#) Dump of the structure (28 bytes): -------------------------------------------------------------------------------- 0000: 09 0D 1B 00 - 01 07 05 03 "........" 0008: 03 00 01 F6 - 01 50 43 20 ".....PC " 0010: 43 41 52 44 - 2D 53 6C 6F "CARD-Slo" 0018: 74 20 31 00 "t 1." |
On Board Devices |
|---|
Structure : On Board Devices (Type 10) Length : 06h (6 decimal) bytes Handle : 001Ch (28 decimal) ================================================================================ Device Type : 07h (Disabled, Sound) Description String : Ess1978sa PCI Sound Dump of the structure (26 bytes): -------------------------------------------------------------------------------- 0000: 0A 06 1C 00 - 07 01 45 73 "......Es" 0008: 73 31 39 37 - 38 73 61 20 "s1978sa " 0010: 50 43 49 20 - 53 6F 75 6E "PCI Soun" 0018: 64 00 "d." |
OEM Strings |
|---|
Structure : OEM Strings (Type 11) Length : 05h (5 decimal) bytes Handle : 001Dh (29 decimal) ================================================================================ Number of OEM Strings: 2768 0) 'www.compaq.com' Dump of the structure (20 bytes): -------------------------------------------------------------------------------- 0000: 0B 05 1D 00 - 01 77 77 77 ".....www" 0008: 2E 63 6F 6D - 70 61 71 2E ".compaq." 0010: 63 6F 6D 00 "com." |
BIOS Language |
|---|
Structure : BIOS Language (Type 13)
Length : 16h (22 decimal) bytes
Handle : 001Eh (30 decimal)
================================================================================
Current Language : 1, en|US|iso8859-1
Flags : 00h
Number of Installable Languages : 1
1) en|US|iso8859-1
Dump of the structure (38 bytes):
--------------------------------------------------------------------------------
0000: 0D 16 1E 00 - 01 00 00 00 "........"
0008: 00 00 00 00 - 00 00 00 00 "........"
0010: 00 00 00 00 - 00 01 65 6E "......en"
0018: 7C 55 53 7C - 69 73 6F 38 "|US|iso8"
0020: 38 35 39 2D - 31 00 "859-1."
|
Physical Memory Array |
|---|
Structure : Physical Memory Array (Type 16) Length : 0Fh (15 decimal) bytes Handle : 001Fh (31 decimal) ================================================================================ Location : System board or motherboard Use : System memory Memory Error Correction : None Maximum Capacity : 317440 KB Memory Error Information Handle : FFFF Number of Memory Devices : 3 Dump of the structure (16 bytes): -------------------------------------------------------------------------------- 0000: 10 0F 1F 00 - 03 03 03 00 "........" 0008: D8 04 00 FF - FF 03 00 00 "........" |
Physical Memory Array |
|---|
Structure : Physical Memory Array (Type 16) Length : 0Fh (15 decimal) bytes Handle : 0020h (32 decimal) ================================================================================ Location : System board or motherboard Use : Flash memory Memory Error Correction : None Maximum Capacity : 512 KB Memory Error Information Handle : FFFE Number of Memory Devices : 1 Dump of the structure (16 bytes): -------------------------------------------------------------------------------- 0000: 10 0F 20 00 - 03 05 03 00 ".. ....." 0008: 02 00 00 FE - FF 01 00 00 "........" |
Memory Device: DIMM #1 |
|---|
Structure : Memory Device (Type 17) Length : 1Bh (27 decimal) bytes Handle : 0021h (33 decimal) ================================================================================ Memory Array Handle : 001F Memory Error Information Handle : FFFF Total Width : 64bits Data Width : 64bits Size : 64MB Form Factor : Other Device Set : 0000h Device Locator : DIMM #1 Bank Locator : (none) Memory Type : DRAM Type Detail : 0080h Speed : UnknownManufacturer : (none) Serial Number : (none) Asset Tag : (none) Part Number : (none) Dump of the structure (35 bytes): -------------------------------------------------------------------------------- 0000: 11 1B 21 00 - 1F 00 FF FF "..!....." 0008: 40 00 40 00 - 40 00 01 00 "@.@.@..." 0010: 01 00 03 80 - 00 00 00 00 "........" 0018: 00 00 00 44 - 49 4D 4D 20 "...DIMM " 0020: 23 31 00 "#1." |
Memory Device: DIMM #2 |
|---|
Structure : Memory Device (Type 17) Length : 1Bh (27 decimal) bytes Handle : 0022h (34 decimal) ================================================================================ Memory Array Handle : 001F Memory Error Information Handle : FFFF Total Width : Unknown Data Width : Unknown Size : 0MB (No Memory Device) Form Factor : Other Device Set : 0000h Device Locator : DIMM #2 Bank Locator : (none) Memory Type : DRAM Type Detail : 0080h Speed : UnknownManufacturer : (none) Serial Number : (none) Asset Tag : (none) Part Number : (none) Dump of the structure (35 bytes): -------------------------------------------------------------------------------- 0000: 11 1B 22 00 - 1F 00 FF FF ".."....." 0008: FF FF FF FF - 00 00 01 00 "........" 0010: 01 00 03 80 - 00 00 00 00 "........" 0018: 00 00 00 44 - 49 4D 4D 20 "...DIMM " 0020: 23 32 00 "#2." |
Memory Device: DIMM #3 |
|---|
Structure : Memory Device (Type 17) Length : 1Bh (27 decimal) bytes Handle : 0023h (35 decimal) ================================================================================ Memory Array Handle : 001F Memory Error Information Handle : FFFF Total Width : Unknown Data Width : Unknown Size : 0MB (No Memory Device) Form Factor : Other Device Set : 0000h Device Locator : DIMM #3 Bank Locator : (none) Memory Type : DRAM Type Detail : 0080h Speed : UnknownManufacturer : (none) Serial Number : (none) Asset Tag : (none) Part Number : (none) Dump of the structure (35 bytes): -------------------------------------------------------------------------------- 0000: 11 1B 23 00 - 1F 00 FF FF "..#....." 0008: FF FF FF FF - 00 00 01 00 "........" 0010: 01 00 03 80 - 00 00 00 00 "........" 0018: 00 00 00 44 - 49 4D 4D 20 "...DIMM " 0020: 23 33 00 "#3." |
Memory Device: 28F004 |
|---|
Structure : Memory Device (Type 17) Length : 1Bh (27 decimal) bytes Handle : 0024h (36 decimal) ================================================================================ Memory Array Handle : 0020 Memory Error Information Handle : FFFE Total Width : 8bits Data Width : 8bits Size : -32256KB Form Factor : Chip Device Set : 0000h Device Locator : 28F004 Bank Locator : (none) Memory Type : FLASH Type Detail : 1000h Speed : UnknownManufacturer : (none) Serial Number : (none) Asset Tag : (none) Part Number : (none) Dump of the structure (34 bytes): -------------------------------------------------------------------------------- 0000: 11 1B 24 00 - 20 00 FE FF "..$. ..." 0008: 08 00 08 00 - 00 82 05 00 "........" 0010: 01 00 09 00 - 10 00 00 00 "........" 0018: 00 00 00 32 - 38 46 30 30 "...28F00" 0020: 34 00 "4." |
Memory Array Mapped Address |
|---|
Structure : Memory Array Mapped Address (Type 19) Length : 0Fh (15 decimal) bytes Handle : 0026h (38 decimal) ================================================================================ Starting Address : 00000000h Ending Address : 03FFFFFFh Memory Array Handle : 001Fh Partition Width : 01h Dump of the structure (16 bytes): -------------------------------------------------------------------------------- 0000: 13 0F 26 00 - 00 00 00 00 "..&....." 0008: FF FF FF 03 - 1F 00 01 00 "........" |
Memory Array Mapped Address |
|---|
Structure : Memory Array Mapped Address (Type 19) Length : 0Fh (15 decimal) bytes Handle : 0027h (39 decimal) ================================================================================ Starting Address : FFFFD000h Ending Address : FFFFFFFFh Memory Array Handle : 0020h Partition Width : 01h Dump of the structure (16 bytes): -------------------------------------------------------------------------------- 0000: 13 0F 27 00 - 00 D0 FF FF "..'....." 0008: FF FF FF FF - 20 00 01 00 ".... ..." |
Memory Device Mapped Address |
|---|
Structure : Memory Device Mapped Address (Type 20) Length : 13h (19 decimal) bytes Handle : 0028h (40 decimal) ================================================================================ Starting Address : 00000000h Ending Address : 03FFFFFFh Memory Device Handle : 0021h Memory Array Mapped Address Handle : 0026h Partition Row Position : 01h Interleave Position : 00h Interleaved Data Depth : 00h Dump of the structure (20 bytes): -------------------------------------------------------------------------------- 0000: 14 13 28 00 - 00 00 00 00 "..(....." 0008: FF FF FF 03 - 21 00 26 00 "....!.&." 0010: 01 00 00 00 "...." |
Memory Device Mapped Address |
|---|
Structure : Memory Device Mapped Address (Type 20) Length : 13h (19 decimal) bytes Handle : 0029h (41 decimal) ================================================================================ Starting Address : 00000000h Ending Address : 00000000h Memory Device Handle : 0022h Memory Array Mapped Address Handle : 0026h Partition Row Position : 02h Interleave Position : 00h Interleaved Data Depth : 00h Dump of the structure (20 bytes): -------------------------------------------------------------------------------- 0000: 14 13 29 00 - 00 00 00 00 "..)....." 0008: 00 00 00 00 - 22 00 26 00 "....".&." 0010: 02 00 00 00 "...." |
Memory Device Mapped Address |
|---|
Structure : Memory Device Mapped Address (Type 20) Length : 13h (19 decimal) bytes Handle : 002Ah (42 decimal) ================================================================================ Starting Address : 00000000h Ending Address : 00000000h Memory Device Handle : 0023h Memory Array Mapped Address Handle : 0026h Partition Row Position : 03h Interleave Position : 00h Interleaved Data Depth : 00h Dump of the structure (20 bytes): -------------------------------------------------------------------------------- 0000: 14 13 2A 00 - 00 00 00 00 "..*....." 0008: 00 00 00 00 - 23 00 26 00 "....#.&." 0010: 03 00 00 00 "...." |
Memory Device Mapped Address |
|---|
Structure : Memory Device Mapped Address (Type 20) Length : 13h (19 decimal) bytes Handle : 002Bh (43 decimal) ================================================================================ Starting Address : FFFFD000h Ending Address : FFFFFFFFh Memory Device Handle : 0024h Memory Array Mapped Address Handle : 0027h Partition Row Position : 00h Interleave Position : 00h Interleaved Data Depth : 00h Dump of the structure (20 bytes): -------------------------------------------------------------------------------- 0000: 14 13 2B 00 - 00 D0 FF FF "..+....." 0008: FF FF FF FF - 24 00 27 00 "....$.'." 0010: 00 00 00 00 "...." |
Built-in Pointing Device |
|---|
Structure : Built-in Pointing Device (Type 21) Length : 07h (7 decimal) bytes Handle : 002Ch (44 decimal) ================================================================================ Type : 06h Interface : 04h Number of Buttons : 02h Dump of the structure (8 bytes): -------------------------------------------------------------------------------- 0000: 15 07 2C 00 - 06 04 02 00 "..,....." |
Portable Battery |
|---|
Structure : Portable Battery (Type 22) Length : 1Ah (26 decimal) bytes Handle : 002Dh (45 decimal) ================================================================================ Location : Left Hand Side Manufacturer : Compaq Manufacture Date : 08/01/1999 Serial Number : 424EF11B0002 Device Name : (none) Device Chemistry : 06h Design Capacity : 2700 mWatt-hours Design Voltage : 14400 mVolts SBDS* Version Number : (none) Maximum Error in Battery Data : FFh SBDS* Serial Number : 0000h SBDS* Manufacture Date (M/D/Y): 00/00/1980 SBDS* Device Chemistry : (none) Design Capacity Multiplier : x1 OEM Specific : 00000000h * Smart Battery Data Specification Dump of the structure (72 bytes): -------------------------------------------------------------------------------- 0000: 16 1A 2D 00 - 01 02 03 04 "..-....." 0008: 00 06 8C 0A - 40 38 00 FF "....@8.." 0010: 00 00 00 00 - 00 01 00 00 "........" 0018: 00 00 4C 65 - 66 74 20 48 "..Left H" 0020: 61 6E 64 20 - 53 69 64 65 "and Side" 0028: 00 43 6F 6D - 70 61 71 00 ".Compaq." 0030: 30 38 2F 30 - 31 2F 31 39 "08/01/19" 0038: 39 39 00 34 - 32 34 45 46 "99.424EF" 0040: 31 31 42 30 - 30 30 32 00 "11B0002." |
Inactive |
|---|
Structure : Inactive (Type 126) Length : 1Ah (26 decimal) bytes Handle : 002Eh (46 decimal) ================================================================================ Dump of the structure (74 bytes): -------------------------------------------------------------------------------- 0000: 7E 1A 2E 00 - 01 02 03 04 "~......." 0008: 00 06 8C 0A - 40 38 00 FF "....@8.." 0010: 00 00 00 00 - 00 01 00 00 "........" 0018: 00 00 46 72 - 6F 6E 74 20 "..Front " 0020: 52 69 67 68 - 74 20 53 69 "Right Si" 0028: 64 65 00 43 - 6F 6D 70 61 "de.Compa" 0030: 71 00 20 20 - 20 20 20 20 "q. " 0038: 20 20 20 20 - 00 20 20 20 " . " 0040: 20 20 20 20 - 20 20 20 20 " " 0048: 20 00 " ." |
Hardware Security |
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Structure : Hardware Security (Type 24) Length : 05h (5 decimal) bytes Handle : 0031h (49 decimal) ================================================================================ Power-on Password Status : 00h (Disabled) Keyboard Password Status : 00h (Disabled) Administrator Password Status : 00h (Disabled) Front Panel Reset Status : 02h (Not Implemented) Dump of the structure (6 bytes): -------------------------------------------------------------------------------- 0000: 18 05 31 00 - 02 00 "..1..." |
Temperature Probe |
|---|
Structure : Temperature Probe (Type 28) Length : 14h (20 decimal) bytes Handle : 0032h (50 decimal) ================================================================================ Description : (none) Status : OK Location : Processor Maximum Value : 100.0°C Minimum Value : 0.0°C Resolution : Unknown Tolerance : Unknown Accuracy : Unknown OEM-defined : 00000000h Dump of the structure (21 bytes): -------------------------------------------------------------------------------- 0000: 1C 14 32 00 - 00 63 E8 03 "..2..c.." 0008: 00 00 00 80 - 00 80 00 80 "........" 0010: 00 00 00 00 - 00 "....." |
Temperature Probe |
|---|
Structure : Temperature Probe (Type 28) Length : 14h (20 decimal) bytes Handle : 0033h (51 decimal) ================================================================================ Description : (none) Status : OK Location : Add-in Card Maximum Value : 100.0°C Minimum Value : 0.0°C Resolution : Unknown Tolerance : Unknown Accuracy : Unknown OEM-defined : 00000000h Dump of the structure (21 bytes): -------------------------------------------------------------------------------- 0000: 1C 14 33 00 - 00 6B E8 03 "..3..k.." 0008: 00 00 00 80 - 00 80 00 80 "........" 0010: 00 00 00 00 - 00 "....." |
Inactive |
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Structure : Inactive (Type 126) Length : 0Dh (13 decimal) bytes Handle : 0036h (54 decimal) ================================================================================ Dump of the structure (54 bytes): -------------------------------------------------------------------------------- 0000: 7E 0D 36 00 - 01 8C 00 02 "~.6....." 0008: 03 03 03 03 - 05 43 6F 6D ".....Com" 0010: 70 61 71 00 - 20 20 20 20 "paq. " 0018: 20 20 20 20 - 20 20 20 20 " " 0020: 20 20 20 20 - 00 20 20 20 " . " 0028: 20 20 20 20 - 20 20 20 20 " " 0030: 20 20 20 20 - 20 00 " ." |
Inactive |
|---|
Structure : Inactive (Type 126) Length : 0Dh (13 decimal) bytes Handle : 0037h (55 decimal) ================================================================================ Dump of the structure (21 bytes): -------------------------------------------------------------------------------- 0000: 7E 0D 37 00 - 01 07 05 03 "~.7....." 0008: 03 00 00 F6 - 00 50 43 20 ".....PC " 0010: 43 41 52 44 - 00 "CARD." |
Inactive |
|---|
Structure : Inactive (Type 126) Length : 0Dh (13 decimal) bytes Handle : 0038h (56 decimal) ================================================================================ Dump of the structure (21 bytes): -------------------------------------------------------------------------------- 0000: 7E 0D 38 00 - 01 07 05 03 "~.8....." 0008: 03 00 01 F6 - 00 50 43 20 ".....PC " 0010: 43 41 52 44 - 00 "CARD." |
Inactive |
|---|
Structure : Inactive (Type 126) Length : 0Dh (13 decimal) bytes Handle : 0039h (57 decimal) ================================================================================ Dump of the structure (24 bytes): -------------------------------------------------------------------------------- 0000: 7E 0D 39 00 - 01 06 05 03 "~.9....." 0008: 03 0B 00 02 - 00 50 43 49 ".....PCI" 0010: 20 53 6C 6F - 74 20 31 00 " Slot 1." |
Inactive |
|---|
Structure : Inactive (Type 126) Length : 0Dh (13 decimal) bytes Handle : 003Ah (58 decimal) ================================================================================ Dump of the structure (24 bytes): -------------------------------------------------------------------------------- 0000: 7E 0D 3A 00 - 01 06 05 03 "~.:....." 0008: 03 0C 00 02 - 00 50 43 49 ".....PCI" 0010: 20 53 6C 6F - 74 20 32 00 " Slot 2." |
Inactive |
|---|
Structure : Inactive (Type 126) Length : 0Dh (13 decimal) bytes Handle : 003Bh (59 decimal) ================================================================================ Dump of the structure (24 bytes): -------------------------------------------------------------------------------- 0000: 7E 0D 3B 00 - 01 03 04 03 "~.;....." 0008: 03 00 00 02 - 00 49 53 41 ".....ISA" 0010: 20 53 6C 6F - 74 20 31 00 " Slot 1." |
Inactive |
|---|
Structure : Inactive (Type 126) Length : 0Dh (13 decimal) bytes Handle : 003Ch (60 decimal) ================================================================================ Dump of the structure (24 bytes): -------------------------------------------------------------------------------- 0000: 7E 0D 3C 00 - 01 03 04 03 "~.<....." 0008: 03 00 00 02 - 00 49 53 41 ".....ISA" 0010: 20 53 6C 6F - 74 20 32 00 " Slot 2." |
Inactive |
|---|
Structure : Inactive (Type 126) Length : 1Ah (26 decimal) bytes Handle : 002Fh (47 decimal) ================================================================================ Dump of the structure (86 bytes): -------------------------------------------------------------------------------- 0000: 7E 1A 2F 00 - 01 02 03 04 "~./....." 0008: 00 06 8C 0A - 40 38 00 FF "....@8.." 0010: 00 00 00 00 - 00 01 00 00 "........" 0018: 00 00 44 6F - 63 6B 69 6E "..Dockin" 0020: 67 20 53 74 - 61 74 69 6F "g Statio" 0028: 6E 20 2D 20 - 52 69 67 68 "n - Righ" 0030: 74 20 53 69 - 64 65 00 43 "t Side.C" 0038: 6F 6D 70 61 - 71 00 20 20 "ompaq. " 0040: 20 20 20 20 - 20 20 20 20 " " 0048: 00 20 20 20 - 20 20 20 20 ". " 0050: 20 20 20 20 - 20 00 " ." |
Inactive |
|---|
Structure : Inactive (Type 126) Length : 1Ah (26 decimal) bytes Handle : 0030h (48 decimal) ================================================================================ Dump of the structure (85 bytes): -------------------------------------------------------------------------------- 0000: 7E 1A 30 00 - 01 02 03 04 "~.0....." 0008: 00 06 8C 0A - 40 38 00 FF "....@8.." 0010: 00 00 00 00 - 00 01 00 00 "........" 0018: 00 00 44 6F - 63 6B 69 6E "..Dockin" 0020: 67 20 53 74 - 61 74 69 6F "g Statio" 0028: 6E 20 2D 20 - 4C 65 66 74 "n - Left" 0030: 20 53 69 64 - 65 00 43 6F " Side.Co" 0038: 6D 70 61 71 - 00 20 20 20 "mpaq. " 0040: 20 20 20 20 - 20 20 20 00 " ." 0048: 20 20 20 20 - 20 20 20 20 " " 0050: 20 20 20 20 - 00 " ." |
End-of-Table |
|---|
Structure : End-of-Table (Type 127) Length : 04h (4 decimal) bytes Handle : 0035h (53 decimal) ================================================================================ Dump of the structure (5 bytes): -------------------------------------------------------------------------------- 0000: 7F 04 35 00 - 00 "..5.." |
Hard disk(s) |
|---|
BIOS Reported 1 hard disk(s) ================================================================================ Alias Cylinders Heads Sectors Size(MB) -------------------------------------------------------------------------------- Hard disk 0 13424 15 63 6194.18 |
Hard disk 0 |
|---|
Hard Disk 0 Info Via INT 13
================================================================================
BIOS Number of Cylinders : 838
BIOS Number of Heads : 240
BIOS Number of Sectors : 63
Hard Disk Capacity : 6487.33 MB (1KB = 1000 bytes)
: 6186.80 MB (1KB = 1024 bytes)
(From Standard INT 13)
: 6495.01 MB (1KB = 1000 bytes)
: 6194.18 MB (1KB = 1024 bytes)
(From INT 13 Extension BIOS)
Notes:
1. Warning: BIOS Parameters May Be Unreliable
Due To Limitations of PC Architecture.
2. Historically, Hard Disk Manufacturers Calculating
Volume Make 1KB Equal 1000 Bytes.
INT 13h Fixed Disk Extensions Present.
Major Version : 16h
Extended Drive Parameter Table
--------------------------------------------------------------------------------
Total Number of Addressable Cylinders : 13424
Total Number of Addressable Heads : 15
Number of Sectors Per Track : 63
Total Number of Addressable Sectors : 012685680
Number of Bytes Per Sector : 512
Information Flags : 10
--------------------------------------------------------------------------------
The Heads and Sectors Values Are Valid
Drive Support Write With Verify
Partition Table Information
--------------------------------------------------------------------------------
Entry 0
-------
Partition Status : 80h (Active)
Partition Type : 06h (Big DOS (16-bit FAT, over 32M))
Start Head : 1
Start Sector : 1
Start Cylinder : 0
End Head : 239
End Sector : 63
End Cylinder : 276
First Sector (LBA type) : 63
Total Number of Sectors : 4188177 (2045.0 MB)
Entry 1
-------
Partition Status : 00h (Not active)
Partition Type : 0Fh (logical-block-addressable VFAT (same as 05h but using LBA-mode INT 13))
Start Head : 0
Start Sector : 1
Start Cylinder : 277
End Head : 239
End Sector : 63
End Cylinder : 838
First Sector (LBA type) : 4188240
Total Number of Sectors : 8497440 (4149.141 MB)
Entry 2
-------
Partition Status : 00h (Not active)
Partition Type : 00h (empty)
Start Head : 0
Start Sector : 0
Start Cylinder : 0
End Head : 0
End Sector : 0
End Cylinder : 0
First Sector (LBA type) : 0
Total Number of Sectors : 0 (0.0 MB)
Entry 3
-------
Partition Status : 00h (Not active)
Partition Type : 00h (empty)
Start Head : 0
Start Sector : 0
Start Cylinder : 0
End Head : 0
End Sector : 0
End Cylinder : 0
First Sector (LBA type) : 0
Total Number of Sectors : 0 (0.0 MB)
|
Hard disk 0 Tests Folder |
|---|
Controller test |
|---|
Not Tested |
Linear test |
|---|
Not Tested |
Random test |
|---|
Not Tested |
Butterfly test |
|---|
Not Tested |
Seek test |
|---|
Not Tested |
HDD Benchmark |
|---|
Not Tested |
Memory |
|---|
Memory ================================================================================ Size : 65472 KB (63 MB) System Memory Map Reported by BIOS via INT 0x15 Function 0xE820 --------------------------------------------------------------- Base Address | Length | Type --------------------------------------------------------------- 00000000h 0009FC00h ( 639 KB) 01 (Memory, available to OS) 0009FC00h 00000400h ( 1 KB) 02 (Reserved, not available) 000F0000h 00010000h ( 64 KB) 02 (Reserved, not available) 00100000h 03EF0000h ( 62.9 MB) 01 (Memory, available to OS) 03FF0000h 00003800h ( 14 KB) 02 (Reserved, not available) 03FF3800h 0000C800h ( 50 KB) 04 (ACPI NVS Memory (OS is required to save this memory between NVS sessions)) Memory SPD information ----------------------------------------------------------------- Bank Type EDCS* Frequency Row Density JEDEC Id ----------------------------------------------------------------- 0 SDRAM None 100MHz 32MB FF *EDCS - Error detect/correct scheme Memory module information reported by DMI: ----------------------------------------------------------------- Socket Speed Size Enabled Type ----------------------------------------------------------------- ROM Shadowing -------------------------------------------------------------------------------- 0C0000h - 0C3FFFh Shadow : enabled 0C4000h - 0C7FFFh Shadow : enabled 0C8000h - 0CBFFFh Shadow : enabled 0CC000h - 0CFFFFh Shadow : enabled 0D0000h - 0D3FFFh Shadow : disabled 0D4000h - 0D7FFFh Shadow : disabled 0D8000h - 0DBFFFh Shadow : disabled 0DC000h - 0DFFFFh Shadow : disabled 0E0000h - 0E3FFFh Shadow : disabled 0E4000h - 0E7FFFh Shadow : disabled 0E8000h - 0EBFFFh Shadow : disabled 0EC000h - 0EFFFFh Shadow : disabled 0F0000h - 0FFFFFh Shadow : enabled |
Memory Tests Folder |
|---|
Memory Benchmark |
|---|
Not Tested |
Snake On |
|---|
Not Tested |
Snake Off |
|---|
Not Tested |
Parity |
|---|
Not Tested |
Inv. Parity |
|---|
Not Tested |
Checkerboard |
|---|
Not Tested |
Inv. Checkerboard |
|---|
Not Tested |
Bit Walk Left |
|---|
Not Tested |
Inv. Bit Walk Left |
|---|
Not Tested |
Bit Walk Right |
|---|
Not Tested |
Inv. Bit Walk Right |
|---|
Not Tested |
March |
|---|
Not Tested |
Random |
|---|
Not Tested |
Jump In |
|---|
Not Tested |
Jump Out |
|---|
Not Tested |
Address Line |
|---|
Not Tested |
Data Bus |
|---|
Not Tested |
Column Test |
|---|
Not Tested |
Row Test |
|---|
Not Tested |
Serial Ports |
|---|
List of Detected Serial Ports ================================================================================ UART chip type Base IRQ Name Location -------------------------------------------------------------------------------- 16550A/AF/C/CF 03F8H 4 COM1 Motherboard 16550A/AF/C/CF 03E8H 3 COM3 Motherboard Dump of BIOS Data Area at 0040:0000H -------------------------------------------------------------------------------- 0040:0000 F8 03 00 00 E8 03 00 00 "........" |
COM1 |
|---|
16550A-compatible COM port ================================================================================ Location : Motherboard I/O Base Address : 03F8H BIOS Name : COM1 IRQ Channel : 4 UART Chip Type : 16550A/AF/C/CF |
COM1 Tests Folder |
|---|
Internal Loopback Test |
|---|
Not Tested |
External Loopback Test |
|---|
Not Tested |
UART Registers Test |
|---|
Not Tested |
COM3 |
|---|
SMC IrCC (Infrared Communications Controller) ================================================================================ Location : Motherboard I/O Base Address : 03E8H BIOS Name : COM3 IRQ Channel : 3 UART Chip Type : 16550A/AF/C/CF |
COM3 Tests Folder |
|---|
Internal Loopback Test |
|---|
Not Tested |
External Loopback Test |
|---|
Not Tested |
UART Registers Test |
|---|
Not Tested |
Sound |
|---|
Audio Device(s) Found : ================================================================================ 1. ES1978 Maestro Audiodrive 2. PC Speaker |
ES1978 Maestro Audiodrive |
|---|
ES1978 Maestro Audiodrive ================================================================================ Location : PCI Device on Motherboard Vendor Id : 125Dh (ESS Technology) Device Id : 1978h (ES1978 Maestro Audiodrive) Class : 01h (Audio Device) Sub Vendor Id : 0E11h (Compaq) Sub Device Id : B112h (info unavailable) SoundBlaster compatible DSP -------------------------------------------------------------------------------- DSP Version : 3.2 Base I/O Address : 220H I/O Range Length : 16 IRQ Channel : 5 DMA Channel : 1 MPU401 compatible device (MIDI) -------------------------------------------------------------------------------- Base I/O Address : 330H I/O Range Length : 2 Adlib compatible synthesizer -------------------------------------------------------------------------------- Type of FM chip : Two-operator FM chip (OPL2) Base I/O Address : 388H Base I/O Address : 220H Base I/O Address : 228H I/O Range Length : 2 |
ES1978 Maestro Audiodrive Tests Folder |
|---|
Sound Blaster DSP test |
|---|
Not Tested |
AdLib FM chip test |
|---|
Not Tested |
Sound Blaster DSP test |
|---|
Not Tested |
Option ROM(s) |
|---|
Option ROM(s) Found: 1 ================================================================================ Option ROM at C0000h - ATI Technologies Rage 3D LT Pro PCI (BGA-312 Package) |
Option ROM at C0000h |
|---|
Option ROM
================================================================================
Location : C0000h
Length : 65536 bytes (64.0 kB)
Boot initialization vector : EB 7B BD B2 (JMP SHORT C0080h)
Entry point of boot procedure : C0080h
Offset of PCI DATA structure : 0164h (valid)
PCI Expansion ROM Image Data Structure at C0164h
--------------------------------------------------------------------------------
PCI data structure signature : PCIR
PCI device vendor ID : 1002 (ATI Technologies)
PCI device ID : 4C49 (Rage 3D LT Pro PCI (BGA-312 Package))
Length of PCI data structure : 24 bytes
Structure revision : 0.0
PCI device class : 03 00 00 (VGA Compatible Controller)
Length of PCI expansion ROM : 61440 bytes (60.0 kB)
Code/Data revision level : 4.B8
Device is Intel x86 compliant : Yes
Option ROM first 256 bytes dump
--------------------------------------------------------------------------------
0000: 55 AA 80 EB - 7B BD B2 00 - 00 00 00 00 "U...{......."
000C: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
0018: 64 01 00 00 - 00 00 49 42 - 4D 00 4A EC "d.....IBM.J."
0024: 01 13 B2 08 - 00 00 00 00 - 00 00 00 00 "............"
0030: 20 37 36 31 - 32 39 35 35 - 32 30 FF FF " 761295520.."
003C: DF 9B 0E 39 - 33 3F 00 50 - 00 00 00 00 "...93?.P...."
0048: 08 01 00 00 - 00 00 00 00 - 32 30 30 31 "........2001"
0054: 2F 30 32 2F - 31 32 20 31 - 31 3A 30 30 "/02/12 11:00"
0060: 00 00 00 00 - E9 94 56 00 - E9 89 56 00 "......V...V."
006C: E9 87 14 00 - E9 84 14 00 - 43 50 51 4D "........CPQM"
0078: 7C 01 FF FF - DF 9B 0E 39 - E9 27 01 0D "|......9.'.."
0084: 0A 41 54 49 - 20 4D 41 43 - 48 36 34 20 ".ATI MACH64 "
0090: 53 47 52 41 - 4D 20 42 49 - 4F 53 20 34 "SGRAM BIOS 4"
009C: 2E 31 38 34 - 54 28 50 36 - 30 29 2D 64 ".184T(P60)-d"
00A8: 0D 0A 00 28 - 43 29 20 31 - 39 38 38 2D "...(C) 1988-"
00B4: 39 39 2C 20 - 41 54 49 20 - 54 65 63 68 "99, ATI Tech"
00C0: 6E 6F 6C 6F - 67 69 65 73 - 20 49 6E 63 "nologies Inc"
00CC: 2E 42 4B 34 - 2E 31 2E 33 - 2F 34 2E 31 ".BK4.1.3/4.1"
00D8: 38 34 54 28 - 50 36 30 29 - 2D 64 20 6C "84T(P60)-d l"
00E4: 70 67 64 70 - 34 63 2E 70 - 36 30 20 36 "pgdp4c.p60 6"
00F0: 20 00 4D 41 - 43 48 36 34 - 4C 49 50 43 " .MACH64LIPC"
00FC: 49 4D 54 53 "IMTS"
|
Modems |
|---|
Modem(s) Found: ================================================================================ 1. 56k V.90 Modem |
56k V.90 Modem |
|---|
PCI Modem ================================================================================ Vendor Id : 11C1h (AT&T Microelectronics (Lucent)) Device Id : 0449h (LT WinModem 56k) Class : 80h (Other communications device) Sub Vendor Id : 0E11h (Compaq) Sub Device Id : B14Dh (56k V.90 Modem) Location : PCI Device on Motherboard |
Mice |
|---|
Mouse Found : 1 ================================================================================ 1. PS/2 Mouse |
PS/2 Mouse |
|---|
PS/2 Mouse ================================================================================ Mouse Type : PS/2 Mouse Mouse Name : Microsoft IntelliMouse Buttons : 3 - Buttons Mouse IRQ Channel : 12 |
PS/2 Mouse Tests Folder |
|---|
Mouse interactive test |
|---|
Not Tested |
Parallel Ports |
|---|
List of Detected Parallel Ports ================================================================================ Port Type Base IRQ DMA Name Notes -------------------------------------------------------------------------------- Standard 0378H 7 - LPT1 Motherboard integrated Dump of BIOS Data Area at 0040:0008H -------------------------------------------------------------------------------- 0040:0008 78 03 00 00 00 00 "x....." |
LPT1 |
|---|
PnP Parallel Port at I/O Address 0378H ================================================================================ Location : Motherboard BIOS Name : LPT1 Device Name : ECP printer port IRQ Channel : 7 Current Port Mode : Standard Parallel Port Mode List of Supported Modes -------------------------------------------------------------------------------- Standard Parallel Port Mode Bi-Directional (PS/2 Port) Mode Nibble Mode |
LPT1 Tests Folder |
|---|
Internal test |
|---|
Not Tested |
Standard loopback test |
|---|
Not Tested |
Data output test |
|---|
Not Tested |
Data input test |
|---|
Not Tested |
EPP transfer test |
|---|
Not Tested |
ECP transfer test |
|---|
Not Tested |
Y2K Compliance |
|---|
Y2K Compliance Tests Folder |
|---|
Y2K Compliance test |
|---|
Not Tested |
ISA Bus |
|---|
ISA (Interconnect Standard Architecture) ================================================================================ Number of I/O address lines : 16 I/O space size : 64 Kb Note: ISA bus speed is limited to 8.33 Mhz |
ISA Bus Tests Folder |
|---|
Scan I/O space |
|---|
Not Tested |
MPEG |
|---|
No MPEG Device Found or MPEG Device is not Configured |
PC Speaker |
|---|
PC Speaker ================================================================================ I/O address : 0061H |
PC Speaker Tests Folder |
|---|
PC Speaker test |
|---|
Not Tested |
USB |
|---|
USB Controller(s) Found: 1 |
USB Host Controller |
|---|
Universal Serial Bus controller following the UHCI (Universal Host Controller Specification) ================================================================================ I/O Space Base Address: 3C00H Serial Bus Release Number: 1.0 |
USB Host Controller Tests Folder |
|---|
Host controller test |
|---|
Not Tested |
Control transfer LED test |
|---|
Not Tested |
Bulk transfer test |
|---|
Not Tested |
Isochronous transfer test |
|---|
Not Tested |
Interrupt transfer test |
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Not Tested |
SCSI |
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No SCSI Adapter Found or SCSI Adapter is not Configured |
Cache |
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Cache Level(s) Found: ================================================================================ Level Size -------------------------------------------------------------------------------- L1 32 L2 256 |
Cache Tests Folder |
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Cache test |
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Not Tested |
L1 Cache |
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L1 Cache ================================================================================ Data Cache Size : 16 KB Instruction Cache Size : 16 KB Cache Socketed : Not Socketed Cache Type : Write-back |
L2 Cache |
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L2 Cache ================================================================================ Data Cache Size : 256 KB Cache Speed : 22 ns Cache Socketed : Not Socketed |
Super I/O |
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Chipset |
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Intel(R) 440BX AGPset ================================================================================ The Intel 440BX AGPset includes: 82443BX Host Bridge South Bridge 82443BX functions and capabilities include: * 64-bit system (host) bus interface * 32-bit host address support * 64-bit main memory interface * 32-bit primary PCI bus interface with integrated PCI arbiter South Bridge functions and capabilities include: Chipset General Features ================================================================================ Host Interface -------------------------------------------------------------------------------- Host Frequency : Unknown WSC# handshake mechanism : disabled AGP Interface -------------------------------------------------------------------------------- The AGP interface and the clocks of AGP associated logic are permanently disabled Power Managment -------------------------------------------------------------------------------- SDRAM Power Down: : enabled ACPI Control Register : enabled Suspend Refresh Type : CBR fresh mode Normal Refresh : enabled Quick Start Mode : enabled Gated Clock Enable : enabled CPU Reset without PCIRST# : disabled SMM Space Location : A0000h-BFFFFh DRAM Interface -------------------------------------------------------------------------------- Total memory : 64 Mb DRAM type : SDRAM DRAM Frequency : Unknown DRAM Refresh rate : 15.6 us DRAM Data Integrity Mode : Non-ECC (Byte-Wise Writes supported) DRAM Idle Timer : 16 CLK SDRAM CAS Latency : 3 DCLK SDRAM RAS to CAS Delay : 2 DCLK SDRAM RAS Precharge Time : 2 DCLK -------------------------------------------------------------------------------- DIMM Location 168-pin DIMM -------------------------------------------------------------------------------- Socket 1 (Rows 0&1) Empty Socket 2 (Rows 2&3) 064 MB double-sided Socket 3 (Rows 4&5) Empty CKE operation ------------- 3 DIMM CKE[5:0] driven self-refresh entry staggered. SDRAM dynamic power down available. Legacy Memory Segments Attributes +------------+----------+-----------+-----------+ | Region | Readable | Writeable | Cacheable | +------------+----------+-----------+-----------+ |C000 - C3FF | Yes | No | No | |C400 - C7FF | Yes | No | No | |C800 - CBFF | Yes | No | No | |CC00 - CFFF | Yes | No | No | |D000 - D3FF | No | No | No | |D400 - D7FF | No | No | No | |D800 - DBFF | No | No | No | |DC00 - DFFF | No | No | No | |E000 - E3FF | No | No | No | |E400 - E7FF | No | No | No | |E800 - EBFF | No | No | No | |EC00 - EFFF | No | No | No | |F000 - FFFF | Yes | No | No | +------------+----------+-----------+-----------+ Note: Read-only regions are shadowed in main memory |
Resource Maps |
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IRQ map |
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IRQ map ================================================================================ IRQ PIC Status Used by -------------------------------------------------------------------------------- 00 not masked AT Timer 01 not masked IBM Enhanced keyboard controller (101/2-key) 02 not masked AT Interrupt Controller 03 masked SMC IrCC (Infrared Communications Controller) 04 masked 16550A-compatible COM port 05 masked ES1978 Maestro Audiodrive (PCI Bus 00,INTA#,Link value:62h) 06 not masked PC standard floppy disk controller 07 masked ECP printer port 08 masked AT Real-Time Clock 09 not masked Not used 10 masked Not used 11 masked 82371AB/EB PIIX4 USB Controller (PCI Bus 00,INTD#,Link value:63h) 11 masked LT WinModem 56k (PCI Bus 00,INTA#,Link value:62h) 11 masked ES1978 Maestro Audiodrive (PCI Bus 00,INTA#,Link value:62h) 11 masked Rage 3D LT Pro PCI (BGA-312 Package) (PCI Bus 00,INTA#,Link value:60h) 12 not masked PS/2 Port for PS/2-style Mice 13 not masked Math Coprocessor 14 not masked 82371AB/EB PIIX4 EIDE Controller 15 not masked 82371AB/EB PIIX4 EIDE Controller |
DMA map |
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DMA map ================================================================================ Channel Width Type Used by -------------------------------------------------------------------------------- 00 8 bit Normal Not used 01 8 bit DDMA AT DMA Controller 02 8 bit Normal PC standard floppy disk controller 03 8 bit Normal ECP printer port 04 16 bit Normal AT DMA Controller 05 16 bit Normal SMC IrCC (Infrared Communications Controller) 06 16 bit Normal Not used 07 16 bit Normal Not used |
Memory map |
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Memory map ================================================================================ Base Limit Length Device -------------------------------------------------------------------------------- 00000000h 0009FFFFh 640 KB System Board 00007980h 0000799Eh 31 B DMI 000A0000h 000BFFFFh 128 KB Video buffer 000C0000h 000CFFFFh* 64 KB Option ROM at C0000h 000F0000h 000FFFFFh* 64 KB System Board 000FF154h 000FF821h* 1.7 KB DMI 00100000h 03FFFFFFh 63 MB System Board 40000000h 40FFFFFFh 16 MB Rage 3D LT Pro PCI (BGA-312 Package) 41080000h 41080FFFh 4 KB Rage 3D LT Pro PCI (BGA-312 Package) 41100000h 411000FFh 256 B LT WinModem 56k 7FFFE000h 7FFFEFFFh 4 KB PCI1211 PC card CardBus Controller FFF80000h FFFFFFFFh 512 KB Motherboard registers *Regions shadowed in DRAM |
I/O map |
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I/O map ================================================================================ +-----------------------------------------------+ | Attention! | | You can run the I/O ISA address space scan to | | update I/O map with the hidden motherboard | | I/O resources and the I/O ranges assigned to | | the unrecognized legacy ISA cards | +-----------------------------------------------+ Base Limit Length Device -------------------------------------------------------------------------------- 0000h 000Fh 16 AT DMA Controller 0010h 001Fh 16 Motherboard registers 0020h 0021h 2 AT Interrupt Controller 0022h 003Fh 30 Motherboard registers 0040h 0043h 4 AT Timer 0044h 005Fh 28 Motherboard registers 0060h 0060h 1 IBM Enhanced keyboard controller (101/2-key) 0061h 0061h 1 AT standard speaker sound 0062h 0063h 2 Motherboard registers 0064h 0064h 1 IBM Enhanced keyboard controller (101/2-key) 0065h 006Fh 11 Motherboard registers 0070h 0071h 2 AT Real-Time Clock 0072h 0072h 1 AT Real-Time Clock 0073h 0073h 1 AT Real-Time Clock 0074h 0077h 4 Motherboard registers 0080h 008Fh 16 AT DMA Controller 0090h 0091h 2 Motherboard registers 0092h 0092h 1 Motherboard registers 0093h 009Fh 13 Motherboard registers 00A0h 00A1h 2 AT Interrupt Controller 00A2h 00BFh 30 Motherboard registers 00C0h 00DFh 32 AT DMA Controller 00E0h 00E5h 6 Motherboard registers 00E7h 00E7h 1 Motherboard registers 00ECh 00EFh 4 Motherboard registers 00F0h 00FFh 16 Math Coprocessor 0100h 0107h 8 SMC IrCC (Infrared Communications Controller) 0170h 0177h 8 82371AB/EB PIIX4 EIDE Controller 01F0h 01F7h 8 82371AB/EB PIIX4 EIDE Controller 0200h 0201h 2 ES1978 Maestro Audiodrive 0220h 022Fh 16 ES1978 Maestro Audiodrive 0279h 0279h 1 PnP ISA ADDRESS port 0330h 0331h 2 ES1978 Maestro Audiodrive 0376h 0377h 2 82371AB/EB PIIX4 EIDE Controller 0378h 037Fh 8 ECP printer port 0388h 0389h 2 ES1978 Maestro Audiodrive 03B4h 03B5h 2 MDA: CRT Controller Register 03BAh 03BAh 1 EGA: Feature Control Register 03BBh 03BCh 2 MDA: Light Pen registers 03C0h 03C1h 2 EGA: Attribute Controller Register 03C2h 03C2h 1 EGA: Miscellaneous Output Register 03C3h 03C3h 1 VGA: Enable Register 03C4h 03C5h 2 EGA: Sequensor Registers 03C6h 03C9h 4 VGA: DAC registers 03CAh 03CFh 6 EGA: Graphics Controller Registers 03D4h 03D5h 2 CGA: CRT Controller Register 03DAh 03DAh 1 EGA: Feature Control Register 03DBh 03DCh 2 CGA: Light Pen registers 03E0h 03E1h 2 Intel 82365-compatible CardBus controller 03E8h 03EFh 8 SMC IrCC (Infrared Communications Controller) 03F0h 03F5h 6 PC standard floppy disk controller 03F6h 03F6h 1 82371AB/EB PIIX4 EIDE Controller 03F7h 03F7h 1 PC standard floppy disk controller 03F8h 03FFh 8 16550A-compatible COM port 04D0h 04D1h 2 Motherboard registers 0778h 077Ah 3 ECP printer port 0800h 087Fh 128 Motherboard registers 0A79h 0A79h 1 PnP ISA WRITE_DATA port 0CF8h 0CFFh 8 PCI Bus 3000h 30FFh 256 Rage 3D LT Pro PCI (BGA-312 Package) 3400h 34FFh 256 ES1978 Maestro Audiodrive 3800h 38FFh 256 LT WinModem 56k 3C00h 3C1Fh 32 82371AB/EB PIIX4 USB Controller 3C20h 3C2Fh 16 82371AB/EB PIIX4 EIDE Controller 3C30h 3C37h 8 LT WinModem 56k 4000h 400Fh 16 Motherboard registers 5000h 5063h 100 Motherboard registers 6004h 6005h 2 Motherboard registers |
Connectors |
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Port Connectors: ================================================================================ Connector Type -------------------------------------------------------------------------------- COM A DB-9 pin male COM B DB-9 pin male LPT1 DB25 pin female Keyboard PS/2 Mouse PS/2 Primary IDE On Board IDE Secondary IDE On Board IDE Floppy On Board Floppy Line I/O:MIC Mini-DIN Line I/O:Line Right Mini-DIN Line I/O:Line Left Mini-DIN Head Phone Mini-DIN FAN Unknown Speaker Unknown USB Access Bus |