Generated by: CheckIt 7.00 Factory Edition Date : 06-Jun-2002 Time : 08h:48m Customer : customer Technician : technician
Full Report
Hardware Detection Summary |
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Platform : Dell System : s/n 4H4X711 CPU : , 733 MHz BIOS : Phoenix Technologies LTD, A01 Memory : 247 MB Video : Almador Graphics Chip Accelerated VGA BIOS, 8 MB I/O Buses : ISA, PCI, PCMCIA, USB Floppy : 1.44MB, 3.5" Drive A Serial : COM1 Parallel : LPT1 Modem(s) : PCI Modem Network : 3C905C-TX Fast Etherlink for PC Management NIC Sound : PCI card |
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Plug'n'Play |
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Plug'n'Play ================================================================================ Plug & Play Installation Check Results -------------------------------------------------------------------------------- Version of PnP BIOS specification : 1.0 Checksum : F6h(valid) Event notification is : not supported Event notification flag address : 00000400h PnP BIOS Real Mode API -------------------------------------------------------------------------------- Physical address of entry point : F000:849Dh Data segment base address : 0040h PnP BIOS 16-Bit Protected Mode API -------------------------------------------------------------------------------- PM segment base address : 000F0000h PM offset to entry point : 84BBh Data segment base address : 00000400h |
Docking Station |
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Docking Station Information ================================================================================ Docking station location ID : 4E273D52h Serial number : 00000001h Capabilities : 0005h (Hot docking, VCR style) |
System Device List |
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PnP BIOS Supports System Device Enumeration ================================================================================ Number of System device nodes : 20 System device node maximum size : 254 |
Motherboard registers |
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Id : PNP0C02 (Motherboard registers) Handle : 0h Base Class : 08h (Generic System Peripheral) SubClass : 80h (Other system periheral) Interface : 00h (Other system periheral) Currently Assigned System Resources ================================================================================ Memory Range : FFF00000h - FFFFFFFFh I/O Range : 0010h - 001Fh I/O Range : 0024h - 0025h I/O Range : 0028h - 0029h I/O Range : 002Ch - 002Dh I/O Range : 0030h - 0031h I/O Range : 0034h - 0035h I/O Range : 0038h - 0039h I/O Range : 003Ch - 003Dh I/O Range : 0050h - 0053h I/O Range : 0072h - 0073h I/O Range : 0074h - 0075h I/O Range : 0076h - 0077h I/O Range : 0080h - 0080h I/O Range : 0090h - 0091h I/O Range : 0092h - 0092h I/O Range : 0093h - 009Fh I/O Range : 00A4h - 00A5h I/O Range : 00A8h - 00A9h I/O Range : 00ACh - 00ADh I/O Range : 00B0h - 00B1h I/O Range : 00B2h - 00B3h I/O Range : 00B4h - 00B5h I/O Range : 00B8h - 00B9h I/O Range : 00BCh - 00BDh I/O Range : 0600h - 060Fh Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0010h Maximum base I/O address : 0010h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 10h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0024h Maximum base I/O address : 0024h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0028h Maximum base I/O address : 0028h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 002Ch Maximum base I/O address : 002Ch Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0030h Maximum base I/O address : 0030h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0034h Maximum base I/O address : 0034h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0038h Maximum base I/O address : 0038h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 003Ch Maximum base I/O address : 003Ch Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0050h Maximum base I/O address : 0050h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 04h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0072h Maximum base I/O address : 0072h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0074h Maximum base I/O address : 0074h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0076h Maximum base I/O address : 0076h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0080h Maximum base I/O address : 0080h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 01h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0090h Maximum base I/O address : 0090h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0092h Maximum base I/O address : 0092h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 01h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0093h Maximum base I/O address : 0093h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 0Dh I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00A4h Maximum base I/O address : 00A4h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00A8h Maximum base I/O address : 00A8h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00ACh Maximum base I/O address : 00ACh Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00B0h Maximum base I/O address : 00B0h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00B2h Maximum base I/O address : 00B2h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00B4h Maximum base I/O address : 00B4h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00B8h Maximum base I/O address : 00B8h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00BCh Maximum base I/O address : 00BCh Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0600h Maximum base I/O address : 0600h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 10h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0170h Maximum base I/O address : 0170h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0338h Maximum base I/O address : 0338h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0800h Maximum base I/O address : 0800h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 10h 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FFF00000h Range length : 00100000h bytes Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
System Board |
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Id : PNP0C01 (System Board) Handle : 1h Base Class : 05h (Memory Controller) SubClass : 00h (RAM Controller) Interface : 00h (RAM Controller) Currently Assigned System Resources ================================================================================ Memory Range : 00000000h - 0009FFFFh Memory Range : 000E0000h - 000FFFFFh Memory Range : 00100000h - 0F5FFFFFh Allocated resource configuration descriptor block ================================================================================ 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Writeable Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : 00000000h Range length : 000A0000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : Yes Memory is Expansion ROM : Yes Base memory address : 000E0000h Range length : 00020000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : 00100000h Range length : 0F500000h bytes Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
AT DMA Controller |
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Id : PNP0200 (AT DMA Controller) Handle : 2h Base Class : 08h (Generic System Peripheral) SubClass : 01h (DMA Controller) Interface : 01h (ISA DMA Controller) Currently Assigned System Resources ================================================================================ I/O Range : 0000h - 000Fh I/O Range : 0081h - 008Fh I/O Range : 00C0h - 00DFh DMA Channel : 4 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0000h Maximum base I/O address : 0000h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 10h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0081h Maximum base I/O address : 0081h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 0Fh I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00C0h Maximum base I/O address : 00C0h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 20h DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 4 Transfer type preference : 8- and 16-bit Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
AT Interrupt Controller |
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Id : PNP0000 (AT Interrupt Controller) Handle : 3h Base Class : 08h (Generic System Peripheral) SubClass : 00h (PIC) Interface : 01h (ISA PIC) Currently Assigned System Resources ================================================================================ I/O Range : 0020h - 0021h I/O Range : 00A0h - 00A1h IRQ Channel : 02 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0020h Maximum base I/O address : 0020h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00A0h Maximum base I/O address : 00A0h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 2 Driven IRQ types : High true edge sensitive Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
AT Timer |
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Id : PNP0100 (AT Timer) Handle : 4h Base Class : 08h (Generic System Peripheral) SubClass : 02h (System timer) Interface : 01h (ISA System Timer) Currently Assigned System Resources ================================================================================ I/O Range : 0040h - 0043h IRQ Channel : 00 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0040h Maximum base I/O address : 0040h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 04h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 0 Driven IRQ types : High true edge sensitive Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
AT Real-Time Clock |
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Id : PNP0B00 (AT Real-Time Clock) Handle : 5h Base Class : 08h (Generic System Peripheral) SubClass : 03h (RTC Controller) Interface : 01h (ISA RTC controller) Currently Assigned System Resources ================================================================================ I/O Range : 0070h - 0071h IRQ Channel : 08 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0070h Maximum base I/O address : 0070h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 8 Driven IRQ types : High true edge sensitive Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
IBM Enhanced keyboard controller (101/2-key) |
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Id : PNP0303 (IBM Enhanced keyboard controller (101/2-key)) Handle : 6h Base Class : 09h (Input Device) SubClass : 00h (Keyboard) Interface : 00h (Keyboard) Currently Assigned System Resources ================================================================================ I/O Range : 0060h - 0060h I/O Range : 0064h - 0064h IRQ Channel : 01 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0060h Maximum base I/O address : 0060h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 01h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0064h Maximum base I/O address : 0064h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 01h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 1 Driven IRQ types : High true edge sensitive Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
Math Coprocessor |
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Id : PNP0C04 (Math Coprocessor) Handle : 7h Base Class : 0Bh (Processor) SubClass : 80h (Unknown) Interface : 00h (Unknown) Currently Assigned System Resources ================================================================================ I/O Range : 00F0h - 00FFh IRQ Channel : 13 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00F0h Maximum base I/O address : 00F0h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 10h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 13 Driven IRQ types : High true edge sensitive Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
AT standard speaker sound |
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Id : PNP0800 (AT standard speaker sound) Handle : 8h Base Class : 04h (Multimedia Device) SubClass : 01h (Audio Device) Interface : 00h (Audio Device) Currently Assigned System Resources ================================================================================ I/O Range : 0061h - 0061h Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0061h Maximum base I/O address : 0061h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 01h Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
PCI Bus |
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Id : PNP0A03 (PCI Bus) Handle : 9h Base Class : 06h (Bridge Device) SubClass : 04h (PCI-to-PCI Bridge) Interface : 00h (PCI-to-PCI Bridge) Currently Assigned System Resources ================================================================================ I/O Range : 0CF8h - 0CFFh Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0CF8h Maximum base I/O address : 0CF8h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 08h Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
Motherboard registers |
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Id : PNP0C02 (Motherboard registers) Handle : Ah Base Class : 06h (Bridge Device) SubClass : 01h (ISA Bridge) Interface : 00h (ISA Bridge) Currently Assigned System Resources ================================================================================ I/O Range : 04D0h - 04D1h I/O Range : 8000h - 805Fh I/O Range : 2180h - 218Fh I/O Range : 8060h - 807Fh I/O Range : 8080h - 80BFh Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 04D0h Maximum base I/O address : 04D0h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 8000h Maximum base I/O address : 8000h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 60h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 2180h Maximum base I/O address : 2180h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 10h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 8060h Maximum base I/O address : 8060h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 20h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 8080h Maximum base I/O address : 8080h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 40h Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
INT0800 |
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Id : INT0800 (info unavailable) Handle : Bh Base Class : 05h (Memory Controller) SubClass : 01h (Flash Memory Controller) Interface : 00h (Flash Memory Controller) Currently Assigned System Resources ================================================================================ Memory Range : FFB80000h - FFBFFFFFh Memory Range : FFB00000h - FFB7FFFFh Memory Range : FFA80000h - FFAFFFFFh Memory Range : FFA00000h - FFA7FFFFh Memory Range : FF980000h - FF9FFFFFh Memory Range : FF900000h - FF97FFFFh Memory Range : FF880000h - FF8FFFFFh Memory Range : FF800000h - FF87FFFFh Memory Range : FF000000h - FF07FFFFh Allocated resource configuration descriptor block ================================================================================ 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FFB80000h Range length : 00080000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FFB00000h Range length : 00080000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FFA80000h Range length : 00080000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FFA00000h Range length : 00080000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FF980000h Range length : 00080000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FF900000h Range length : 00080000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FF880000h Range length : 00080000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FF800000h Range length : 00080000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FF000000h Range length : 00080000h bytes Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
Motherboard registers |
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Id : PNP0C02 (Motherboard registers) Handle : Ch Base Class : 05h (Memory Controller) SubClass : 00h (RAM Controller) Interface : 00h (RAM Controller) Currently Assigned System Resources ================================================================================ Memory Range : 000D0000h - 000D2FFFh Allocated resource configuration descriptor block ================================================================================ 32-bit Memory Range Descriptor -------------------------------------------------------------------------------- Write status : Writeable Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Minimum base memory address : 000D0000h Maximum base memory address : 000D0000h Base alignment : 00003000h Range length : 00003000h bytes Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
Motherboard registers |
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Id : PNP0C02 (Motherboard registers) Handle : Dh Base Class : 05h (Memory Controller) SubClass : 00h (RAM Controller) Interface : 00h (RAM Controller) Currently Assigned System Resources ================================================================================ Memory Range : 000D3000h - 000D3FFFh Allocated resource configuration descriptor block ================================================================================ 32-bit Memory Range Descriptor -------------------------------------------------------------------------------- Write status : Writeable Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Minimum base memory address : 000D3000h Maximum base memory address : 000D3000h Base alignment : 00001000h Range length : 00001000h bytes Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
Motherboard registers |
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Id : PNP0C02 (Motherboard registers) Handle : Fh Base Class : 05h (Memory Controller) SubClass : 00h (RAM Controller) Interface : 00h (RAM Controller) Currently Assigned System Resources ================================================================================ Memory Range : 000CC600h - 000CFFFFh Memory Range : 000D5000h - 000D7FFFh Allocated resource configuration descriptor block ================================================================================ 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : Yes Memory is Expansion ROM : No Base memory address : 000CC600h Range length : 00003A00h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : Yes Memory is Expansion ROM : No Base memory address : 000D5000h Range length : 00003000h bytes Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
PS/2 Port for PS/2-style Mice |
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Id : PNP0F13 (PS/2 Port for PS/2-style Mice) Handle : 10h Base Class : 09h (Input Device) SubClass : 02h (Mouse) Interface : 00h (Mouse) Currently Assigned System Resources ================================================================================ IRQ Channel : 12 Allocated resource configuration descriptor block ================================================================================ IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 12 Driven IRQ types : High true edge sensitive Possible resource configuration descriptor block ================================================================================ IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 12 Driven IRQ types : High true edge sensitive Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : No Device is not configurable : No Device is capable of being: a) primary output device : No b) primary input device : Yes c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at runtime only (dynamically) |
16550A-compatible COM port |
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Id : PNP0501 (16550A-compatible COM port) Handle : 11h Base Class : 07h (Simple Communication Controller) SubClass : 00h (Serial Controller) Interface : 02h (16550-Compatible Serial Controller) Currently Assigned System Resources ================================================================================ I/O Range : 03F8h - 03FFh IRQ Channel : 04 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03F8h Maximum base I/O address : 03F8h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 4 Driven IRQ types : High true edge sensitive Possible resource configuration descriptor block ================================================================================ Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03F8h Maximum base I/O address : 03F8h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 4 Driven IRQ types : High true edge sensitive Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 02F8h Maximum base I/O address : 02F8h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 3 Driven IRQ types : High true edge sensitive Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03E8h Maximum base I/O address : 03E8h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 4 Driven IRQ types : High true edge sensitive Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 02E8h Maximum base I/O address : 02E8h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 3 Driven IRQ types : High true edge sensitive End Dependent Functions -------------------------------------------------------------------------------- Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : No Device is not configurable : No Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at runtime (dynamically) |
PC standard floppy disk controller |
|---|
Id : PNP0700 (PC standard floppy disk controller) Handle : 12h Base Class : 01h (Mass Storage Controller) SubClass : 02h (Floppy Disk Controller) Interface : 00h (Floppy Disk Controller) Currently Assigned System Resources ================================================================================ I/O Range : 03F0h - 03F5h I/O Range : 03F7h - 03F7h IRQ Channel : 06 DMA Channel : 2 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03F0h Maximum base I/O address : 03F0h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 06h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03F7h Maximum base I/O address : 03F7h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 01h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 6 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 2 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Possible resource configuration descriptor block ================================================================================ Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03F0h Maximum base I/O address : 03F0h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 06h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03F7h Maximum base I/O address : 03F7h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 01h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 6 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 2 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0370h Maximum base I/O address : 0370h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 06h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0377h Maximum base I/O address : 0377h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 01h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 6 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 2 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible End Dependent Functions -------------------------------------------------------------------------------- Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : No Device is not configurable : No Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : Yes Device is: a) a docking station device : No b) a removable system device : No Device can be configured at runtime (dynamically) |
ECP printer port |
|---|
Id : PNP0401 (ECP printer port) Handle : 17h Base Class : 07h (Simple Communication Controller) SubClass : 01h (Parallel Port) Interface : 01h (Bidirectional Parallel Port) Currently Assigned System Resources ================================================================================ I/O Range : 0378h - 037Fh I/O Range : 0778h - 077Fh IRQ Channel : 07 DMA Channel : 1 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0378h Maximum base I/O address : 0378h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0778h Maximum base I/O address : 0778h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 7 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 1 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Possible resource configuration descriptor block ================================================================================ Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0378h Maximum base I/O address : 0378h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0778h Maximum base I/O address : 0778h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 7 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 3 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0378h Maximum base I/O address : 0378h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0778h Maximum base I/O address : 0778h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 7 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 1 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0278h Maximum base I/O address : 0278h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0678h Maximum base I/O address : 0678h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 7 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 3 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0278h Maximum base I/O address : 0278h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0678h Maximum base I/O address : 0678h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 7 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 1 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0178h Maximum base I/O address : 0178h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0578h Maximum base I/O address : 0578h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 7 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 3 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0178h Maximum base I/O address : 0178h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0578h Maximum base I/O address : 0578h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 7 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 1 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0378h Maximum base I/O address : 0378h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0778h Maximum base I/O address : 0778h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 7 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : None Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0278h Maximum base I/O address : 0278h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0678h Maximum base I/O address : 0678h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 7 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : None Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0178h Maximum base I/O address : 0178h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0578h Maximum base I/O address : 0578h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 7 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : None Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible End Dependent Functions -------------------------------------------------------------------------------- Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : No Device is not configurable : No Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at runtime (dynamically) |
Intel 82365-compatible CardBus controller |
|---|
Id : PNP0E03 (Intel 82365-compatible CardBus controller) Handle : 18h Base Class : 06h (Bridge Device) SubClass : 05h (PCMCIA Bridge) Interface : 00h (PCMCIA Bridge) Currently Assigned System Resources ================================================================================ I/O Range : 03E0h - 03E1h Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03E0h Maximum base I/O address : 03E0h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h Possible resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03E0h Maximum base I/O address : 03E0h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h Compatible device identifiers ================================================================================ Compatible Device ID -------------------------------------------------------------------------------- Compatible device ID : PNP0E00 Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : No Device is not configurable : No Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at runtime only (dynamically) |
ISA Configuration |
|---|
Plug & Play ISA Configuration ================================================================================ Revision : 0.1 Total number of CSNs* assigned : 0 ISA Read Data Port : 020Fh *CSN - Card Select Number |
PCI BIOS |
|---|
PCI (Peripheral Component Interconnect architecture): ================================================================================ Last PCI Bus Number in System...........4 Version................................ 2.10 Hardware Configuration mechanism....... 1 # 4 PCI buses Detected via PCI BIOS |
PCI IRQ Routing |
|---|
PCI IRQ Routing Information Table
================================================================================
IRQ Channels permanently dedicated to PCI: None
Device Slot Number : 0 (Motherboard device)
Function 0 is not configured on any IRQ channel
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 00h:1Eh:0h (PCI-to-PCI Bridge)
INTA# Link value : 60h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 10
INTB# Link value : 61h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 10
INTC# Link value : 62h ( Connected to PIC)
INTC# IRQ Connectivity bitmap : 11
INTD# Link value : 63h ( Connected to PIC)
INTD# IRQ Connectivity bitmap : 11
Device Slot Number : 0 (Motherboard device)
Function 0 is not configured on any IRQ channel
Function 1 configured on IRQ channel 11 (INTB#)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 02h:03h:0h (RL5c475 CardBus Controller)
INTA# Link value : 60h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 10
INTB# Link value : 62h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 11
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap :
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap :
Device Slot Number : 0 (Motherboard device)
Function 0 configured on IRQ channel 11 (INTA#)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 02h:05h:0h (3C905C-TX Fast Etherlink for PC Management NIC)
INTA# Link value : 63h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 11
INTB# Link value : 0h (Not Connected to PIC)
INTB# IRQ Connectivity bitmap :
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap :
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap :
Device Slot Number : 1 (Physical Slot)
Function 0 is not configured on any IRQ channel
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 02h:07h:0h (CardBus Bridge)
INTA# Link value : 68h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 10
INTB# Link value : 69h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 10
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap :
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap :
Device Slot Number : 0 (Motherboard device)
Function 0 is not configured on any IRQ channel
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 00h:00h:0h (Host Bridge)
INTA# Link value : 60h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 10
INTB# Link value : 61h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 10
INTC# Link value : 62h ( Connected to PIC)
INTC# IRQ Connectivity bitmap : 11
INTD# Link value : 63h ( Connected to PIC)
INTD# IRQ Connectivity bitmap : 11
Device Slot Number : 0 (Motherboard device)
Function 0 is not configured on any IRQ channel
Function 1 is not configured on any IRQ channel
Function 3 configured on IRQ channel 11 (INTB#)
Function 5 configured on IRQ channel 11 (INTB#)
Function 6 configured on IRQ channel 11 (INTB#)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 00h:1Fh:0h (ISA Bridge)
INTA# Link value : 62h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 10
INTB# Link value : 61h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 11
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap :
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap :
Device Slot Number : 0 (Motherboard device)
Function 0 configured on IRQ channel 10 (INTA#)
Function 1 configured on IRQ channel 11 (INTB#)
Function 2 configured on IRQ channel 11 (INTC#)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 00h:1Dh:0h (USB)
INTA# Link value : 60h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 10
INTB# Link value : 63h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 11
INTC# Link value : 62h ( Connected to PIC)
INTC# IRQ Connectivity bitmap : 11
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap :
Device Slot Number : 0 (Motherboard device)
Function 0 configured on IRQ channel 10 (INTA#)
Function 1 is not configured on any IRQ channel
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 00h:02h:0h (VGA Device)
INTA# Link value : 60h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 10
INTB# Link value : 61h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 10
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap :
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap :
Device Slot Number : 0 (Motherboard device)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 00h:01h:0h (Empty)
INTA# Link value : 60h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 10
INTB# Link value : 61h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 10
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap :
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap :
Note: Any of INTx# lines whose link values are
identical are assumed to share the same
IRQ channel.
|
PCI Bus 00 |
|---|
PCI Bus 00 |
Host Bridge |
|---|
Host Bridge ================================================================================ PCI Device 0:0:0 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 3575h (info unavailable) Revision ID : 04h Subsystem Vendor ID : 1028h (Dell Computer Corp) Subsystem Device ID : 0122h (info unavailable) Base class code : 06h (Bridge Device) Sub-class code : 00h (Host Bridge) Programming interface : 00h (Host Bridge) Command register : 06h -------------------------------------------------------------------------------- I/O space access : disabled Memory space access : enabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : enabled Fast back-to-back transaction : disabled Device Status Register : 10h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : No Data parity error detected : No Device select timing : fast Signalled Target Abort : No Received Target Abort : No Received Master Abort : Yes Signalled System Error : No Detected parity error : No New Capabilities Linked List is available Header Type : 00h (Device, Single) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 75 35 - 06 01 10 20 "..u5... " 0008: 04 00 00 06 - 00 00 00 00 "........" 0010: 08 00 00 00 - 00 00 00 00 "........" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: 00 00 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 28 10 22 01 "....(."." 0030: 00 00 00 00 - 40 00 00 00 "....@..." 0038: 00 00 00 00 - 00 00 00 00 "........" 0040: 09 00 05 21 - 31 00 00 00 "...!1..." 0048: 00 00 00 00 - 02 28 00 0E ".....(.." 0050: 72 A0 44 00 - 00 00 00 00 "r.D....." 0058: 00 10 11 11 - 13 00 11 11 "........" 0060: 04 04 06 08 - 08 08 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: F1 11 FF FF - 00 00 00 00 "........" 0078: 10 00 02 00 - 70 02 00 30 "....p..0" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 40 00 24 12 - 00 00 00 00 "@.$....." 0090: 0A 39 00 00 - 00 00 00 00 ".9......" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 02 00 20 00 - 17 02 00 1F ".. ....." 00A8: 11 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 F0 03 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 20 10 00 00 ".... ..." 00C0: 00 54 0D 45 - A2 99 01 00 ".T.E...." 00C8: C0 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 34 49 32 FC "....4I2." 00F0: 14 44 04 70 - 22 33 0C 05 ".D.p"3.." 00F8: E5 CE 33 CA - 22 CB 23 CB "..3.".#." |
PCI Multifunctional device |
|---|
PCI Multifunctional device ================================================================================ Function 0: info unavailable Function 1: info unavailable |
VGA Device |
|---|
VGA Compatible Controller ================================================================================ PCI Device 0:2:0 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 3577h (info unavailable) Revision ID : 04h Subsystem Vendor ID : 1028h (Dell Computer Corp) Subsystem Device ID : 0122h (info unavailable) Base class code : 03h (Display Controller) Sub-class code : 00h (VGA Device) Programming interface : 00h (VGA Compatible Controller) Base Address Registers: ----------------------------------------------------- BAR Type Base Size Comments ----------------------------------------------------- 0 Mem E8000000h 08000000h 128 MB. 32 bit. Prefetchable. Locate anywhere in 32 bit address space 1 Mem E0000000h 00080000h 512 KB. 32 bit. Locate anywhere in 32 bit address space Interrupt Pin : INTA# Interrupt Line : IRQ10 Command register : 07h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : enabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 90h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : fast Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No New Capabilities Linked List is available PCI Power Management Interface capability ID found Header Type : 80h (Device, Multiple functions) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 77 35 - 07 00 90 00 "..w5...." 0008: 04 00 00 03 - 00 00 80 00 "........" 0010: 08 00 00 E8 - 00 00 00 E0 "........" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: 00 00 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 28 10 22 01 "....(."." 0030: 00 00 00 00 - D0 00 00 00 "........" 0038: 00 00 00 00 - 0A 01 00 00 "........" 0040: 00 00 00 00 - 00 00 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 00 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 00 00 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 00 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 00 00 00 - 00 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 01 00 21 02 - 00 00 00 00 "..!....." 00D8: 80 80 13 1A - 00 00 00 00 "........" 00E0: 2A 00 00 00 - 00 00 00 00 "*......." 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 00 00 00 00 - 00 00 00 00 "........" |
Other display controller |
|---|
Other display controller
================================================================================
PCI Device 0:2:1 (Hex) (Bus:Device:Function)
Vendor ID : 8086h (Intel)
Device ID : 3577h (info unavailable)
Revision ID : 00h
Subsystem Vendor ID : 1028h (Dell Computer Corp)
Subsystem Device ID : 0122h (info unavailable)
Base class code : 03h (Display Controller)
Sub-class code : 80h (Other display controller)
Programming interface : 00h (Other display controller)
Base Address Registers:
-----------------------------------------------------
BAR Type Base Size Comments
-----------------------------------------------------
0 Mem F0000000h 08000000h 128 MB. 32 bit. Prefetchable. Locate anywhere in 32 bit address space
1 Mem E0080000h 00080000h 512 KB. 32 bit. Locate anywhere in 32 bit address space
Command register : 07h
--------------------------------------------------------------------------------
I/O space access : enabled
Memory space access : enabled
Bus master : enabled
Special cycles operations : ignore
Memory write and Invalidate : disabled
VGA palette snoop : disabled
Parity error response : disabled
Wait cycle control : disabled
System error line #SERR : disabled
Fast back-to-back transaction : disabled
Device Status Register : 90h
--------------------------------------------------------------------------------
Capable of running at 66MHz : No
UDF supported : No
Fast back-to-back Capable : Yes
Data parity error detected : No
Device select timing : fast
Signalled Target Abort : No
Received Target Abort : No
Received Master Abort : No
Signalled System Error : No
Detected parity error : No
New Capabilities Linked List is available
PCI Power Management Interface capability ID found
Header Type : 80h (Device, Multiple functions)
Built-In Self-Test : No
Cache Line Size : not specified
Desirable settings for Latency Timer values
MIN_GNT : 0 nanosecs. (*)
MAX_LAT : 2500 nanosecs. (*)
*) MIN_GNT - specify how long a burst period
the device needs assuming a clock
rate of 33 MHz)
MAX_LAT - specify how often the device needs
to gain access to the PCI bus)
Dump of PCI Configuration Space
--------------------------------------------------------------------------------
0000: 86 80 77 35 - 07 00 90 00 "..w5...."
0008: 00 00 80 03 - 00 00 80 00 "........"
0010: 08 00 00 F0 - 00 00 08 E0 "........"
0018: 00 00 00 00 - 00 00 00 00 "........"
0020: 00 00 00 00 - 00 00 00 00 "........"
0028: 00 00 00 00 - 28 10 22 01 "....(."."
0030: 00 00 00 00 - D0 00 00 00 "........"
0038: 00 00 00 00 - 00 00 00 0A "........"
0040: 00 00 00 00 - 00 00 00 00 "........"
0048: 00 00 00 00 - 00 00 00 00 "........"
0050: 00 00 00 00 - 00 00 00 00 "........"
0058: 00 00 00 00 - 00 00 00 00 "........"
0060: 00 00 00 00 - 00 00 00 00 "........"
0068: 00 00 00 00 - 00 00 00 00 "........"
0070: 00 00 00 00 - 00 00 00 00 "........"
0078: 00 00 00 00 - 00 00 00 00 "........"
0080: 00 00 00 00 - 00 00 00 00 "........"
0088: 00 00 00 00 - 00 00 00 00 "........"
0090: 00 00 00 00 - 00 00 00 00 "........"
0098: 00 00 00 00 - 00 00 00 00 "........"
00A0: 00 00 00 00 - 00 00 00 00 "........"
00A8: 00 00 00 00 - 00 00 00 00 "........"
00B0: 00 00 00 00 - 00 00 00 00 "........"
00B8: 00 00 00 00 - 00 00 00 00 "........"
00C0: 00 00 00 00 - 00 00 00 00 "........"
00C8: 00 00 00 00 - 00 00 00 00 "........"
00D0: 01 00 21 02 - 00 00 00 00 "..!....."
00D8: 80 80 13 1A - 00 00 00 00 "........"
00E0: 2A 00 00 00 - 00 00 00 00 "*......."
00E8: 00 00 00 00 - 00 00 00 00 "........"
00F0: 00 00 00 00 - 00 00 00 00 "........"
00F8: 00 00 00 00 - 00 00 00 00 "........"
|
PCI Multifunctional device |
|---|
PCI Multifunctional device ================================================================================ Function 0: info unavailable Function 1: info unavailable Function 2: info unavailable |
USB |
|---|
UHCI - Universal Host Controller Specification ================================================================================ PCI Device 0:1D:0 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 2482h (info unavailable) Revision ID : 02h Subsystem Vendor ID : 1028h (Dell Computer Corp) Subsystem Device ID : 0122h (info unavailable) Base class code : 0Ch (Serial Bus Controller) Sub-class code : 03h (USB) Programming interface : 00h (UHCI - Universal Host Controller Specification) Base Address Registers: ----------------------------------------------------- BAR Type Base Size Comments ----------------------------------------------------- 4 I/O 00008C80h 00000020h 32 B. Interrupt Pin : INTA# Interrupt Line : IRQ10 Command register : 05h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : disabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 80h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 80h (Device, Multiple functions) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 82 24 - 05 00 80 02 "...$...." 0008: 02 00 03 0C - 00 00 80 00 "........" 0010: 00 00 00 00 - 00 00 00 00 "........" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: 81 8C 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 28 10 22 01 "....(."." 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 0A 01 00 00 "........" 0040: 00 00 00 00 - 00 00 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 10 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 00 00 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 00 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 3B 00 00 00 - 00 00 00 00 ";......." 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 47 0F 00 00 - 00 00 00 00 "G......." |
USB |
|---|
UHCI - Universal Host Controller Specification ================================================================================ PCI Device 0:1D:1 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 2484h (info unavailable) Revision ID : 02h Subsystem Vendor ID : 1028h (Dell Computer Corp) Subsystem Device ID : 0122h (info unavailable) Base class code : 0Ch (Serial Bus Controller) Sub-class code : 03h (USB) Programming interface : 00h (UHCI - Universal Host Controller Specification) Base Address Registers: ----------------------------------------------------- BAR Type Base Size Comments ----------------------------------------------------- 4 I/O 00008CA0h 00000020h 32 B. Interrupt Pin : INTB# Interrupt Line : IRQ11 Command register : 01h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : disabled Bus master : disabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 80h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 00h (Device, Single) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 84 24 - 01 00 80 02 "...$...." 0008: 02 00 03 0C - 00 00 00 00 "........" 0010: 00 00 00 00 - 00 00 00 00 "........" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: A1 8C 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 28 10 22 01 "....(."." 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 0B 02 00 00 "........" 0040: 00 00 00 00 - 00 00 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 10 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 00 00 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 00 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 20 00 00 - 00 00 00 00 ". ......" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 47 0F 00 00 - 00 00 00 00 "G......." |
USB |
|---|
UHCI - Universal Host Controller Specification ================================================================================ PCI Device 0:1D:2 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 2487h (info unavailable) Revision ID : 02h Subsystem Vendor ID : 1028h (Dell Computer Corp) Subsystem Device ID : 0122h (info unavailable) Base class code : 0Ch (Serial Bus Controller) Sub-class code : 03h (USB) Programming interface : 00h (UHCI - Universal Host Controller Specification) Base Address Registers: ----------------------------------------------------- BAR Type Base Size Comments ----------------------------------------------------- 4 I/O 00008CC0h 00000020h 32 B. Interrupt Pin : INTC# Interrupt Line : IRQ11 Command register : 05h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : disabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 80h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 00h (Device, Single) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 87 24 - 05 00 80 02 "...$...." 0008: 02 00 03 0C - 00 00 00 00 "........" 0010: 00 00 00 00 - 00 00 00 00 "........" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: C1 8C 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 28 10 22 01 "....(."." 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 0B 03 00 00 "........" 0040: 00 00 00 00 - 00 00 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 10 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 00 00 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 00 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 20 00 00 - 00 00 00 00 ". ......" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 47 0F 00 00 - 00 00 00 00 "G......." |
PCI-to-PCI Bridge |
|---|
PCI-to-PCI Bridge
================================================================================
PCI Device 0:1E:0 (Hex) (Bus:Device:Function)
Vendor ID : 8086h (Intel)
Device ID : 2448h (info unavailable)
Revision ID : 42h
Base class code : 06h (Bridge Device)
Sub-class code : 04h (PCI-to-PCI Bridge)
Programming interface : 00h (PCI-to-PCI Bridge)
Bus Number Assignments
--------------------------------------------------------------------------------
Primary bus number : 00h
Secondary bus number : 02h
Subordinate bus number : 04h
Secondary bus latency timer : 168(A8h)
Secondary PCI-to-PCI status : 2280h
Subtracive Decoding Capable : No
I/O Filter Base : A000h
I/O Filter Limit : AFFFh
I/O Address Decoding Type : 16-bit
Memory Filter Base : E0200000h
Memory Filter Limit : E02FFFFFh
Address Decoding Type : 32-bit
Prefetched Filter : None-configured
Bridge Control register : 04h
--------------------------------------------------------------------------------
VGA I/O address routing : disabled
ISA I/O address routing : enabled
CSERR# : disabled
Parity Error responce : disabled
Command register : 07h
--------------------------------------------------------------------------------
I/O space access : enabled
Memory space access : enabled
Bus master : enabled
Special cycles operations : ignore
Memory write and Invalidate : disabled
VGA palette snoop : disabled
Parity error response : disabled
Wait cycle control : disabled
System error line #SERR : enabled
Fast back-to-back transaction : disabled
Device Status Register : 80h
--------------------------------------------------------------------------------
Capable of running at 66MHz : No
UDF supported : No
Fast back-to-back Capable : Yes
Data parity error detected : No
Device select timing : fast
Signalled Target Abort : No
Received Target Abort : No
Received Master Abort : No
Signalled System Error : No
Detected parity error : No
Header Type : 01h (PCI-to-PCI bridge, Single)
Built-In Self-Test : No
Cache Line Size : not specified
Dump of PCI Configuration Space
--------------------------------------------------------------------------------
0000: 86 80 48 24 - 07 01 80 00 "..H$...."
0008: 42 00 04 06 - 00 00 01 00 "B......."
0010: 00 00 00 00 - 00 00 00 00 "........"
0018: 00 02 04 A8 - A0 A0 80 22 ".......""
0020: 20 E0 20 E0 - F0 FF 00 00 " . ....."
0028: 00 00 00 00 - 00 00 00 00 "........"
0030: 00 00 00 00 - 00 00 00 00 "........"
0038: 00 00 00 00 - 00 00 04 00 "........"
0040: 02 28 20 20 - 00 00 00 00 ".( ...."
0048: 00 00 00 00 - 00 00 00 00 "........"
0050: 02 14 00 00 - 00 00 00 00 "........"
0058: 00 00 00 00 - 00 00 00 00 "........"
0060: 00 00 00 00 - 00 00 00 00 "........"
0068: 00 00 00 00 - 00 00 00 00 "........"
0070: 40 00 00 00 - 00 00 00 00 "@......."
0078: 00 00 00 00 - 00 00 00 00 "........"
0080: 00 00 81 00 - 00 00 00 00 "........"
0088: 00 00 00 00 - 00 00 00 00 "........"
0090: 00 00 00 00 - 00 00 00 00 "........"
0098: 00 00 00 00 - 00 00 00 00 "........"
00A0: 10 00 08 00 - 00 00 00 00 "........"
00A8: 00 00 00 00 - 00 00 00 00 "........"
00B0: 01 00 02 00 - 00 00 C0 00 "........"
00B8: 00 00 00 00 - 00 00 00 00 "........"
00C0: 00 00 00 00 - 00 00 00 00 "........"
00C8: 00 00 00 00 - 00 00 00 00 "........"
00D0: 00 00 00 00 - 00 00 00 00 "........"
00D8: 00 00 00 00 - 00 00 00 00 "........"
00E0: 00 00 00 00 - 00 00 00 00 "........"
00E8: 00 00 00 00 - 00 00 00 00 "........"
00F0: 00 00 00 00 - 00 00 00 00 "........"
00F8: 47 0F 00 00 - 00 00 6E 28 "G.....n("
|
PCI Multifunctional device |
|---|
PCI Multifunctional device ================================================================================ Function 0: info unavailable Function 1: info unavailable Function 3: info unavailable Function 5: info unavailable Function 6: info unavailable |
ISA Bridge |
|---|
ISA Bridge ================================================================================ PCI Device 0:1F:0 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 248Ch (info unavailable) Revision ID : 02h Base class code : 06h (Bridge Device) Sub-class code : 01h (ISA Bridge) Programming interface : 00h (ISA Bridge) Command register : 0Fh -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : enabled Bus master : enabled Special cycles operations : monitor Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 80h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 80h (Device, Multiple functions) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 8C 24 - 0F 00 80 02 "...$...." 0008: 02 00 01 06 - 00 00 80 00 "........" 0010: 00 00 00 00 - 00 00 00 00 "........" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: 00 00 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 00 00 00 00 "........" 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 00 00 00 00 "........" 0040: 01 80 00 00 - 10 00 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 81 80 00 00 - 10 00 00 00 "........" 0060: 0A 0B 0B 0B - 91 00 00 00 "........" 0068: 0A 0A 80 80 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: FF FC 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 8C 02 00 00 - 00 00 00 00 "........" 00A8: 38 00 00 00 - 00 00 00 00 "8......." 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 0A 02 06 - 00 00 00 00 "........" 00C0: 10 00 00 00 - 80 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 03 28 00 00 - 02 07 00 00 ".(......" 00D8: 04 00 00 00 - 00 00 00 00 "........" 00E0: 10 00 00 FF - 00 00 0D 3C ".......<" 00E8: 33 22 11 00 - 00 00 67 45 "3"....gE" 00F0: 0F 00 00 80 - 00 00 00 00 "........" 00F8: 47 0F 0F 00 - 00 00 81 00 "G......." |
IDE Controller |
|---|
IDE Controller ================================================================================ PCI Device 0:1F:1 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 248Ah (info unavailable) Revision ID : 02h Subsystem Vendor ID : 1028h (Dell Computer Corp) Subsystem Device ID : 0122h (info unavailable) Base class code : 01h (Mass Storage Controller) Sub-class code : 01h (IDE Controller) Programming interface : 8Ah (Master IDE Device) Base Address Registers: ----------------------------------------------------- BAR Type Base Size Comments ----------------------------------------------------- 0 I/O 00000000h 00000008h 8 B. 1 I/O 00000000h 00000004h 4 B. 2 I/O 00000000h 00000008h 8 B. 3 I/O 00000000h 00000004h 4 B. 4 I/O 00009000h 00000010h 16 B. Interrupt Pin : INTA# Interrupt Line : Not available Command register : 07h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : enabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 80h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 00h (Device, Single) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 8A 24 - 07 00 80 02 "...$...." 0008: 02 8A 01 01 - 00 00 00 00 "........" 0010: 01 00 00 00 - 01 00 00 00 "........" 0018: 01 00 00 00 - 01 00 00 00 "........" 0020: 01 90 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 28 10 22 01 "....(."." 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - FF 01 00 00 "........" 0040: 07 A3 00 00 - 00 00 00 00 "........" 0048: 01 00 01 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 10 14 14 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 08 00 00 00 - 00 00 00 00 "........" 0068: 08 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 00 00 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 00 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 00 00 00 - 00 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 47 0F 00 00 - 00 00 00 00 "G......." |
SMBus |
|---|
SMBus ================================================================================ PCI Device 0:1F:3 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 2483h (info unavailable) Revision ID : 02h Subsystem Vendor ID : 1028h (Dell Computer Corp) Subsystem Device ID : 0122h (info unavailable) Base class code : 0Ch (Serial Bus Controller) Sub-class code : 05h (SMBus) Programming interface : 00h (SMBus) Base Address Registers: ----------------------------------------------------- BAR Type Base Size Comments ----------------------------------------------------- 4 I/O 00008CE0h 00000020h 32 B. Interrupt Pin : INTB# Interrupt Line : IRQ11 Command register : 01h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : disabled Bus master : disabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 80h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 00h (Device, Single) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 83 24 - 01 00 80 02 "...$...." 0008: 02 00 05 0C - 00 00 00 00 "........" 0010: 00 00 00 00 - 00 00 00 00 "........" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: E1 8C 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 28 10 22 01 "....(."." 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 0B 02 00 00 "........" 0040: 01 00 00 00 - 00 00 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 00 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 00 00 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 00 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 00 00 00 - 00 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 47 0F 00 00 - 00 00 00 00 "G......." |
Audio Device |
|---|
Audio Device ================================================================================ PCI Device 0:1F:5 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 2485h (info unavailable) Revision ID : 02h Subsystem Vendor ID : 1028h (Dell Computer Corp) Subsystem Device ID : 0122h (info unavailable) Base class code : 04h (Multimedia Device) Sub-class code : 01h (Audio Device) Programming interface : 00h (Audio Device) Base Address Registers: ----------------------------------------------------- BAR Type Base Size Comments ----------------------------------------------------- 0 I/O 00008400h 00000100h 256 B. 1 I/O 000080C0h 00000040h 64 B. Interrupt Pin : INTB# Interrupt Line : IRQ11 Command register : 05h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : disabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 80h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 00h (Device, Single) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 85 24 - 05 00 80 02 "...$...." 0008: 02 00 01 04 - 00 00 00 00 "........" 0010: 01 84 00 00 - C1 80 00 00 "........" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: 00 00 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 28 10 22 01 "....(."." 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 0B 02 00 00 "........" 0040: 01 00 00 00 - 00 00 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 00 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 00 00 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 00 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 00 00 00 - 00 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 47 0F 00 00 - 00 00 00 00 "G......." |
Modem |
|---|
Generic modem ================================================================================ PCI Device 0:1F:6 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 2486h (info unavailable) Revision ID : 02h Subsystem Vendor ID : 134Dh (Pctel Inc) Subsystem Device ID : 4C21h (info unavailable) Base class code : 07h (Simple Communication Controller) Sub-class code : 03h (Modem) Programming interface : 00h (Generic modem) Base Address Registers: ----------------------------------------------------- BAR Type Base Size Comments ----------------------------------------------------- 0 I/O 00008800h 00000100h 256 B. 1 I/O 00008C00h 00000080h 128 B. Interrupt Pin : INTB# Interrupt Line : IRQ11 Command register : 05h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : disabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 80h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 00h (Device, Single) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 86 24 - 05 00 80 02 "...$...." 0008: 02 00 03 07 - 00 00 00 00 "........" 0010: 01 88 00 00 - 01 8C 00 00 "........" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: 00 00 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 4D 13 21 4C "....M.!L" 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 0B 02 00 00 "........" 0040: 00 00 00 00 - 00 00 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 00 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 00 00 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 00 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 00 00 00 - 00 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 47 0F 00 00 - 00 00 00 00 "G......." |
PCI Bus 02 |
|---|
PCI Bus 02 |
CardBus Bridge |
|---|
CardBus Bridge ================================================================================ Socket 0: RL5c475 CardBus Controller Function 1: info unavailable |
Socket 0 |
|---|
RL5c475 CardBus Controller CardBus Bridge ================================================================================ PCI Device 2:3:0 (Hex) (Bus:Device:Function) Vendor ID : 1180h (Ricoh Co Ltd) Device ID : 0475h (RL5c475 CardBus Controller) Revision ID : B8h Subsystem Vendor ID : 1028h (Dell Computer Corp) Subsystem Device ID : 0122h (info unavailable) Base class code : 06h (Bridge Device) Sub-class code : 07h (CardBus Bridge) Programming interface : 00h (CardBus Bridge) --------------------------------------------- Reg. Type Base Limit --------------------------------------------- 0 Mem 00000000h 00000000h 1 Mem 00000000h 00000000h 0 I/O 00000000h 00000000h 1 I/O 00000000h 00000000h PC Card 16-bit IF Legacy Mode Base Address : 000003E0h (I/O) Interrupt Pin : INTA# Interrupt Line : Not available Command register : 07h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : enabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 10h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : No Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No New Capabilities Linked List is available Header Type : 82h (CardBus bridge, Multiple functions) Built-In Self-Test : No Cache Line Size : not specified PCI bus number : 2 CardBus Bus number : 3 Subordinate Bus Number : 3 Secondary status : 0200h CardBus Latency Timer : not specified Bridge Control : 0080h Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 80 11 75 04 - 07 00 10 02 "..u....." 0008: B8 00 07 06 - 00 00 82 00 "........" 0010: 00 00 00 00 - DC 00 00 02 "........" 0018: 02 03 03 00 - 00 00 00 00 "........" 0020: 00 00 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 00 00 00 00 "........" 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - FF 01 80 00 "........" 0040: 28 10 22 01 - E1 03 00 00 "(."....." 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 00 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 A4 08 - 00 00 00 00 "........" 0088: 63 04 63 04 - 00 00 00 00 "c.c....." 0090: 00 00 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 80 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 28 10 22 01 - 00 00 00 00 "(."....." 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 01 00 0A FE "........" 00E0: 00 40 C0 24 - 00 00 00 00 ".@.$...." 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 00 00 00 00 - 00 00 00 00 "........" |
FireWire Bus |
|---|
FireWire Bus
================================================================================
PCI Device 2:3:1 (Hex) (Bus:Device:Function)
Vendor ID : 1180h (Ricoh Co Ltd)
Device ID : 0551h (info unavailable)
Revision ID : 00h
Subsystem Vendor ID : 1028h (Dell Computer Corp)
Subsystem Device ID : 0122h (info unavailable)
Base class code : 0Ch (Serial Bus Controller)
Sub-class code : 00h (FireWire Bus)
Programming interface : 10h (info unavailable)
Base Address Registers:
-----------------------------------------------------
BAR Type Base Size Comments
-----------------------------------------------------
0 Mem E0200000h 00000800h 2 KB. 32 bit. Locate anywhere in 32 bit address space
Interrupt Pin : INTB#
Interrupt Line : IRQ11
Command register : 06h
--------------------------------------------------------------------------------
I/O space access : disabled
Memory space access : enabled
Bus master : enabled
Special cycles operations : ignore
Memory write and Invalidate : disabled
VGA palette snoop : disabled
Parity error response : disabled
Wait cycle control : disabled
System error line #SERR : enabled
Fast back-to-back transaction : disabled
Device Status Register : 10h
--------------------------------------------------------------------------------
Capable of running at 66MHz : No
UDF supported : No
Fast back-to-back Capable : No
Data parity error detected : No
Device select timing : medium
Signalled Target Abort : No
Received Target Abort : No
Received Master Abort : No
Signalled System Error : No
Detected parity error : No
New Capabilities Linked List is available
PCI Power Management Interface capability ID found
Header Type : 80h (Device, Multiple functions)
Built-In Self-Test : No
Cache Line Size : not specified
Desirable settings for Latency Timer values
MIN_GNT : 500 nanosecs. (*)
MAX_LAT : 1000 nanosecs. (*)
*) MIN_GNT - specify how long a burst period
the device needs assuming a clock
rate of 33 MHz)
MAX_LAT - specify how often the device needs
to gain access to the PCI bus)
Dump of PCI Configuration Space
--------------------------------------------------------------------------------
0000: 80 11 51 05 - 06 01 10 02 "..Q....."
0008: 00 10 00 0C - 00 40 80 00 ".....@.."
0010: 00 00 20 E0 - 00 00 00 00 ".. ....."
0018: 00 00 00 00 - 00 00 00 00 "........"
0020: 00 00 00 00 - 00 00 00 00 "........"
0028: 00 00 00 00 - 28 10 22 01 "....(."."
0030: 00 00 00 00 - DC 00 00 00 "........"
0038: 00 00 00 00 - 0B 02 02 04 "........"
0040: 00 00 00 00 - 00 00 00 00 "........"
0048: 00 00 00 00 - 00 00 00 00 "........"
0050: 00 00 00 00 - 00 00 00 00 "........"
0058: 00 00 00 00 - 00 00 00 00 "........"
0060: 00 00 00 00 - 00 00 00 00 "........"
0068: 00 00 00 00 - 00 00 00 00 "........"
0070: 00 00 00 00 - 00 00 00 00 "........"
0078: 00 00 00 00 - 00 00 00 00 "........"
0080: 00 00 80 16 - 40 00 00 00 "....@..."
0088: 00 20 00 26 - 66 66 32 12 ". .&ff2."
0090: 48 60 66 10 - 00 40 00 00 "H`f..@.."
0098: 00 00 00 00 - 00 01 00 00 "........"
00A0: 00 00 00 00 - 00 00 00 00 "........"
00A8: 00 00 00 00 - 28 10 22 01 "....(."."
00B0: 00 00 00 00 - 00 00 00 00 "........"
00B8: 00 30 00 00 - 00 00 02 04 ".0......"
00C0: 00 00 00 00 - 00 00 00 00 "........"
00C8: 00 00 00 00 - 00 00 00 00 "........"
00D0: 00 00 00 00 - 00 00 00 00 "........"
00D8: 00 00 00 00 - 01 00 02 FE "........"
00E0: 00 40 00 48 - 00 00 00 00 ".@.H...."
00E8: 00 00 00 00 - 00 00 00 00 "........"
00F0: 00 00 00 00 - 00 00 00 00 "........"
00F8: 00 00 00 00 - 00 00 00 00 "........"
|
Ethernet Controller |
|---|
3C905C-TX Fast Etherlink for PC Management NIC
Ethernet Controller
================================================================================
PCI Device 2:5:0 (Hex) (Bus:Device:Function)
Vendor ID : 10B7h (3COM Corp)
Device ID : 9200h (3C905C-TX Fast Etherlink for PC Management NIC)
Revision ID : 78h
Subsystem Vendor ID : 1028h (Dell Computer Corp)
Subsystem Device ID : 0122h (info unavailable)
Base class code : 02h (Network Controller)
Sub-class code : 00h (Ethernet Controller)
Programming interface : 00h (Ethernet Controller)
Base Address Registers:
-----------------------------------------------------
BAR Type Base Size Comments
-----------------------------------------------------
0 I/O 0000A000h 00000080h 128 B.
1 Mem E0200800h 00000080h 128 B. 32 bit. Locate anywhere in 32 bit address space
Interrupt Pin : INTA#
Interrupt Line : IRQ11
Command register : 17h
--------------------------------------------------------------------------------
I/O space access : enabled
Memory space access : enabled
Bus master : enabled
Special cycles operations : ignore
Memory write and Invalidate : enabled
VGA palette snoop : disabled
Parity error response : disabled
Wait cycle control : disabled
System error line #SERR : enabled
Fast back-to-back transaction : disabled
Device Status Register : 10h
--------------------------------------------------------------------------------
Capable of running at 66MHz : No
UDF supported : No
Fast back-to-back Capable : No
Data parity error detected : No
Device select timing : medium
Signalled Target Abort : No
Received Target Abort : No
Received Master Abort : No
Signalled System Error : No
Detected parity error : No
New Capabilities Linked List is available
PCI Power Management Interface capability ID found
Header Type : 00h (Device, Single)
Built-In Self-Test : No
Cache Line Size : 32 bytes
Desirable settings for Latency Timer values
MIN_GNT : 2500 nanosecs. (*)
MAX_LAT : 2500 nanosecs. (*)
*) MIN_GNT - specify how long a burst period
the device needs assuming a clock
rate of 33 MHz)
MAX_LAT - specify how often the device needs
to gain access to the PCI bus)
Dump of PCI Configuration Space
--------------------------------------------------------------------------------
0000: B7 10 00 92 - 17 01 10 02 "........"
0008: 78 00 00 02 - 08 50 00 00 "x....P.."
0010: 01 A0 00 00 - 00 08 20 E0 "...... ."
0018: 00 00 00 00 - 00 00 00 00 "........"
0020: 00 00 00 00 - 00 00 00 00 "........"
0028: 00 00 00 00 - 28 10 22 01 "....(."."
0030: 00 00 00 00 - DC 00 00 00 "........"
0038: 00 00 00 00 - 0B 01 0A 0A "........"
0040: 00 00 00 00 - 00 00 00 00 "........"
0048: 00 00 00 00 - 00 00 00 00 "........"
0050: 00 00 00 00 - 00 00 00 00 "........"
0058: 00 00 00 00 - 00 00 00 00 "........"
0060: 00 00 00 00 - 00 00 00 00 "........"
0068: 00 00 00 00 - 00 00 00 00 "........"
0070: 00 00 00 00 - 00 00 00 00 "........"
0078: 00 00 00 00 - 00 00 00 00 "........"
0080: 00 00 00 00 - 00 00 00 00 "........"
0088: 00 00 00 00 - 00 00 00 00 "........"
0090: 00 00 00 00 - 00 00 00 00 "........"
0098: 00 00 00 00 - 00 00 00 00 "........"
00A0: 00 00 00 00 - 00 00 00 00 "........"
00A8: 00 00 00 00 - 00 00 00 00 "........"
00B0: 00 00 00 00 - 00 00 00 00 "........"
00B8: 00 00 00 00 - 00 00 00 00 "........"
00C0: 00 00 00 00 - 00 00 00 00 "........"
00C8: 00 00 00 00 - 00 00 00 00 "........"
00D0: 00 00 00 00 - 00 00 00 00 "........"
00D8: 00 00 00 00 - 01 00 02 FE "........"
00E0: 00 41 00 B7 - 00 00 00 00 ".A......"
00E8: 00 00 00 00 - 00 00 00 00 "........"
00F0: 00 00 00 00 - 00 00 00 00 "........"
00F8: 00 00 00 00 - 00 00 00 00 "........"
|
Socket 0 |
|---|
CardBus Bridge ================================================================================ PCI Device 2:7:0 (Hex) (Bus:Device:Function) Vendor ID : 104Ch (Texas Instruments (TI)) Device ID : AC50h (info unavailable) Revision ID : 01h Subsystem Vendor ID : 12A3h (Lucent Technologies) Subsystem Device ID : AB01h (info unavailable) Base class code : 06h (Bridge Device) Sub-class code : 07h (CardBus Bridge) Programming interface : 00h (CardBus Bridge) --------------------------------------------- Reg. Type Base Limit --------------------------------------------- 0 Mem 00000000h 0000F000h 1 Mem 0000F000h 00000000h 0 I/O 00000000h 00000000h 1 I/O 00000000h 00000000h Interrupt Pin : INTA# Interrupt Line : Not available Command register : 00h -------------------------------------------------------------------------------- I/O space access : disabled Memory space access : disabled Bus master : disabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 10h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : No Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No New Capabilities Linked List is available PCI Power Management Interface capability ID found Header Type : 02h (CardBus bridge, Single) Built-In Self-Test : No Cache Line Size : not specified PCI bus number : 2 CardBus Bus number : 4 Subordinate Bus Number : 4 Secondary status : 0200h CardBus Latency Timer : not specified Bridge Control : 0340h Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 4C 10 50 AC - 00 00 10 02 "L.P....." 0008: 01 00 07 06 - 00 00 02 00 "........" 0010: 00 00 00 00 - A0 00 00 02 "........" 0018: 02 04 04 00 - 00 00 00 00 "........" 0020: 00 F0 00 00 - 00 F0 00 00 "........" 0028: 00 00 00 00 - 00 00 00 00 "........" 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - FF 01 40 03 "......@." 0040: A3 12 01 AB - 01 00 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 00 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 60 90 44 00 - 00 00 00 00 "`.D....." 0088: 00 00 00 00 - 02 00 00 01 "........" 0090: C0 00 60 61 - 00 00 00 00 "..`a...." 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 01 00 11 FE - 00 00 C0 00 "........" 00A8: 0E 00 00 00 - 1B 00 00 00 "........" 00B0: 00 00 00 08 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 00 00 00 - 00 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 00 00 00 00 - 00 00 00 00 "........" |
PCI Bus 03 |
|---|
PCI Bus 03 |
PCI Bus 04 |
|---|
PCI Bus 04 |
Platform |
|---|
Dell ================================================================================ Dell model byte : FEh Computer type code: -------------------------------------------------------------------------------- Model byte : FCh Submodel byte : 01h Revision byte : 00h System configuration byte description: -------------------------------------------------------------------------------- Second 8259 (PIC) installed Real-Time clock installed INT 15h (Function 4Fh) called upon INT 09h System Parameters Table Dump: 0018:0350 -------------------------------------------------------------------------------- 0000: 08 00 FC 01 - 00 70 00 00 ".....p.." |
Network |
|---|
Network Adapter(s) Found: ================================================================================ 1. 3C905C-TX Fast Etherlink for PC Management NIC |
3C905C-TX Fast Etherlink for PC Management NIC |
|---|
PCI network adapter ================================================================================ Location : PCI Device on Motherboard Vendor Id : 10B7h (3COM Corp) Device Id : 9200h (3C905C-TX Fast Etherlink for PC Management NIC) Class : 00h (Ethernet Controller) Sub Vendor Id : 1028h (Dell Computer Corp) Sub Device Id : 0122h (info unavailable) |
APM Bios |
|---|
APM Bios ================================================================================ APM BIOS version 1.2 is enabled Real mode API supported via INT 15 32-bit protected mode API supported -------------------------------------------------------------------------------- Physical address of entry point : F000:00004E90 Physical data segment : F000 Code segment limit : FFFFh Data segment limit : FFFFh 16-bit protected mode API supported -------------------------------------------------------------------------------- Physical address of entry point : F000:4E13 Physical data segment : 0040 Code segment limit : FFFFh Data segment limit : FFFFh |
APM Bios Tests Folder |
|---|
Suspend-Resume test |
|---|
Not Tested |
Battery |
|---|
1 Battery Unit(s) Found |
Battery Tests Folder |
|---|
APM Battery Test |
|---|
Not Tested |
Unit 1 |
|---|
AC Line Status : On-Line Battery Status : Unknown Percentage of Full Charge : 98 % |
CMOS |
|---|
CMOS ================================================================================ Real-time clock settings -------------------------------------------------------------------------------- Date (Y/M/D) : 2002:06:06 Time : 08:34:26 Real-Time clock alarm : not set Memory info -------------------------------------------------------------------------------- Base Memory : 640 KB Extended Memory : 64512 KB Floppy Disk Drive Types : 40h -------------------------------------------------------------------------------- Drive A: : 1.44MB, 3.5" drive Drive B: : No drive Hard Disk Drive Types -------------------------------------------------------------------------------- Hard Disk 1 Type : F0h Hard Disk 2 Type : 00h Equipment byte : 03h -------------------------------------------------------------------------------- Number of Floppy Drives : 1 Primary Video Display : Video card with BIOS ROM Display : disabled Keyboard : disabled FPU Installed : Yes Floppy Drive Installed : Yes Status register A : 26h -------------------------------------------------------------------------------- Divider control. : Normal (32768 Hz) Rate selection : 0.976562 ms (default) Status register B : 02h -------------------------------------------------------------------------------- Cycle update : disabled Periodic interrupt : disabled Alarm interrupt : disabled Update ended interrupt : disabled Square wave output : disabled Daylight savings time : disabled Time and calendar stored as BCD values Hours are stored in 24 hour mode Status register D : 80h -------------------------------------------------------------------------------- RTC Power is : good Diagnostic Status : 00h Shutdown Status : 00h (Vendor specific) Information Flags : C8h (Vendor specific) CMOS Checksum : 08BBh CMOS RAM Raw Table -------------------------------------------------------------------------------- 0000: 26 12 34 53 - 08 13 04 06 "&.4S...." 0008: 06 02 26 02 - 50 80 00 00 "..&.P..." 0010: 40 05 F0 4C - 03 80 02 00 "@..L...." 0018: FC 01 00 48 - 35 4C 46 34 "...H5LF4" 0020: D6 47 34 D6 - 07 00 58 A0 ".G4...X." 0028: 42 6D A0 00 - 00 00 08 BB "Bm......" 0030: 00 FC 20 C8 - D0 00 07 08 ".. ....." 0038: 08 6F 01 50 - F1 00 A8 01 ".o.P...." 0040: AE F5 FF E7 - 7F 00 00 00 "........" 0048: 00 BD 00 83 - 11 11 01 00 "........" 0050: 00 00 00 00 - 00 00 94 B1 "........" 0058: FE 01 FC 11 - 01 00 00 00 "........" 0060: 00 00 00 00 - 00 00 28 10 "......(." 0068: 61 30 00 00 - 00 40 33 80 "a0...@3." 0070: 39 E0 C6 11 - FC FF 0B 90 "9......." 0078: 44 00 00 00 - 00 00 00 00 "D......." |
CMOS Tests Folder |
|---|
CMOS test |
|---|
Not Tested |
Keyboard |
|---|
Enhanced AT keyboard ================================================================================ Keyboard IDs : AB 41 Command Byte : 57h |
Keyboard Tests Folder |
|---|
Diagnostic echo |
|---|
Not Tested |
Keyboard interactive test |
|---|
Not Tested |
PIC |
|---|
PIC Tests Folder |
|---|
PIC base test |
|---|
Not Tested |
PCMCIA |
|---|
PCMCIA Adapter(s) Detected: 2 |
Ricoh R5C475II (CardBus) |
|---|
PC Card Adapter : Ricoh R5C475II (CardBus) Location : PCI Device on Motherboard Socket(s) : 2 I/O Base : 03E0h I/O Size : 0002h |
Texas Instruments PCI1410 (CardBus) |
|---|
PC Card Adapter : Texas Instruments PCI1410 (CardBus) Location : PCI Card in Slot 1 Socket(s) : 2 I/O Base : FCFCh I/O Size : 0002h |
BIOS |
|---|
BIOS ================================================================================ BIOS Date : 00/00/1985 BIOS Vendor : Phoenix BIOS Copyright : Copyright 1985-2001 Phoenix Technologies Ltd. BIOS Sign On : BIOS32 Service Directory found at address F000:62F0 -------------------------------------------------------------------------------- Physical Address of BIOS32 Entry Point : 000FD870 Revision Level : 00h Length of Data Structure : 16 bytes |
DMA |
|---|
DMA Tests Folder |
|---|
DMA base test |
|---|
Not Tested |
SMBus |
|---|
SMBus ================================================================================ System Management Bus BIOS Interface is not Installed |
ACPI |
|---|
Root System Description Pointer Structure -------------------------------------------------------------------------------- Location : F631:0000H Signature : 'RSD PTR ' Checksum : 52h OEMID : PTLTD RSDT Address : 0F6EA5C5h |
RSDT |
|---|
Root System Description Table -------------------------------------------------------------------------------- Signature : RSDT Table length : 52 Byte Revision : 01h Checksum : CDh OEM ID : PTLTD OEM Table ID : RSDT OEM Revision : 00 00 04 06 Creator ID : LTP Creator Revision : 00 00 00 00 Total entries : 4 Entry # 0 : 6B9C0024H Entry # 1 : 6B9C0028H Entry # 2 : 6B9C002CH Entry # 3 : 6B9C0030H |
FACP |
|---|
Fixed ACPI Description Table -------------------------------------------------------------------------------- Signature : FACP Table length : 116 Byte Revision : 01h Checksum : B8h OEM ID : DELL OEM Table ID : X200 OEM Revision : 00 00 04 06 Creator ID : PTL Creator Revision : K FIRMWARE_CTRL : 0F6FCFC0h DSDT : 0F6EA5F9h INT_MODEL : 00h (Dual PIC, industry standard PC-AT type) SCI_INT : 0009h SMI_CMD : B200h ACPI_ENABLE : 00h ACPI_DISABLE : 00h S4BIOS_REQ : F0h PM1a_EVT_BLK : 008000F1h PM1b_EVT_BLK : 00000080h PM1a_CNT_BLK : 04000000h PM1b_CNT_BLK : 00000080h PM2_CNT_BLK : 20000000h PM_TMR_BLK : 08000080h GPE0_BLK : 28000080h GPE1_BLK : 2C000080h PM1_EVT_LEN : 00h PM1_CNT_LEN : 04h PM2_CNT_LEN : 02h PM_TM_LEN : 01h GPE0_BLK_LEN : 04h GPE1_BLK_LEN : 04h GPE1_BASE : 04h P_LVL2_LAT : 01F4h P_LVL3_LAT : 5500h FLUSH_SIZE : 0000h FLUSH_STRIDE : 0000h DUTY_OFFSET : 00h DUTY_WIDTH : 00h DAY_ALRM : 00h MON_ALRM : 0Dh CENTURY : 00h Flags : 00022500h |
SSDT |
|---|
Secondary System Description Table
--------------------------------------------------------------------------------
Signature : SSDT
Table length : 188 Byte
Revision : 01h
Checksum : 6Dh
OEM ID : PTLTD
OEM Table ID : ACPICST1
OEM Revision : 00 00 04 06
Creator ID : LTP
Creator Revision : 01 00 00 00
{
Scope(\_PR_.CPU0) {
Name(_CST, Package(0x05) {
0x04
Package(0x04) {
Buffer(0x11) {
0x82, 0x0C, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x79,
0x00, }
0x01
0x0001
0x0640
}
Package(0x04) {
Buffer(0x11) {
0x82, 0x0C, 0x00, 0x01, 0x08, 0x00, 0x00, 0x14,
0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x79,
0x00, }
0x02
0x0002
0x04B0
}
Package(0x04) {
Buffer(0x11) {
0x82, 0x0C, 0x00, 0x01, 0x08, 0x00, 0x00, 0x15,
0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x79,
0x00, }
0x03
0x001E
0x0190
}
Package(0x04) {
Buffer(0x11) {
0x82, 0x0C, 0x00, 0x01, 0x08, 0x00, 0x00, 0x16,
0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x79,
0x00, }
0x03
0x0032
0x00C8
}
})
}} |
SSDT |
|---|
Secondary System Description Table
--------------------------------------------------------------------------------
Signature : SSDT
Table length : 181 Byte
Revision : 01h
Checksum : EAh
OEM ID : PTLTD
OEM Table ID : ACPIPST1
OEM Revision : 00 00 04 06
Creator ID : LTP
Creator Revision : 01 00 00 00
{
Scope(\_PR_.CPU0) {
Name(_PCT, Package(0x02) {
Buffer(0x11) {
0x82, 0x0C, 0x00, 0x01, 0x08, 0x00, 0x00, 0xB2,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x79,
0x00, }
Buffer(0x11) {
0x82, 0x0C, 0x00, 0x01, 0x01, 0x00, 0x00, 0x50,
0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x79,
0x00, }
})
Name(_PSS, Package(0x02) {
Package(0x06) {
0x000002DD
0x00000000
0x000000FA
0x000000DC
0x000000F5
0x00000000
}
Package(0x06) {
0x00000190
0x00000000
0x000000FA
0x000000DC
0x000000F6
0x00000001
}
})
Name(_PPC, 0x00)
}} |
BOOT |
|---|
Boot Optimization Options Table -------------------------------------------------------------------------------- Signature : BOOT Table length : 40 Byte Revision : 01h Checksum : A5h OEM ID : PTLTD OEM Table ID : $SBFTBL$ OEM Revision : 00 00 04 06 Creator ID : LTP Creator Revision : 01 00 00 00 BOOT Register Index in CMOS : 36h CMOS BOOT Register Value : 07h -------------------------------------------------------------------------------- Plug-and-Play capable OS : Installed Previous boot : completed Run diagnostics : Yes |
DSDT |
|---|
Differentiated System Description Table
--------------------------------------------------------------------------------
Signature : DSDT
Table length : 22522 Byte
Revision : 01h
Checksum : 62h
OEM ID : DELL
OEM Table ID : X200
OEM Revision : 00 00 04 06
Creator ID : MSFT
Creator Revision : 0D 00 00 01
{
OperationRegion(PORT, 0x01, 0x80, 0x01)
Field(PORT, 0x01) {
P80H, 0x8,
}
OperationRegion(S_IO, 0x01, 0x0600, 0x10)
Field(S_IO, 0x01) {
0x00, 0x40,
0x00, 0x1,
ISPE, 0x1,
FPEN, 0x1,
0x00, 0x3,
CPEN, 0x1,
IPPE, 0x1,
}
OperationRegion(A_IO, 0x01, 0x8000, 0x30)
Field(A_IO, 0x01) {
PMS0, 0x8,
PMS1, 0x8,
PME0, 0x8,
PME1, 0x8,
PMC0, 0x8,
PMC1, 0x8,
0x00, 0x10,
TMR0, 0x8,
TMR1, 0x8,
TMR2, 0x8,
TMR3, 0x8,
0x00, 0x20,
PRC0, 0x8,
PRC1, 0x8,
PRC2, 0x8,
PRC3, 0x8,
0x00, 0xA0,
GPS0, 0x8,
GPS1, 0x8,
GPE0, 0x8,
GPE1, 0x8,
GPS2, 0x8,
GPS3, 0x8,
GPE2, 0x8,
GPE3, 0x8,
}
OperationRegion(GPIO, 0x01, 0x8080, 0x3C)
Field(GPIO, 0x01) {
GU00, 0x8,
GU01, 0x8,
GU02, 0x8,
GU03, 0x8,
GIO0, 0x8,
GIO1, 0x8,
GIO2, 0x8,
GIO3, 0x8,
0x00, 0x20,
GL00, 0x8,
GL01, 0x8,
GL02, 0x8,
GL03, 0x8,
0x00, 0x40,
GB00, 0x8,
GB01, 0x8,
GB02, 0x8,
GB03, 0x8,
0x00, 0x80,
GIV0, 0x8,
GIV1, 0x8,
GIV2, 0x8,
GIV3, 0x8,
GU04, 0x8,
GU05, 0x8,
GU06, 0x8,
GU07, 0x8,
GIO4, 0x8,
GIO5, 0x8,
GIO6, 0x8,
GIO7, 0x8,
GL04, 0x8,
GL05, 0x8,
GL06, 0x8,
GL07, 0x8,
}
OperationRegion(MNVS, 0x00, 0x0F6F0F9C, 0x10)
Field(MNVS, 0x10) {
OSYS, 0x10,
CMAP, 0x8,
CMBP, 0x8,
FDCP, 0x8,
LPTP, 0x8,
BTEN, 0x8,
}
OperationRegion(CMIX, 0x01, 0x72, 0x02)
Field(CMIX, 0x01) {
I72_, 0x8,
D73_, 0x8,
}
Name(_S0_, Package(0x03) {
0x00
0x00
0x00
})
Name(_S1_, Package(0x03) {
0x02
0x02
0x00
})
Name(_S3_, Package(0x03) {
0x05
0x05
0x00
})
Name(_S4_, Package(0x03) {
0x06
0x06
0x00
})
Name(_S5_, Package(0x03) {
0x07
0x07
0x00
})
Scope(\_PR_) {
Processor(CPU0, 0x00, 0x00008010, 0x06){}
}
Name(\GPIC, 0x00)
Name(\CTYP, 0x00)
Name(\ECON, 0x00)
Name(\ACON, 0x01)
Name(\DSEN, 0x01)
Name(\ENUM, 0x01)
Name(\BTS0, 0x01)
Name(\BCAP, 0x00)
Method(\_PIC, 0x01) {
Store(Arg0, GPIC)
}
Method(_PTS, 0x01) {
If(LEqual(Arg0, 0x01)) {
\_SB_.PHS_
0x8E
}
If(LEqual(Arg0, 0x04)) {
\_SB_.PHS_
0x92
}
Store(Store(GPS2, Local0), GPS2)
And(Store(GPS2, Local0), 0x80, Local0)
If(Local0) {
Store(0x01, \_SB_.DCK0.DCBF)
}
Else {
Store(0x00, \_SB_.DCK0.DCBF)
}
Store(\_SB_.PHS2, 0x9A)
0xB2
0x00
\BCAP
}
Method(_WAK, 0x01) {
If(LEqual(Arg0, 0x01)) {
\_SB_.PHS_
0x8F
}
\_SB_.PHS_
0xA0
If(LEqual(Arg0, 0x04)) {
Store(0x00, \_SB_.PCI0.PCIB.CDB_.CD44)
Notify(\_SB_.PWRB, 0x02)
}
Else {
If(LLess(OSYS, 0x07D0)) {
Notify(\_SB_.PWRB, 0x02)
}
Else {
Store(\_SB_.PHS1, 0x98)
0x00
Local0
If(LEqual(Local0, 0x01)) {
Notify(\_SB_.PWRB, 0x02)
}
}
}
Store(\_SB_.PCI0.LPCB.H_EC.ACEX, \ACON)
If(LEqual(Arg0, 0x03)) {
\_SB_.PHS_
0x9C
}
Store(Store(GPS2, Local0), GPS2)
And(Store(GPS2, Local0), 0x20, Local0)
And(GIV0, 0x20, Local1)
XOr(Local0, Local1, Local0)
If(\_SB_.DCK0.DCBF) {
If(Local0) {
\_SB_.PCI0.LPCB.SIOD.SETD
0x03
\_SB_.PCI0.LPCB.SIOD.WRIT
0x30
Zero
\_SB_.PCI0.LPCB.SIOD.SETD
0x01
\_SB_.PCI0.LPCB.SIOD.WRIT
0x30
Zero
\_SB_.PCI0.LPCB.SIOD.SETD
0x03
Or(\_SB_.PCI0.LPCB.SIOD.READ, 0xF0, One)
Local0
\_SB_.PCI0.LPCB.SIOD.WRIT
0xF0
Local0
\_SB_.PCI0.LPCB.SIOD.SETD
0x01
Or(\_SB_.PCI0.LPCB.SIOD.READ, 0xF0, One)
Local0
\_SB_.PCI0.LPCB.SIOD.WRIT
0xF0
Local0
Or(GIV0, 0x20, GIV0)
Notify(\_SB_.DCK0, 0x01)
}
}
Else {
If(LEqual(Local0, 0x00)) {
And(GIV0, 0xD0, GIV0)
Notify(\_SB_.DCK0, 0x00)
}
}
If(LNot(LEqual(\_SB_.PHS2, 0x9A))) {
0xB2
0x00
BCAP
Notify(\_SB_.BAT1, 0x81)
}
}
Scope(\_GPE) {
Method(_L05, 0x00) {
\_SB_.PHS_
0x93
Notify(\_SB_.PCI0.MODM, 0x02)
}
Method(_L0B, 0x00) {
Notify(\_SB_.PCI0, 0x02)
Notify(\_SB_.PCI0.PCIB, 0x02)
}
Method(_L0D, 0x00) {
Notify(\_SB_.PCI0, 0x02)
}
Method(_L14, 0x00) {
And(GIV0, 0x10, Local0)
XOr(Local0, 0x10, Local0)
And(GIV0, 0xEF, Local1)
Or(Local0, Local1, GIV0)
Notify(\_SB_.LID0, 0x80)
}
Method(_L15, 0x00) {
Store(0x88, P80H)
Store(Store(GPS2, Local0), GPS2)
And(Store(GPS2, Local0), 0x20, Local0)
And(GIV0, 0x20, Local1)
XOr(Local0, Local1, Local0)
If(Local0) {
Or(GIV0, 0x20, GIV0)
Sleep(0x05DC)
Notify(\_SB_.DCK0, 0x01)
}
Else {
And(GIV0, 0xD0, GIV0)
Sleep(0x01F4)
Notify(\_SB_.DCK0, 0x00)
And(Store(GIV0, Local0), 0x10, Local0)
If(LNot(Local0)) {
Store(0x55, P80H)
Notify(\_SB_.PCI0, 0x00)
Sleep(0x07D0)
Store(0x07, \_SB_.PCI0.GRFX.VFUN)
Store(0x00, \_SB_.PCI0.GRFX.TRP0)
Notify(\_SB_.PCI0.GRFX, 0x80)
}
}
Notify(\_SB_.PCI0.GRFX, 0x81)
}
Method(_L1C, 0x00) {
Store(\_SB_.PHS1, 0x98)
0x00
Local0
If(LEqual(Local0, 0x01)) {
Notify(\_SB_.PWRB, 0x02)
}
}
}
Scope(\_TZ_) {
ThermalZone(THRM) {
Method(_TMP, 0x00) {
If(LEqual(\ECON, 0x01)) {
Store(\_SB_.PCI0.LPCB.H_EC.CTMP, Local0)
If(LNot(LEqual(Local0, 0xFF))) {
Multiply(Local0, 0x0A, Local0)
Add(Local0, 0x0AAC, Local0)
Return(Local0)
}
}
Return(0x0C1C)
}
Method(_AC0, 0x00) {
Store(0x41, Local0)
Multiply(Local0, 0x0A, Local0)
Add(Local0, 0x0AAC, Local0)
Return(Local0)
}
Name(_AL0, Package(0x01) {
FAN0
})
Method(_PSV, 0x00) {
Store(0x55, Local0)
Multiply(Local0, 0x0A, Local0)
Add(Local0, 0x0AAC, Local0)
Return(Local0)
}
Name(_PSL, Package(0x01) {
\_PR_.CPU0
})
Method(_CRT, 0x00) {
Store(0x78, Local0)
Multiply(Local0, 0x0A, Local0)
Add(Local0, 0x0AAC, Local0)
Return(Local0)
}
Method(_SCP, 0x01) {
Store(Not Support, Debug)
}
Name(_TC1, 0x04)
Name(_TC2, 0x03)
Name(_TSP, 0x012C)
}
}
PowerResource(PFAN, OperationRegion(PHSD, 0x00, 0x0F6F0D9D, 0x00000190)
Field(PHSD, 0x00) {
BCMD, 0x8,
DID_, 0x20,
INFO, 0xC50,
0x00, 0x8,
}
Field(PHSD, 0x00) {
0x00, 0x28,
INF_, 0x8,
INF1, 0x8,
INF2, 0x8,
INF3, 0x8,
}
Field(PHSD, 0x00) {
0x00, 0x28,
INFW, 0x10,
}
Field(PHSD, 0x00) {
0x00, 0x28,
INFD, 0x20,
}
OperationRegion(PHSI, 0x01, 0x0000FE00, 0x00000002)
Field(PHSI, 0x00) {
SMIC, 0x8,
}
Mutex(MPHS, 0x00)
Method(PHS_, 0x09) {
Acquire(MPHS)
Ones
Ones
Store(Arg0, BCMD)
Store(Zero, SMIC)
Store(0x00, BCMD)
Store(INF_, Local7)
Release(MPHS)
Return(Local7)
}
Method(PHSR, 0x09) {
Acquire(MPHS)
Ones
Ones
Store(Arg0, BCMD)
Store(Zero, SMIC)
Store(0x00, BCMD)
Store(INFD, Local7)
Release(MPHS)
Return(Local7)
}
Method(PHS1, 0x0A) {
Acquire(MPHS)
Ones
Ones
Store(Arg0, BCMD)
Store(Arg1, INF_)
Store(Zero, SMIC)
Store(0x00, BCMD)
Store(INF_, Local7)
Release(MPHS)
Return(Local7)
}
Method(PHS2, 0x0B) {
Acquire(MPHS)
Ones
Ones
Store(Arg0, BCMD)
Store(Arg1, INF_)
Store(Arg2, INF1)
Store(Zero, SMIC)
Store(0x00, BCMD)
Store(INFW, Local7)
Release(MPHS)
Return(Local7)
}
Method(PHS4, 0x0D) {
Acquire(MPHS)
Ones
Ones
Store(Arg0, BCMD)
Store(Arg1, INF_)
Store(Arg2, INF1)
Store(Arg3, INF2)
Store(Arg4, INF3)
Store(Zero, SMIC)
Store(0x00, BCMD)
Store(INFD, Local7)
Release(MPHS)
Return(Local7)
}
Device(ADP1) {
Name(_HID, ACPI0003)
Method(_PSR, 0x00) {
If(LEqual(\ECON, 0x00)) {
Store(\_SB_.PHS1, 0x96)
0x02
Local0
}
Else {
Store(\_SB_.PCI0.LPCB.H_EC.ACEX, Local0)
}
Return(Local0)
}
Method(_PCL, 0x00) {
Return(\_SB_)
}
Method(_STA, 0x00) {
If(LEqual(\ECON, 0x00)) {
Store(0x0F, Local0)
}
Else {
Store(0x0F, Local0)
}
Return(Local0)
}
}
Device(BAT1) {
Name(_HID, 0x0A0CD041)
Name(_UID, 0x01)
Name(BATI, Package(0x0D) {
0x01
0xFFFFFFFF
0xFFFFFFFF
0x01
0xFFFFFFFF
0x03
0x0A
0x01
0x01
Unknown
Unknown
Unknown
Unknown
})
Method(_BIF, 0x00) {
If(LEqual(\ECON, 0x00)) {
Store(\_SB_.PHS2, 0x9A)
0xB0
0x00
Local0
If(LEqual(Local0, 0xFFFF)) {
Store(0xFFFFFFFF, Index(BATI, 0x01))
Zero
}
Else {
Store(Local0, Index(BATI, 0x01))
Zero
}
Store(\_SB_.PHS2, 0x9A)
0xB2
0x00
Local0
If(LEqual(Local0, 0xFFFF)) {
Store(0xFFFFFFFF, Index(BATI, 0x02))
Zero
}
Else {
Store(Local0, Index(BATI, 0x02))
Zero
}
Store(\_SB_.PHS2, 0x9A)
0xB4
0x00
Local0
If(LEqual(Local0, 0xFFFF)) {
Store(0xFFFFFFFF, Index(BATI, 0x04))
Zero
}
Else {
Store(Local0, Index(BATI, 0x04))
Zero
}
Store(0x00, Index(BATI, 0x05))
Zero
Store(Zero, Index(BATI, 0x06))
Zero
}
Else {
Store(\_SB_.PCI0.LPCB.H_EC.B1DA, Local0)
ShiftLeft(Local0, 0x08, Local1)
And(Local1, 0xFF00, Local1)
ShiftRight(Local0, 0x08, Local0)
Or(Local0, Local1, Local0)
If(LEqual(Local0, 0xFFFF)) {
Store(0xFFFFFFFF, Index(BATI, 0x01))
Zero
}
Else {
Store(Local0, Index(BATI, 0x01))
Zero
}
Store(\_SB_.PCI0.LPCB.H_EC.B1DF, Local0)
ShiftLeft(Local0, 0x08, Local1)
And(Local1, 0xFF00, Local1)
ShiftRight(Local0, 0x08, Local0)
Or(Local0, Local1, Local0)
If(LEqual(Local0, 0xFFFF)) {
Store(0xFFFFFFFF, Index(BATI, 0x02))
Zero
}
Else {
Store(Local0, Index(BATI, 0x02))
Zero
}
Store(\_SB_.PCI0.LPCB.H_EC.B1DV, Local0)
ShiftLeft(Local0, 0x08, Local1)
And(Local1, 0xFF00, Local1)
ShiftRight(Local0, 0x08, Local0)
Or(Local0, Local1, Local0)
If(LEqual(Local0, 0xFFFF)) {
Store(0xFFFFFFFF, Index(BATI, 0x04))
Zero
}
Else {
Store(Local0, Index(BATI, 0x04))
Zero
}
Store(0x00, Index(BATI, 0x05))
Zero
Store(0x00, Local0)
Store(Local0, Index(BATI, 0x06))
Zero
}
Store(0x01, Index(BATI, 0x07))
Zero
Store(0x01, Index(BATI, 0x08))
Zero
Store(, Index(BATI, 0x09))
Zero
Store(, Index(BATI, 0x0A))
Zero
Store(LION, Index(BATI, 0x0B))
Zero
Store(DELL Computer Corp., Index(BATI, 0x0C))
Zero
Return(BATI)
}
Name(STAT, Package(0x04) {
0x00
0x00
0x00
0x00
})
Method(_BST, 0x00) {
If(LEqual(\ECON, 0x00)) {
Store(\_SB_.PHS2, 0x99)
0x84
0x00
Local0
If(LAnd(LNot(LEqual(Local0, 0x00)), LNot(LEqual(Local0, 0x05)))) {
If(LEqual(\ACON, 0x01)) {
Store(0x02, Local0)
}
Else {
Store(0x01, Local0)
}
}
Store(Local0, Index(STAT, 0x00))
Zero
Store(\_SB_.PHS2, 0x9A)
0xD4
0x00
Local0
If(LEqual(Local0, 0xFFFF)) {
Store(0xFFFFFFFF, Index(STAT, 0x01))
Zero
}
Else {
If(LNot(LLess(Local0, 0x8000))) {
XOr(Local0, 0xFFFF, Local0)
Increment(Local0)
}
Store(Local0, Index(STAT, 0x01))
Zero
}
Store(\_SB_.PHS2, 0x9A)
0xA2
0x00
Local0
If(LEqual(Local0, 0xFFFF)) {
Store(0xFFFFFFFF, Index(STAT, 0x02))
Zero
}
Else {
Store(Local0, Index(STAT, 0x02))
Zero
}
Store(\_SB_.PHS2, 0x9A)
0xA6
0x00
Local0
If(LEqual(Local0, 0xFFFF)) {
Store(0xFFFFFFFF, Index(STAT, 0x03))
Zero
}
Else {
Store(Local0, Index(STAT, 0x03))
Zero
}
}
Else {
Store(\_SB_.PCI0.LPCB.H_EC.B1ST, Local0)
If(LAnd(LNot(LEqual(Local0, 0x00)), LNot(LEqual(Local0, 0x05)))) {
If(LEqual(\ACON, 0x01)) {
Store(0x02, Local0)
}
Else {
Store(0x01, Local0)
}
}
Store(Local0, Index(STAT, 0x00))
Zero
Store(\_SB_.PCI0.LPCB.H_EC.B1CR, Local0)
ShiftLeft(Local0, 0x08, Local1)
And(Local1, 0xFF00, Local1)
ShiftRight(Local0, 0x08, Local0)
Or(Local0, Local1, Local0)
If(LEqual(Local0, 0xFFFF)) {
Store(0xFFFFFFFF, Index(STAT, 0x01))
Zero
}
Else {
If(LNot(LLess(Local0, 0x8000))) {
XOr(Local0, 0xFFFF, Local0)
Increment(Local0)
}
Store(Local0, Index(STAT, 0x01))
Zero
}
Store(\_SB_.PCI0.LPCB.H_EC.B1RA, Local0)
ShiftLeft(Local0, 0x08, Local1)
And(Local1, 0xFF00, Local1)
ShiftRight(Local0, 0x08, Local0)
Or(Local0, Local1, Local0)
If(LEqual(Local0, 0xFFFF)) {
Store(0xFFFFFFFF, Index(STAT, 0x02))
Zero
}
Else {
Store(Local0, Index(STAT, 0x02))
Zero
}
Store(\_SB_.PCI0.LPCB.H_EC.B1VO, Local0)
ShiftLeft(Local0, 0x08, Local1)
And(Local1, 0xFF00, Local1)
ShiftRight(Local0, 0x08, Local0)
Or(Local0, Local1, Local0)
If(LEqual(Local0, 0xFFFF)) {
Store(0xFFFFFFFF, Index(STAT, 0x03))
Zero
}
Else {
Store(Local0, Index(STAT, 0x03))
Zero
}
}
Return(STAT)
}
Method(_STA, 0x00) {
If(LEqual(\ECON, 0x00)) {
If(LEqual(\_SB_.PHS1, 0x96)) {
0x00
0x01
Store(0x1F, Local0)
}
Else {
Store(0x0F, Local0)
}
}
Else {
If(LEqual(\_SB_.PCI0.LPCB.H_EC.B1EX, 0x01)) {
Store(0x1F, Local0)
}
Else {
Store(0x0F, Local0)
}
}
Return(Local0)
}
Method(_PCL, 0x00) {
Return(\_SB_)
}
}
Device(DCK0) {
Name(_HID, 0x150CD041)
Name(_UID, 0x01)
Name(_BDN, 0x01)
Method(_STA, 0x00) {
Store(Store(GPS2, Local0), GPS2)
And(Store(GPS2, Local0), 0x80, Local0)
If(LEqual(Local0, 0x80)) {
Return(0x0F)
}
Else {
Return(0x00)
}
}
Method(_DCK, 0x01) {
If(LEqual(Arg0, 0x00)) {
If(LNot(LLess(OSYS, 0x07D0))) {
\_SB_.PCI0.LPCB.SIOD.SETD
0x03
\_SB_.PCI0.LPCB.SIOD.WRIT
0x30
Zero
\_SB_.PCI0.LPCB.SIOD.SETD
0x01
\_SB_.PCI0.LPCB.SIOD.WRIT
0x30
Zero
\_SB_.PCI0.LPCB.SIOD.SETD
0x03
Or(\_SB_.PCI0.LPCB.SIOD.READ, 0xF0, One)
Local0
\_SB_.PCI0.LPCB.SIOD.WRIT
0xF0
Local0
\_SB_.PCI0.LPCB.SIOD.SETD
0x01
Or(\_SB_.PCI0.LPCB.SIOD.READ, 0xF0, One)
Local0
\_SB_.PCI0.LPCB.SIOD.WRIT
0xF0
Local0
\_SB_.PHS_
0x91
}
Return(0x01)
}
Else {
\_SB_.PCI0.LPCB.SIOD.SETD
0x03
And(\_SB_.PCI0.LPCB.SIOD.READ, 0xF0, 0xFE)
Local0
\_SB_.PCI0.LPCB.SIOD.WRIT
0xF0
Local0
\_SB_.PCI0.LPCB.SIOD.SETD
0x01
And(\_SB_.PCI0.LPCB.SIOD.READ, 0xF0, 0xFE)
Local0
\_SB_.PCI0.LPCB.SIOD.WRIT
0xF0
Local0
\_SB_.PCI0.LPCB.SIOD.SETD
0x03
\_SB_.PCI0.LPCB.SIOD.WRIT
0x30
One
\_SB_.PCI0.LPCB.SIOD.SETD
0x01
\_SB_.PCI0.LPCB.SIOD.WRIT
0x30
One
\_SB_.PHS_
0x90
Sleep(0x03E8)
Return(0x01)
}
}
Method(_EJ0, 0x01) {
If(LLess(OSYS, 0x07D0)) {
\_SB_.PHS_
0x91
\_SB_.PCI0.LPCB.SIOD.SETD
0x03
\_SB_.PCI0.LPCB.SIOD.WRIT
0x30
Zero
\_SB_.PCI0.LPCB.SIOD.SETD
0x01
\_SB_.PCI0.LPCB.SIOD.WRIT
0x30
Zero
\_SB_.PCI0.LPCB.SIOD.SETD
0x03
Or(\_SB_.PCI0.LPCB.SIOD.READ, 0xF0, One)
Local0
\_SB_.PCI0.LPCB.SIOD.WRIT
0xF0
Local0
\_SB_.PCI0.LPCB.SIOD.SETD
0x01
Or(\_SB_.PCI0.LPCB.SIOD.READ, 0xF0, One)
Local0
\_SB_.PCI0.LPCB.SIOD.WRIT
0xF0
Local0
}
If(LNot(LLess(OSYS, 0x07D0))) {
While(And(Store(GPS2, Local0), 0x80, Local0)) {
Sleep(0x0A)
}
Sleep(0x01F4)
}
Return(0x01)
}
Method(_EJ4, 0x01) {
If(LLess(OSYS, 0x07D0)) {
\_SB_.PHS_
0x91
\_SB_.PCI0.LPCB.SIOD.SETD
0x03
\_SB_.PCI0.LPCB.SIOD.WRIT
0x30
Zero
\_SB_.PCI0.LPCB.SIOD.SETD
0x01
\_SB_.PCI0.LPCB.SIOD.WRIT
0x30
Zero
\_SB_.PCI0.LPCB.SIOD.SETD
0x03
Or(\_SB_.PCI0.LPCB.SIOD.READ, 0xF0, One)
Local0
\_SB_.PCI0.LPCB.SIOD.WRIT
0xF0
Local0
\_SB_.PCI0.LPCB.SIOD.SETD
0x01
Or(\_SB_.PCI0.LPCB.SIOD.READ, 0xF0, One)
Local0
\_SB_.PCI0.LPCB.SIOD.WRIT
0xF0
Local0
}
Return(0x01)
}
Name(DCBF, 0x00)
}
Device(PWRB) {
Name(_HID, 0x0C0CD041)
Name(_PRW, Package(0x02) {
0x1C
0x05
})
}
Device(LID0) {
Name(_HID, 0x0D0CD041)
Method(_STA, 0x00) {
Return(0x0F)
}
Method(_LID, 0x00) {
Store(GIV0, Local0)
And(Local0, 0x10, Local0)
If(LEqual(Local0, 0x10)) {
Return(0x01)
}
Else {
Return(0x00)
}
}
}
Device(SLPB) {
Name(_HID, 0x0E0CD041)
Method(_STA, 0x00) {
Return(0x0F)
}
}
Device(PCI0) {
Method(_INI, 0x00) {
Store(\_SB_.PHS1, 0x96)
0x02
Local0
If(Local0) {
Store(0x01, ACON)
}
Else {
Store(0x00, ACON)
}
If(CondRefOf(_OSI, Local0)) {
Store(0x07D1, OSYS)
Store(0x40, I72_)
Store(D73_, Local1)
Or(0x03, And(0xFC, Local1, Local1), Local1)
Store(Local1, D73_)
}
Else {
If(LEqual(SizeOf(_OS_), 0x14)) {
Store(0x07D0, OSYS)
Store(0x40, I72_)
Store(D73_, Local1)
Or(0x02, And(0xFC, Local1, Local1), Local1)
Store(Local1, D73_)
}
Else {
If(LEqual(SizeOf(_OS_), 0x27)) {
Store(0x07CF, OSYS)
Store(0x40, I72_)
Store(D73_, Local1)
Or(0x01, And(0xFC, Local1, Local1), Local1)
Store(Local1, D73_)
}
Else {
Store(0x07CE, OSYS)
Store(0x40, I72_)
Store(D73_, Local1)
Or(0x00, And(0xFC, Local1, Local1), Local1)
Store(Local1, D73_)
}
}
}
If(LEqual(OSYS, 0x07CE)) {
Store(0x01, ECON)
}
}
Device(FIGD) {
Name(_HID, 0x020CD041)
Name(_UID, 0x01)
Method(_STA, 0x00) {
If(LNot(LLess(OSYS, 0x07D0))) {
If(LEqual(IGDE, 0x00)) {
Return(0x0B)
}
}
Return(0x00)
}
Name(_CRS, Buffer(0x03F2) {
0x47, 0x01, 0xB0, 0x07, 0xB0, 0x07, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x07, 0xC0, 0x07, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x0B, 0xB0, 0x0B, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x0B, 0xC0, 0x0B, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x0F, 0xB0, 0x0F, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x0F, 0xC0, 0x0F, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x13, 0xB0, 0x13, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x13, 0xC0, 0x13, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x17, 0xB0, 0x17, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x17, 0xC0, 0x17, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x1B, 0xB0, 0x1B, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x1B, 0xC0, 0x1B, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x1F, 0xB0, 0x1F, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x1F, 0xC0, 0x1F, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x23, 0xB0, 0x23, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x23, 0xC0, 0x23, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x27, 0xB0, 0x27, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x27, 0xC0, 0x27, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x2B, 0xB0, 0x2B, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x2B, 0xC0, 0x2B, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x2F, 0xB0, 0x2F, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x2F, 0xC0, 0x2F, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x33, 0xB0, 0x33, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x33, 0xC0, 0x33, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x37, 0xB0, 0x37, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x37, 0xC0, 0x37, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x3B, 0xB0, 0x3B, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x3B, 0xC0, 0x3B, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x3F, 0xB0, 0x3F, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x3F, 0xC0, 0x3F, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x43, 0xB0, 0x43, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x43, 0xC0, 0x43, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x47, 0xB0, 0x47, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x47, 0xC0, 0x47, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x4B, 0xB0, 0x4B, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x4B, 0xC0, 0x4B, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x4F, 0xB0, 0x4F, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x4F, 0xC0, 0x4F, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x53, 0xB0, 0x53, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x53, 0xC0, 0x53, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x57, 0xB0, 0x57, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x57, 0xC0, 0x57, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x5B, 0xB0, 0x5B, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x5B, 0xC0, 0x5B, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x5F, 0xB0, 0x5F, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x5F, 0xC0, 0x5F, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x63, 0xB0, 0x63, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x63, 0xC0, 0x63, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x67, 0xB0, 0x67, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x67, 0xC0, 0x67, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x6B, 0xB0, 0x6B, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x6B, 0xC0, 0x6B, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x6F, 0xB0, 0x6F, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x6F, 0xC0, 0x6F, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x73, 0xB0, 0x73, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x73, 0xC0, 0x73, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x77, 0xB0, 0x77, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x77, 0xC0, 0x77, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x7B, 0xB0, 0x7B, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x7B, 0xC0, 0x7B, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x7F, 0xB0, 0x7F, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x7F, 0xC0, 0x7F, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x83, 0xB0, 0x83, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x83, 0xC0, 0x83, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x87, 0xB0, 0x87, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x87, 0xC0, 0x87, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x8B, 0xB0, 0x8B, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x8B, 0xC0, 0x8B, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x8F, 0xB0, 0x8F, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x8F, 0xC0, 0x8F, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x93, 0xB0, 0x93, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x93, 0xC0, 0x93, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x97, 0xB0, 0x97, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x97, 0xC0, 0x97, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x9B, 0xB0, 0x9B, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x9B, 0xC0, 0x9B, 0x01, 0x20,
0x47, 0x01, 0xB0, 0x9F, 0xB0, 0x9F, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0x9F, 0xC0, 0x9F, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xA3, 0xB0, 0xA3, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xA3, 0xC0, 0xA3, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xA7, 0xB0, 0xA7, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xA7, 0xC0, 0xA7, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xAB, 0xB0, 0xAB, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xAB, 0xC0, 0xAB, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xAF, 0xB0, 0xAF, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xAF, 0xC0, 0xAF, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xB3, 0xB0, 0xB3, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xB3, 0xC0, 0xB3, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xB7, 0xB0, 0xB7, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xB7, 0xC0, 0xB7, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xBB, 0xB0, 0xBB, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xBB, 0xC0, 0xBB, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xBF, 0xB0, 0xBF, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xBF, 0xC0, 0xBF, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xC3, 0xB0, 0xC3, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xC3, 0xC0, 0xC3, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xC7, 0xB0, 0xC7, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xC7, 0xC0, 0xC7, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xCB, 0xB0, 0xCB, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xCB, 0xC0, 0xCB, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xCF, 0xB0, 0xCF, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xCF, 0xC0, 0xCF, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xD3, 0xB0, 0xD3, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xD3, 0xC0, 0xD3, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xD7, 0xB0, 0xD7, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xD7, 0xC0, 0xD7, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xDB, 0xB0, 0xDB, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xDB, 0xC0, 0xDB, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xDF, 0xB0, 0xDF, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xDF, 0xC0, 0xDF, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xE3, 0xB0, 0xE3, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xE3, 0xC0, 0xE3, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xE7, 0xB0, 0xE7, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xE7, 0xC0, 0xE7, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xEB, 0xB0, 0xEB, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xEB, 0xC0, 0xEB, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xEF, 0xB0, 0xEF, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xEF, 0xC0, 0xEF, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xF3, 0xB0, 0xF3, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xF3, 0xC0, 0xF3, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xF7, 0xB0, 0xF7, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xF7, 0xC0, 0xF7, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xFB, 0xB0, 0xFB, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xFB, 0xC0, 0xFB, 0x01, 0x20,
0x47, 0x01, 0xB0, 0xFF, 0xB0, 0xFF, 0x01, 0x0C,
0x47, 0x01, 0xC0, 0xFF, 0xC0, 0xFF, 0x01, 0x20,
0x79, 0x00, })
}
Name(_HID, 0x030AD041)
Name(_ADR, 0x00)
Name(_BBN, 0x00)
OperationRegion(HBUS, 0x02, 0x40, 0xC0)
Field(HBUS, 0x03) {
0x00, 0x90,
0x00, 0x3,
IGDE, 0x1,
0x00, 0x2C,
0x00, 0x7,
HENA, 0x1,
0x00, 0x4,
PM0H, 0x2,
0x00, 0x2,
PM1L, 0x2,
0x00, 0x2,
PM1H, 0x2,
0x00, 0x2,
PM2L, 0x2,
0x00, 0x2,
PM2H, 0x2,
0x00, 0x2,
PM3L, 0x2,
0x00, 0x2,
PM3H, 0x2,
0x00, 0x2,
PM4L, 0x2,
0x00, 0x2,
PM4H, 0x2,
0x00, 0x2,
PM5L, 0x2,
0x00, 0x2,
PM5H, 0x2,
0x00, 0x2,
PM6L, 0x2,
0x00, 0x2,
PM6H, 0x2,
0x00, 0x2,
DRB0, 0x8,
DRB1, 0x8,
DRB2, 0x8,
DRB3, 0x8,
DRB4, 0x8,
DRB5, 0x8,
DRB6, 0x8,
DRB7, 0x8,
0x00, 0x40,
DRA0, 0x3,
0x00, 0x1,
DRA1, 0x3,
0x00, 0x1,
DRA2, 0x3,
0x00, 0x1,
DRA3, 0x3,
0x00, 0x1,
DRA4, 0x3,
0x00, 0x1,
DRA5, 0x3,
0x00, 0x1,
DRA6, 0x3,
0x00, 0x1,
DRA7, 0x3,
0x00, 0x1,
}
Name(BUF0, Buffer(0x0201) {
0x88, 0x0E, 0x00, 0x02, 0x0C, 0x00, 0x00, 0x00,
0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x01,
0x00, 0x87, 0x18, 0x00, 0x01, 0x0C, 0x03, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF7,
0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF8,
0x0C, 0x00, 0x00, 0x00, 0x47, 0x01, 0xF8, 0x0C,
0xF8, 0x0C, 0x01, 0x08, 0x87, 0x18, 0x00, 0x01,
0x0C, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0D,
0x00, 0x00, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0xF3, 0x00, 0x00, 0x00, 0x87,
0x18, 0x00, 0x00, 0x0C, 0x03, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x0A, 0x00, 0xFF, 0xFF, 0x0B,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
0x00, 0x00, 0x87, 0x18, 0x00, 0x00, 0x0C, 0x03,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x00,
0xFF, 0x3F, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x40, 0x00, 0x00, 0x00, 0x87, 0x18, 0x00,
0x00, 0x0C, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
0x40, 0x0C, 0x00, 0xFF, 0x7F, 0x0C, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
0x87, 0x18, 0x00, 0x00, 0x0C, 0x03, 0x00, 0x00,
0x00, 0x00, 0x00, 0x80, 0x0C, 0x00, 0xFF, 0xBF,
0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40,
0x00, 0x00, 0x00, 0x87, 0x18, 0x00, 0x00, 0x0C,
0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C,
0x00, 0xFF, 0xFF, 0x0C, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x87, 0x18,
0x00, 0x00, 0x0C, 0x03, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x0D, 0x00, 0xFF, 0x3F, 0x0D, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00,
0x00, 0x87, 0x18, 0x00, 0x00, 0x0C, 0x03, 0x00,
0x00, 0x00, 0x00, 0x00, 0x40, 0x0D, 0x00, 0xFF,
0x7F, 0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x40, 0x00, 0x00, 0x00, 0x87, 0x18, 0x00, 0x00,
0x0C, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
0x0D, 0x00, 0xFF, 0xBF, 0x0D, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x87,
0x18, 0x00, 0x00, 0x0C, 0x03, 0x00, 0x00, 0x00,
0x00, 0x00, 0xC0, 0x0D, 0x00, 0xFF, 0xFF, 0x0D,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00,
0x00, 0x00, 0x87, 0x18, 0x00, 0x00, 0x0C, 0x03,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0E, 0x00,
0xFF, 0x3F, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x40, 0x00, 0x00, 0x00, 0x87, 0x18, 0x00,
0x00, 0x0C, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
0x40, 0x0E, 0x00, 0xFF, 0x7F, 0x0E, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
0x87, 0x18, 0x00, 0x00, 0x0C, 0x03, 0x00, 0x00,
0x00, 0x00, 0x00, 0x80, 0x0E, 0x00, 0xFF, 0xBF,
0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40,
0x00, 0x00, 0x00, 0x87, 0x18, 0x00, 0x00, 0x0C,
0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x0E,
0x00, 0xFF, 0xFF, 0x0E, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x87, 0x18,
0x00, 0x00, 0x0C, 0x03, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x0F, 0x00, 0xFF, 0xFF, 0x0F, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
0x00, 0x87, 0x18, 0x00, 0x00, 0x0C, 0x03, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,
0xFF, 0xBF, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x87, 0x18, 0x00, 0x00,
0x0C, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x79,
0x00, })
Method(_CRS, 0x08) {
If(PM1L) {
CreateDWordField(BUF0, 0x80, C0LN)
Store(Zero, C0LN)
}
If(LEqual(PM1L, 0x01)) {
BitField(BUF0, 0x0378, C0RW)
Store(Zero, C0RW)
}
If(PM1H) {
CreateDWordField(BUF0, 0x9B, C4LN)
Store(Zero, C4LN)
}
If(LEqual(PM1H, 0x01)) {
BitField(BUF0, 0x0450, C4RW)
Store(Zero, C4RW)
}
If(PM2L) {
CreateDWordField(BUF0, 0xB6, C8LN)
Store(Zero, C8LN)
}
If(LEqual(PM2L, 0x01)) {
BitField(BUF0, 0x0528, C8RW)
Store(Zero, C8RW)
}
If(PM2H) {
CreateDWordField(BUF0, 0xD1, CCLN)
Store(Zero, CCLN)
}
If(LEqual(PM2H, 0x01)) {
BitField(BUF0, 0x0600, CCRW)
Store(Zero, CCRW)
}
If(PM3L) {
CreateDWordField(BUF0, 0xEC, D0LN)
Store(Zero, D0LN)
}
If(LEqual(PM3L, 0x01)) {
BitField(BUF0, 0x06D8, D0RW)
Store(Zero, D0RW)
}
If(PM3H) {
CreateDWordField(BUF0, 0x0107, D4LN)
Store(Zero, D4LN)
}
If(LEqual(PM3H, 0x01)) {
BitField(BUF0, 0x07B0, D4RW)
Store(Zero, D4RW)
}
If(PM4L) {
CreateDWordField(BUF0, 0x0122, D8LN)
Store(Zero, D8LN)
}
If(LEqual(PM4L, 0x01)) {
BitField(BUF0, 0x0888, D8RW)
Store(Zero, D8RW)
}
If(PM4H) {
CreateDWordField(BUF0, 0x013D, DCLN)
Store(Zero, DCLN)
}
If(LEqual(PM4H, 0x01)) {
BitField(BUF0, 0x0960, DCRW)
Store(Zero, DCRW)
}
If(PM5L) {
CreateDWordField(BUF0, 0x0158, E0LN)
Store(Zero, E0LN)
}
If(LEqual(PM5L, 0x01)) {
BitField(BUF0, 0x0A38, E0RW)
Store(Zero, E0RW)
}
If(PM5H) {
CreateDWordField(BUF0, 0x0173, E4LN)
Store(Zero, E4LN)
}
If(LEqual(PM5H, 0x01)) {
BitField(BUF0, 0x0B10, E4RW)
Store(Zero, E4RW)
}
If(PM6L) {
CreateDWordField(BUF0, 0x018E, E8LN)
Store(Zero, E8LN)
}
If(LEqual(PM6L, 0x01)) {
BitField(BUF0, 0x0BE8, E8RW)
Store(Zero, E8RW)
}
If(PM6H) {
CreateDWordField(BUF0, 0x01A9, ECLN)
Store(Zero, ECLN)
}
If(LEqual(PM6H, 0x01)) {
BitField(BUF0, 0x0CC0, ECRW)
Store(Zero, ECRW)
}
If(PM0H) {
CreateDWordField(BUF0, 0x01C4, F0LN)
Store(Zero, F0LN)
}
If(LEqual(PM0H, 0x01)) {
BitField(BUF0, 0x0D98, F0RW)
Store(Zero, F0RW)
}
CreateDWordField(BUF0, 0x01D3, M1MN)
CreateDWordField(BUF0, 0x01D7, M1MX)
CreateDWordField(BUF0, 0x01DF, M1LN)
Multiply(0x02000000, DRB5, M1MN)
Add(Subtract(M1MX, M1MN, Zero), 0x01, M1LN)
ShiftRight(And(\_SB_.PCI0.LPCB.MTSE, 0x00038000, Zero), 0x0F, Local0)
If(And(Local0, 0x04, Zero)) {
CreateDWordField(BUF0, 0x01EE, M2MN)
CreateDWordField(BUF0, 0x01F2, M2MX)
CreateDWordField(BUF0, 0x01FA, M2LN)
Store(0xFED00000, M2MN)
Store(0xFED003FF, M2MX)
Store(0x0400, M2LN)
If(LEqual(Local0, 0x05)) {
Store(0xFED01000, M2MN)
Store(0xFED013FF, M2MX)
}
If(LEqual(Local0, 0x06)) {
Store(0xFED02000, M2MN)
Store(0xFED023FF, M2MX)
}
If(LEqual(Local0, 0x07)) {
Store(0xFED03000, M2MN)
Store(0xFED033FF, M2MX)
}
}
Return(BUF0)
}
Method(_PRT, 0x00) {
If(GPIC) {
Return(Package(0x06) {
Package(0x04) {
0x0002FFFF
0x00
0x00
0x10
}
Package(0x04) {
0x001DFFFF
0x00
0x00
0x10
}
Package(0x04) {
0x001DFFFF
0x01
0x00
0x13
}
Package(0x04) {
0x001DFFFF
0x02
0x00
0x12
}
Package(0x04) {
0x001FFFFF
0x00
0x00
0x12
}
Package(0x04) {
0x001FFFFF
0x01
0x00
0x11
}
})
}
Else {
Return(Package(0x06) {
Package(0x04) {
0x0002FFFF
0x00
\_SB_.PCI0.LPCB.LNKA
0x00
}
Package(0x04) {
0x001DFFFF
0x00
\_SB_.PCI0.LPCB.LNKA
0x00
}
Package(0x04) {
0x001DFFFF
0x01
\_SB_.PCI0.LPCB.LNKD
0x00
}
Package(0x04) {
0x001DFFFF
0x02
\_SB_.PCI0.LPCB.LNKC
0x00
}
Package(0x04) {
0x001FFFFF
0x00
\_SB_.PCI0.LPCB.LNKC
0x00
}
Package(0x04) {
0x001FFFFF
0x01
\_SB_.PCI0.LPCB.LNKB
0x00
}
})
}
}
Device(AGPB) {
Name(_ADR, 0x00010000)
Method(_PRT, 0x00) {
If(GPIC) {
Return(Package(0x02) {
Package(0x04) {
0xFFFF
0x00
0x00
0x10
}
Package(0x04) {
0xFFFF
0x01
0x00
0x11
}
})
}
Else {
Return(Package(0x02) {
Package(0x04) {
0xFFFF
0x00
\_SB_.PCI0.LPCB.LNKA
0x00
}
Package(0x04) {
0xFFFF
0x01
\_SB_.PCI0.LPCB.LNKB
0x00
}
})
}
}
}
Device(GRFX) {
Name(_ADR, 0x00020000)
OperationRegion(IO_T, 0x01, 0x0800, 0x04)
Field(IO_T, 0x01) {
TRP0, 0x8,
}
OperationRegion(VGAB, 0x00, 0x0F6F0FAC, 0xC010)
Field(VGAB, 0x10) {
RSIZ, 0x20,
VFUN, 0x10,
CSTE, 0x10,
NSTE, 0x10,
SSTE, 0x10,
CADL, 0x10,
PADL, 0x10,
RBUF, 0x5F830,
}
Method(_DOS, 0x01) {
Store(And(Arg0, 0x03, Zero), DSEN)
}
Method(_DOD, 0x00) {
Name(PSIZ, 0x00)
Name(PPTR, 0x00)
Store(0x02, VFUN)
Store(0x00, TRP0)
Or(CADL, 0x04, CADL)
Store(CADL, Local0)
Store(CADL, Local1)
Store(CADL, PADL)
While(Local1) {
If(And(Local1, 0x01, Zero)) {
Increment(PSIZ)
}
ShiftRight(Local1, 0x01, Local1)
}
If(LOr(LEqual(PSIZ, 0x00), LGreater(PSIZ, 0x06))) {
Store(0x00, ENUM)
Return(Package(0x01) {
0x00010100
})
}
Else {
Store(0x01, ENUM)
If(LEqual(PSIZ, 0x02)) {
Name(VID2, Package(0x02) {
0x00010100
0x00010200
})
If(And(Local0, 0x01, Zero)) {
Store(0x00010100, Index(VID2, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x02, Zero)) {
Store(0x00010200, Index(VID2, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x04, Zero)) {
Store(0x00010300, Index(VID2, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x08, Zero)) {
Store(0x00010400, Index(VID2, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x10, Zero)) {
Store(0x00010500, Index(VID2, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x20, Zero)) {
Store(0x00010600, Index(VID2, PPTR))
Zero
}
Return(VID2)
}
If(LEqual(PSIZ, 0x03)) {
Name(VID3, Package(0x03) {
0x00010100
0x00010200
0x00010300
})
If(And(Local0, 0x01, Zero)) {
Store(0x00010100, Index(VID3, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x02, Zero)) {
Store(0x00010200, Index(VID3, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x04, Zero)) {
Store(0x00010300, Index(VID3, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x08, Zero)) {
Store(0x00010400, Index(VID3, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x10, Zero)) {
Store(0x00010500, Index(VID3, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x20, Zero)) {
Store(0x00010600, Index(VID3, PPTR))
Zero
}
Return(VID3)
}
If(LEqual(PSIZ, 0x04)) {
Name(VID4, Package(0x04) {
0x00010100
0x00010200
0x00010300
0x00010400
})
If(And(Local0, 0x01, Zero)) {
Store(0x00010100, Index(VID4, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x02, Zero)) {
Store(0x00010200, Index(VID4, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x04, Zero)) {
Store(0x00010300, Index(VID4, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x08, Zero)) {
Store(0x00010400, Index(VID4, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x10, Zero)) {
Store(0x00010500, Index(VID4, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x20, Zero)) {
Store(0x00010600, Index(VID4, PPTR))
Zero
}
Return(VID4)
}
If(LEqual(PSIZ, 0x05)) {
Name(VID5, Package(0x05) {
0x00010100
0x00010200
0x00010300
0x00010400
0x00010500
})
If(And(Local0, 0x01, Zero)) {
Store(0x00010100, Index(VID5, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x02, Zero)) {
Store(0x00010200, Index(VID5, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x04, Zero)) {
Store(0x00010300, Index(VID5, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x08, Zero)) {
Store(0x00010400, Index(VID5, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x10, Zero)) {
Store(0x00010500, Index(VID5, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x20, Zero)) {
Store(0x00010600, Index(VID5, PPTR))
Zero
}
Return(VID5)
}
If(LEqual(PSIZ, 0x06)) {
Name(VID6, Package(0x06) {
0x00010100
0x00010200
0x00010300
0x00010400
0x00010500
0x00010600
})
If(And(Local0, 0x01, Zero)) {
Store(0x00010100, Index(VID6, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x02, Zero)) {
Store(0x00010200, Index(VID6, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x04, Zero)) {
Store(0x00010300, Index(VID6, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x08, Zero)) {
Store(0x00010400, Index(VID6, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x10, Zero)) {
Store(0x00010500, Index(VID6, PPTR))
Zero
Increment(PPTR)
}
If(And(Local0, 0x20, Zero)) {
Store(0x00010600, Index(VID6, PPTR))
Zero
}
Return(VID6)
}
Name(VID1, Package(0x01) {
0x00010100
})
If(And(Local0, 0x01, Zero)) {
Store(0x00010100, Index(VID1, 0x00))
Zero
}
If(And(Local0, 0x02, Zero)) {
Store(0x00010200, Index(VID1, 0x00))
Zero
}
If(And(Local0, 0x04, Zero)) {
Store(0x00010300, Index(VID1, 0x00))
Zero
}
If(And(Local0, 0x08, Zero)) {
Store(0x00010400, Index(VID1, 0x00))
Zero
}
If(And(Local0, 0x10, Zero)) {
Store(0x00010500, Index(VID1, 0x00))
Zero
}
If(And(Local0, 0x08, Zero)) {
Store(0x00010600, Index(VID1, 0x00))
Zero
}
Return(VID1)
}
}
Method(_ROM, 0x02) {
Store(Arg0, Local0)
Store(Arg1, Local1)
If(LGreater(Local1, 0x1000)) {
Store(0x1000, Local1)
}
If(LGreater(Add(Local0, Local1, Zero), RSIZ)) {
Store(0x00, Local0)
}
Multiply(Local0, 0x08, Local2)
Multiply(Local1, 0x08, Local3)
Name(ROM1, Buffer(RSIZ){})
Name(ROM2, Buffer(Local1){})
Store(RBUF, ROM1)
CreateField(ROM1, Local2, Local3, TMPB)
Store(TMPB, ROM2)
Return(ROM2)
}
Device(CRT1) {
Name(_ADR, 0x0100)
Method(_DCS, 0x00) {
Store(0x01, VFUN)
Store(0x00, TRP0)
Store(CSTE, Local0)
If(Local0) {
If(And(Local0, 0x01, Zero)) {
Return(0x1F)
}
}
Return(0x1D)
}
Method(_DGS, 0x00) {
Store(NSTE, Local0)
If(Local0) {
If(And(Local0, 0x01, Zero)) {
Return(0x01)
}
}
Return(0x00)
}
Method(_DSS, 0x01){}
}
Device(DTV1) {
Name(_ADR, 0x0200)
Method(_DCS, 0x00) {
Store(0x01, VFUN)
Store(0x00, TRP0)
Store(CSTE, Local0)
If(Local0) {
If(And(Local0, 0x0202, Zero)) {
Return(0x1F)
}
}
Return(0x1D)
}
Method(_DGS, 0x00) {
Store(NSTE, Local0)
If(Local0) {
If(And(Local0, 0x0202, Zero)) {
Return(0x01)
}
}
Return(0x00)
}
Method(_DSS, 0x01){}
}
Device(DFP1) {
Name(_ADR, 0x0300)
Method(_DCS, 0x00) {
Store(0x01, VFUN)
Store(0x00, TRP0)
Store(CSTE, Local0)
Or(Local0, 0x04, Local0)
If(Local0) {
If(And(Local0, 0x0404, Zero)) {
Return(0x1F)
}
}
Return(0x1D)
}
Method(_DGS, 0x00) {
Store(NSTE, Local0)
If(Local0) {
If(And(Local0, 0x0404, Zero)) {
Return(0x01)
}
}
Return(0x00)
}
Method(_DSS, 0x01){}
}
Device(LFP1) {
Name(_ADR, 0x0400)
Method(_DCS, 0x00) {
Store(0x01, VFUN)
Store(0x00, TRP0)
Store(CSTE, Local0)
If(Local0) {
If(And(Local0, 0x0808, Zero)) {
Return(0x1F)
}
}
Return(0x1D)
}
Method(_DGS, 0x00) {
Store(NSTE, Local0)
If(Local0) {
If(And(Local0, 0x0808, Zero)) {
Return(0x01)
}
}
Return(0x00)
}
Method(_DSS, 0x01){}
}
Device(DTV2) {
Name(_ADR, 0x0500)
Method(_DCS, 0x00) {
Store(0x01, VFUN)
Store(0x00, TRP0)
Store(CSTE, Local0)
If(Local0) {
If(And(Local0, 0x1010, Zero)) {
Return(0x1F)
}
}
Return(0x1D)
}
Method(_DGS, 0x00) {
Store(NSTE, Local0)
If(Local0) {
If(And(Local0, 0x1010, Zero)) {
Return(0x01)
}
}
Return(0x00)
}
Method(_DSS, 0x01){}
}
Device(DFP2) {
Name(_ADR, 0x0600)
Method(_DCS, 0x00) {
Store(0x01, VFUN)
Store(0x00, TRP0)
Store(CSTE, Local0)
If(Local0) {
If(And(Local0, 0x2020, Zero)) {
Return(0x1F)
}
}
Return(0x1D)
}
Method(_DGS, 0x00) {
Store(NSTE, Local0)
If(Local0) {
If(And(Local0, 0x2020, Zero)) {
Return(0x01)
}
}
Return(0x00)
}
Method(_DSS, 0x01){}
}
}
Device(PCIB) {
Name(_ADR, 0x001E0000)
Device(LANC) {
Name(_ADR, 0x00050000)
Name(_PRW, Package(0x02) {
0x0B
0x05
})
}
Device(CDB_) {
Name(_ADR, 0x00030000)
OperationRegion(CBD0, 0x02, 0x00, 0xC0)
Field(CBD0, 0x00) {
0x00, 0x1E0,
CD3C, 0x8,
0x00, 0x38,
CD44, 0x20,
0x00, 0x2E8,
CDA5, 0x8,
}
Name(_PRW, Package(0x02) {
0x0B
0x03
})
Method(_INI, 0x00) {
Or(CD3C, 0xFF, CD3C)
Store(0x00, CD44)
}
Method(_STA, 0x00) {
Return(0x0F)
}
}
Device(OHCI) {
Name(_ADR, 0x00030001)
Name(_EJD, _SB.DCK0)
Name(_PRW, Package(0x02) {
0x0B
0x03
})
Method(_STA, 0x00) {
Return(0x0F)
}
}
Method(_PRT, 0x00) {
If(GPIC) {
Return(Package(0x06) {
Package(0x04) {
0x0003FFFF
0x00
0x00
0x10
}
Package(0x04) {
0x0003FFFF
0x01
0x00
0x12
}
Package(0x04) {
0x0006FFFF
0x00
0x00
0x12
}
Package(0x04) {
0x0005FFFF
0x00
0x00
0x13
}
Package(0x04) {
0x0007FFFF
0x00
0x00
0x14
}
Package(0x04) {
0x0007FFFF
0x01
0x00
0x15
}
})
}
Else {
Return(Package(0x06) {
Package(0x04) {
0x0003FFFF
0x00
\_SB_.PCI0.LPCB.LNKA
0x00
}
Package(0x04) {
0x0003FFFF
0x01
\_SB_.PCI0.LPCB.LNKC
0x00
}
Package(0x04) {
0x0006FFFF
0x00
\_SB_.PCI0.LPCB.LNKC
0x00
}
Package(0x04) {
0x0005FFFF
0x00
\_SB_.PCI0.LPCB.LNKD
0x00
}
Package(0x04) {
0x0007FFFF
0x00
\_SB_.PCI0.LPCB.LNKE
0x00
}
Package(0x04) {
0x0007FFFF
0x01
\_SB_.PCI0.LPCB.LNKF
0x00
}
})
}
}
}
Device(LPCB) {
Name(_ADR, 0x001F0000)
OperationRegion(LPC0, 0x02, 0x40, 0xC0)
Field(LPC0, 0x00) {
0x00, 0x100,
PIRA, 0x8,
PIRB, 0x8,
PIRC, 0x8,
PIRD, 0x8,
0x00, 0x20,
PIRE, 0x8,
PIRF, 0x8,
PIRG, 0x8,
PIRH, 0x8,
0x00, 0x320,
MTSE, 0x20,
0x00, 0x60,
CMAD, 0x3,
0x00, 0x5,
LPAD, 0x2,
}
Method(IRQS, 0x08) {
Name(BUF1, Buffer(0x06) {0x23, 0x00, 0x0C, 0x18, 0x79, 0x00, })
Return(BUF1)
}
Method(IRQT, 0x08) {
Name(BUF2, Buffer(0x06) {0x23, 0x00, 0x04, 0x18, 0x79, 0x00, })
Return(BUF2)
}
Method(IRQA, 0x08) {
Name(BUF2, Buffer(0x06) {0x23, 0x00, 0x04, 0x18, 0x79, 0x00, })
Return(BUF2)
}
Method(IRQB, 0x08) {
Name(BUF2, Buffer(0x06) {0x23, 0x00, 0x08, 0x18, 0x79, 0x00, })
Return(BUF2)
}
Device(LNKA) {
Name(_HID, 0x0F0CD041)
Name(_UID, 0x01)
Method(_DIS, 0x08) {
Or(PIRA, 0x80, PIRA)
}
Method(_PRS, 0x08) {
Return(IRQA)
}
Method(_CRS, 0x08) {
Name(RTLA, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateWordField(RTLA, 0x01, IRQ0)
Store(Zero, IRQ0)
If(LNot(And(PIRA, 0x80, Zero))) {
And(PIRA, 0x0F, Local0)
ShiftLeft(0x01, Local0, IRQ0)
}
Return(RTLA)
}
Method(_SRS, 0x09) {
CreateWordField(Arg0, 0x01, IRQ0)
FindSetRightBit(IRQ0, Local0)
Decrement(Local0)
Store(Local0, PIRA)
}
Method(_STA, 0x08) {
If(And(PIRA, 0x80, Zero)) {
Return(0x09)
}
Else {
Return(0x0B)
}
}
}
Device(LNKB) {
Name(_HID, 0x0F0CD041)
Name(_UID, 0x02)
Method(_DIS, 0x08) {
Or(PIRB, 0x80, PIRB)
}
Method(_PRS, 0x08) {
Return(IRQA)
}
Method(_CRS, 0x08) {
Name(RTLB, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateWordField(RTLB, 0x01, IRQ0)
Store(Zero, IRQ0)
If(LNot(And(PIRB, 0x80, Zero))) {
And(PIRB, 0x0F, Local0)
ShiftLeft(0x01, Local0, IRQ0)
}
Return(RTLB)
}
Method(_SRS, 0x09) {
CreateWordField(Arg0, 0x01, IRQ0)
FindSetRightBit(IRQ0, Local0)
Decrement(Local0)
Store(Local0, PIRB)
}
Method(_STA, 0x08) {
If(And(PIRB, 0x80, Zero)) {
Return(0x09)
}
Else {
Return(0x0B)
}
}
}
Device(LNKC) {
Name(_HID, 0x0F0CD041)
Name(_UID, 0x03)
Method(_DIS, 0x08) {
Or(PIRC, 0x80, PIRC)
}
Method(_PRS, 0x08) {
Return(IRQB)
}
Method(_CRS, 0x08) {
Name(RTLC, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateWordField(RTLC, 0x01, IRQ0)
Store(Zero, IRQ0)
If(LNot(And(PIRC, 0x80, Zero))) {
And(PIRC, 0x0F, Local0)
ShiftLeft(0x01, Local0, IRQ0)
}
Return(RTLC)
}
Method(_SRS, 0x09) {
CreateWordField(Arg0, 0x01, IRQ0)
FindSetRightBit(IRQ0, Local0)
Decrement(Local0)
Store(Local0, PIRC)
}
Method(_STA, 0x08) {
If(And(PIRC, 0x80, Zero)) {
Return(0x09)
}
Else {
Return(0x0B)
}
}
}
Device(LNKD) {
Name(_HID, 0x0F0CD041)
Name(_UID, 0x04)
Method(_DIS, 0x08) {
Or(PIRD, 0x80, PIRD)
}
Method(_PRS, 0x08) {
Return(IRQB)
}
Method(_CRS, 0x08) {
Name(RTLD, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateWordField(RTLD, 0x01, IRQ0)
Store(Zero, IRQ0)
If(LNot(And(PIRD, 0x80, Zero))) {
And(PIRD, 0x0F, Local0)
ShiftLeft(0x01, Local0, IRQ0)
}
Return(RTLD)
}
Method(_SRS, 0x09) {
CreateWordField(Arg0, 0x01, IRQ0)
FindSetRightBit(IRQ0, Local0)
Decrement(Local0)
Store(Local0, PIRD)
}
Method(_STA, 0x08) {
If(And(PIRD, 0x80, Zero)) {
Return(0x09)
}
Else {
Return(0x0B)
}
}
}
Device(LNKE) {
Name(_HID, 0x0F0CD041)
Name(_UID, 0x05)
Method(_DIS, 0x08) {
Or(PIRE, 0x80, PIRE)
}
Method(_PRS, 0x08) {
Return(IRQA)
}
Method(_CRS, 0x08) {
Name(RTLE, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateWordField(RTLE, 0x01, IRQ0)
Store(Zero, IRQ0)
If(LNot(And(PIRE, 0x80, Zero))) {
And(PIRE, 0x0F, Local0)
ShiftLeft(0x01, Local0, IRQ0)
}
Return(RTLE)
}
Method(_SRS, 0x09) {
CreateWordField(Arg0, 0x01, IRQ0)
FindSetRightBit(IRQ0, Local0)
Decrement(Local0)
Store(Local0, PIRE)
}
Method(_STA, 0x08) {
If(And(PIRE, 0x80, Zero)) {
Return(0x09)
}
Else {
Return(0x0B)
}
}
}
Device(LNKF) {
Name(_HID, 0x0F0CD041)
Name(_UID, 0x06)
Method(_DIS, 0x08) {
Or(PIRF, 0x80, PIRF)
}
Method(_PRS, 0x08) {
Return(IRQA)
}
Method(_CRS, 0x08) {
Name(RTLF, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateWordField(RTLF, 0x01, IRQ0)
Store(Zero, IRQ0)
If(LNot(And(PIRF, 0x80, Zero))) {
And(PIRF, 0x0F, Local0)
ShiftLeft(0x01, Local0, IRQ0)
}
Return(RTLF)
}
Method(_SRS, 0x09) {
CreateWordField(Arg0, 0x01, IRQ0)
FindSetRightBit(IRQ0, Local0)
Decrement(Local0)
Store(Local0, PIRF)
}
Method(_STA, 0x08) {
If(And(PIRF, 0x80, Zero)) {
Return(0x09)
}
Else {
Return(0x0B)
}
}
}
Device(LNKG) {
Name(_HID, 0x0F0CD041)
Name(_UID, 0x07)
Method(_DIS, 0x08) {
Or(PIRG, 0x80, PIRG)
}
Method(_PRS, 0x08) {
Return(IRQS)
}
Method(_CRS, 0x08) {
Name(RTLG, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateWordField(RTLG, 0x01, IRQ0)
Store(Zero, IRQ0)
If(LNot(And(PIRG, 0x80, Zero))) {
And(PIRG, 0x0F, Local0)
ShiftLeft(0x01, Local0, IRQ0)
}
Return(RTLG)
}
Method(_SRS, 0x09) {
CreateWordField(Arg0, 0x01, IRQ0)
FindSetRightBit(IRQ0, Local0)
Decrement(Local0)
Store(Local0, PIRG)
}
Method(_STA, 0x08) {
If(And(PIRG, 0x80, Zero)) {
Return(0x09)
}
Else {
Return(0x0B)
}
}
}
Device(LNKH) {
Name(_HID, 0x0F0CD041)
Name(_UID, 0x08)
Method(_DIS, 0x08) {
Or(PIRH, 0x80, PIRH)
}
Method(_PRS, 0x08) {
Return(IRQS)
}
Method(_CRS, 0x08) {
Name(RTLH, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateWordField(RTLH, 0x01, IRQ0)
Store(Zero, IRQ0)
If(LNot(And(PIRH, 0x80, Zero))) {
And(PIRH, 0x0F, Local0)
ShiftLeft(0x01, Local0, IRQ0)
}
Return(RTLH)
}
Method(_SRS, 0x09) {
CreateWordField(Arg0, 0x01, IRQ0)
FindSetRightBit(IRQ0, Local0)
Decrement(Local0)
Store(Local0, PIRH)
}
Method(_STA, 0x08) {
If(And(PIRH, 0x80, Zero)) {
Return(0x09)
}
Else {
Return(0x0B)
}
}
}
Device(TIMR) {
Name(_HID, 0x0001D041)
Name(BUF0, Buffer(0x12) {
0x47, 0x01, 0x40, 0x00, 0x40, 0x00, 0x01, 0x04,
0x47, 0x01, 0x50, 0x00, 0x50, 0x00, 0x10, 0x04,
0x79, 0x00, })
Name(BUF1, Buffer(0x15) {
0x47, 0x01, 0x40, 0x00, 0x40, 0x00, 0x01, 0x04,
0x47, 0x01, 0x50, 0x00, 0x50, 0x00, 0x10, 0x04,
0x22, 0x01, 0x00, 0x79, 0x00, })
Method(_CRS, 0x08) {
If(And(MTSE, 0x00020000, Zero)) {
Return(BUF0)
}
Return(BUF1)
}
}
Device(IPIC) {
Name(_HID, 0xD041)
Name(_CRS, Buffer(0x8D) {
0x47, 0x01, 0x20, 0x00, 0x20, 0x00, 0x01, 0x02,
0x47, 0x01, 0x24, 0x00, 0x24, 0x00, 0x01, 0x02,
0x47, 0x01, 0x28, 0x00, 0x28, 0x00, 0x01, 0x02,
0x47, 0x01, 0x2C, 0x00, 0x2C, 0x00, 0x01, 0x02,
0x47, 0x01, 0x30, 0x00, 0x30, 0x00, 0x01, 0x02,
0x47, 0x01, 0x34, 0x00, 0x34, 0x00, 0x01, 0x02,
0x47, 0x01, 0x38, 0x00, 0x38, 0x00, 0x01, 0x02,
0x47, 0x01, 0x3C, 0x00, 0x3C, 0x00, 0x01, 0x02,
0x47, 0x01, 0xA0, 0x00, 0xA0, 0x00, 0x01, 0x02,
0x47, 0x01, 0xA4, 0x00, 0xA4, 0x00, 0x01, 0x02,
0x47, 0x01, 0xA8, 0x00, 0xA8, 0x00, 0x01, 0x02,
0x47, 0x01, 0xAC, 0x00, 0xAC, 0x00, 0x01, 0x02,
0x47, 0x01, 0xB0, 0x00, 0xB0, 0x00, 0x01, 0x02,
0x47, 0x01, 0xB4, 0x00, 0xB4, 0x00, 0x01, 0x02,
0x47, 0x01, 0xB8, 0x00, 0xB8, 0x00, 0x01, 0x02,
0x47, 0x01, 0xBC, 0x00, 0xBC, 0x00, 0x01, 0x02,
0x47, 0x01, 0xD0, 0x04, 0xD0, 0x04, 0x01, 0x02,
0x22, 0x04, 0x00, 0x79, 0x00, })
}
Device(RTC_) {
Name(_HID, 0x000BD041)
Name(BUF0, Buffer(0x0A) {
0x47, 0x01, 0x70, 0x00, 0x70, 0x00, 0x01, 0x08,
0x79, 0x00, })
Name(BUF1, Buffer(0x0D) {
0x47, 0x01, 0x70, 0x00, 0x70, 0x00, 0x01, 0x08,
0x22, 0x00, 0x01, 0x79, 0x00, })
Method(_CRS, 0x08) {
If(And(MTSE, 0x00020000, Zero)) {
Return(BUF0)
}
Return(BUF1)
}
}
Device(MATH) {
Name(_HID, 0x040CD041)
Name(_CRS, Buffer(0x0D) {
0x47, 0x01, 0xF0, 0x00, 0xF0, 0x00, 0x01, 0x01,
0x22, 0x00, 0x20, 0x79, 0x00, })
}
Device(DMAC) {
Name(_HID, 0x0002D041)
Name(_CRS, Buffer(0x2D) {
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x20,
0x47, 0x01, 0x81, 0x00, 0x81, 0x00, 0x01, 0x0F,
0x47, 0x01, 0x90, 0x00, 0x90, 0x00, 0x01, 0x02,
0x47, 0x01, 0x93, 0x00, 0x93, 0x00, 0x01, 0x0D,
0x47, 0x01, 0xC0, 0x00, 0xC0, 0x00, 0x01, 0x20,
0x2A, 0x10, 0x01, 0x79, 0x00, })
}
Device(MBRD) {
Name(_HID, 0x020CD041)
Name(_CRS, Buffer(0x7A) {
0x47, 0x01, 0x2E, 0x00, 0x2E, 0x00, 0x01, 0x02,
0x47, 0x01, 0x61, 0x00, 0x61, 0x00, 0x01, 0x01,
0x47, 0x01, 0x63, 0x00, 0x63, 0x00, 0x01, 0x01,
0x47, 0x01, 0x65, 0x00, 0x65, 0x00, 0x01, 0x01,
0x47, 0x01, 0x67, 0x00, 0x67, 0x00, 0x01, 0x01,
0x47, 0x01, 0x80, 0x00, 0x80, 0x00, 0x01, 0x01,
0x47, 0x01, 0x92, 0x00, 0x92, 0x00, 0x01, 0x01,
0x47, 0x01, 0x00, 0x06, 0x00, 0x06, 0x01, 0x10,
0x47, 0x01, 0x00, 0x07, 0x00, 0x07, 0x01, 0x10,
0x47, 0x01, 0x00, 0x80, 0x00, 0x80, 0x01, 0x80,
0x47, 0x01, 0x80, 0x80, 0x80, 0x80, 0x01, 0x40,
0x47, 0x01, 0x00, 0x08, 0x00, 0x08, 0x01, 0x04,
0x47, 0x01, 0x70, 0x01, 0x70, 0x01, 0x01, 0x08,
0x47, 0x01, 0x38, 0x03, 0x38, 0x03, 0x01, 0x08,
0x47, 0x01, 0x00, 0xFE, 0x00, 0xFE, 0x01, 0x01,
0x79, 0x00, })
}
Device(FWHD) {
Name(_HID, 0x0008D425)
Name(_CRS, Buffer(0x0E) {
0x86, 0x09, 0x00, 0x00, 0x00, 0x00, 0x80, 0xFF,
0x00, 0x00, 0x80, 0x00, 0x79, 0x00, })
}
Device(H_EC) {
Name(_HID, 0x090CD041)
Method(_CRS, 0x00) {
Name(BFFR, Buffer(0x12) {
0x47, 0x01, 0x62, 0x00, 0x62, 0x00, 0x00, 0x01,
0x47, 0x01, 0x66, 0x00, 0x66, 0x00, 0x00, 0x01,
0x79, 0x00, })
Return(BFFR)
}
Method(_REG, 0x02) {
If(LEqual(Arg0, 0x03)) {
If(LEqual(Arg1, 0x01)) {
Store(0x01, \ECON)
Store(\_SB_.PCI0.LPCB.H_EC.ACEX, \ACON)
}
Else {
Store(0x00, \ECON)
}
}
}
Name(_GPE, 0x18)
Event(EJT0)
Event(EJT1)
OperationRegion(ECR_, 0x03, 0x00, 0xFF)
Field(ECR_, 0x10) {
0x00, 0x400,
B1EX, 0x1,
B2EX, 0x1,
ACEX, 0x1,
0x00, 0x5,
SWBE, 0x1,
DCBE, 0x1,
0x00, 0x6,
0x00, 0x8,
LIDS, 0x1,
0x00, 0x7,
B1ST, 0x8,
B2ST, 0x8,
0x00, 0xD0,
B1RP, 0x10,
B1RA, 0x10,
B1PR, 0x10,
B1VO, 0x10,
B2RP, 0x10,
B2RA, 0x10,
B2PR, 0x10,
B2VO, 0x10,
B1DA, 0x10,
B1DF, 0x10,
B1DV, 0x10,
B1DL, 0x10,
B2DA, 0x10,
B2DF, 0x10,
B2DV, 0x10,
B2DL, 0x10,
CTMP, 0x8,
0x00, 0x78,
B1TI, 0x10,
B1SE, 0x10,
B1CR, 0x10,
B1TM, 0x10,
B2TI, 0x10,
B2SE, 0x10,
B2CR, 0x10,
B2TM, 0x10,
}
Method(_Q50, 0x00) {
Notify(\_SB_.PWRB, 0x80)
}
Method(_Q51, 0x00) {
\_SB_.PHS_
0xA1
\_SB_.PHS_
0x9C
Store(0x01, \ACON)
Store(0x01, BTS0)
Notify(\_SB_.ADP1, 0x80)
}
Method(_Q52, 0x00) {
\_SB_.PHS_
0xA2
\_SB_.PHS_
0x9C
Store(0x00, \ACON)
Store(0x01, BTS0)
Notify(\_SB_.ADP1, 0x80)
}
Method(_Q53, 0x00) {
Store(0x01, BTS0)
Notify(\_SB_.BAT1, 0x81)
}
Method(_Q54, 0x00) {
Store(0x01, BTS0)
Notify(\_SB_.BAT1, 0x81)
}
Method(_Q58, 0x00) {
\_SB_.PHS_
0x89
Notify(\_SB_.DCK0, 0x01)
}
Method(_Q59, 0x00) {
\_SB_.PHS_
0x89
}
Method(_Q5A, 0x00) {
\_SB_.PHS_
0x8A
}
Method(_Q5B, 0x00) {
Notify(\_SB_.SLPB, 0x80)
}
Method(_Q5C, 0x00) {
\_SB_.PHS_
0x94
}
Method(_Q5D, 0x00) {
If(LNot(LGreater(OSYS, 0x07CF))) {
Store(0x79, P80H)
Store(0x06, \_SB_.PCI0.GRFX.VFUN)
Store(0x00, \_SB_.PCI0.GRFX.TRP0)
Notify(\_SB_.PCI0.GRFX, 0x81)
}
Else {
Store(0x7A, P80H)
Store(0x02, \_SB_.PCI0.GRFX.VFUN)
Store(0x00, \_SB_.PCI0.GRFX.TRP0)
Store(0x70, P80H)
If(LNot(LEqual(\_SB_.PCI0.GRFX.CADL, \_SB_.PCI0.GRFX.PADL))) {
Notify(\_SB_.PCI0, 0x00)
Sleep(0x03E8)
}
If(LEqual(0x00, DSEN)) {
If(ENUM) {
Store(0x7B, P80H)
Store(0x07, \_SB_.PCI0.GRFX.VFUN)
Store(0x00, \_SB_.PCI0.GRFX.TRP0)
Notify(\_SB_.PCI0.GRFX, 0x80)
}
}
If(LEqual(0x01, DSEN)) {
Store(0x06, \_SB_.PCI0.GRFX.VFUN)
Store(0x00, \_SB_.PCI0.GRFX.TRP0)
Notify(\_SB_.PCI0.GRFX, 0x81)
}
If(LNot(LLess(DSEN, 0x02))){}
}
}
Method(_Q60, 0x00) {
Store(0x60, P80H)
}
Method(_Q61, 0x00) {
If(LEqual(B1EX, 0x01)) {
Store(0x61, P80H)
Store(0x01, BTS0)
Notify(\_SB_.BAT1, 0x81)
Notify(\_SB_.BAT1, 0x80)
}
}
Method(_Q63, 0x00) {
\_SB_.PHS_
0x9E
}
Method(_Q64, 0x00) {
\_SB_.PHS_
0x9F
}
Method(_Q66, 0x00) {
Store(0x01, BTS0)
Notify(\_SB_.BAT1, 0x80)
}
Method(_Q6B, 0x00) {
Store(0x6B, P80H)
Store(0x01, BTS0)
Notify(\_SB_.BAT1, 0x81)
}
}
Device(PS2K) {
Name(_HID, 0x0303D041)
Name(_CRS, Buffer(0x16) {
0x47, 0x01, 0x60, 0x00, 0x60, 0x00, 0x01, 0x01,
0x47, 0x01, 0x64, 0x00, 0x64, 0x00, 0x01, 0x01,
0x23, 0x02, 0x00, 0x01, 0x79, 0x00, })
}
Device(PS2M) {
Name(_HID, 0x02002E4F)
Name(_CID, 0x130FD041)
Name(_CRS, Buffer(0x06) {0x23, 0x00, 0x10, 0x01, 0x79, 0x00, })
}
Device(SIOD) {
Name(_HID, 0x050AD041)
Method(_INI, 0x00) {
If(LEqual(\_SB_.DCK0._STA, 0x00)) {
SETD
0x01
WRIT
0x30
0x00
SETD
0x03
WRIT
0x30
0x00
}
}
OperationRegion(N391, 0x01, 0x2E, 0x02)
Field(N391, 0x01) {
INDX, 0x8,
DATA, 0x8,
}
Method(SETD, 0x01) {
Store(0x07, INDX)
Store(Arg0, DATA)
}
Method(READ, 0x01) {
Store(Arg0, INDX)
Store(DATA, Local0)
Return(Local0)
}
Method(WRIT, 0x02) {
Store(Arg0, INDX)
Store(Arg1, DATA)
}
Device(COMA) {
Name(_HID, 0x0105D041)
Name(_UID, 0x01)
Name(_EJD, _SB.DCK0)
Method(_STA, 0x00) {
If(\_SB_.DCK0._STA) {
If(CMAP) {
SETD
0x03
If(READ) {
0x30
Return(0x0F)
}
Return(0x0D)
}
Return(0x00)
}
Else {
Store(0x06, CMAD)
Return(0x00)
}
}
Method(_DIS, 0x00) {
SETD
0x03
WRIT
0x30
0x00
}
Method(_CRS, 0x00) {
Name(BUF0, Buffer(0x0D) {
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
0x22, 0x00, 0x00, 0x79, 0x00, })
If(LEqual(\_SB_.DCK0._STA, 0x00)) {
Return(BUF0)
}
SETD
0x03
If(CMAP) {
CreateByteField(BUF0, 0x02, IOL0)
CreateByteField(BUF0, 0x03, IOH0)
CreateByteField(BUF0, 0x04, IOL1)
CreateByteField(BUF0, 0x05, IOH1)
CreateByteField(BUF0, 0x07, LEN0)
CreateWordField(BUF0, 0x09, IRQW)
Store(READ, 0x60)
IOH0
Store(READ, 0x61)
IOL0
Store(READ, 0x60)
IOH1
Store(READ, 0x61)
IOL1
Store(0x08, LEN0)
And(READ, 0x70, 0x0F)
Local0
If(Local0) {
ShiftLeft(One, Local0, IRQW)
}
Else {
Store(Zero, IRQW)
}
}
Return(BUF0)
}
Method(_PRS, 0x00) {
Name(BUF0, Buffer(0x6B) {
0x31, 0x08, 0x47, 0x01, 0xF8, 0x03, 0xF8, 0x03,
0x01, 0x08, 0x22, 0x10, 0x00, 0x31, 0x08, 0x47,
0x01, 0xF8, 0x02, 0xF8, 0x02, 0x01, 0x08, 0x22,
0x10, 0x00, 0x31, 0x08, 0x47, 0x01, 0xE8, 0x03,
0xE8, 0x03, 0x01, 0x08, 0x22, 0x10, 0x00, 0x31,
0x08, 0x47, 0x01, 0xE8, 0x02, 0xE8, 0x02, 0x01,
0x08, 0x22, 0x10, 0x00, 0x31, 0x08, 0x47, 0x01,
0xF8, 0x03, 0xF8, 0x03, 0x01, 0x08, 0x22, 0x08,
0x00, 0x31, 0x08, 0x47, 0x01, 0xF8, 0x02, 0xF8,
0x02, 0x01, 0x08, 0x22, 0x08, 0x00, 0x31, 0x08,
0x47, 0x01, 0xE8, 0x03, 0xE8, 0x03, 0x01, 0x08,
0x22, 0x08, 0x00, 0x31, 0x08, 0x47, 0x01, 0xE8,
0x02, 0xE8, 0x02, 0x01, 0x08, 0x22, 0x08, 0x00,
0x38, 0x79, 0x00, })
Name(BUF1, Buffer(0x10) {
0x31, 0x08, 0x47, 0x01, 0x00, 0x00, 0x00, 0x00,
0x01, 0x00, 0x22, 0x00, 0x00, 0x38, 0x79, 0x00, })
If(LEqual(\_SB_.DCK0._STA, 0x00)) {
Return(BUF1)
}
If(CMAP) {
Return(BUF0)
}
Else {
Return(BUF1)
}
}
Method(_SRS, 0x01) {
CreateByteField(Arg0, 0x02, IOLO)
CreateByteField(Arg0, 0x03, IOHI)
CreateWordField(Arg0, 0x09, IRQW)
CreateWordField(Arg0, 0x02, IO2B)
SETD
0x03
WRIT
0x30
0x00
WRIT
0x61
IOLO
WRIT
0x60
IOHI
FindSetRightBit(IRQW, Local0)
If(LNot(LEqual(IRQW, Zero))) {
Decrement(Local0)
}
WRIT
0x70
Local0
If(LEqual(\_SB_.DCK0._STA, 0x00)) {
Store(0x06, CMAD)
}
Else {
If(LEqual(IO2B, 0x03F8)) {
Store(0x00, CMAD)
}
Else {
If(LEqual(IO2B, 0x02F8)) {
Store(0x01, CMAD)
}
Else {
If(LEqual(IO2B, 0x03E8)) {
Store(0x07, CMAD)
}
Else {
If(LEqual(IO2B, 0x02E8)) {
Store(0x05, CMAD)
}
}
}
}
}
If(\_SB_.DCK0._STA) {
SETD
0x03
WRIT
0x30
0x01
}
}
Method(_PS0, 0x00) {
If(\_SB_.DCK0._STA) {
SETD
0x03
WRIT
0x30
0x01
}
}
Method(_PS3, 0x00) {
SETD
0x03
WRIT
0x30
0x00
}
}
Device(FDSK) {
Name(_HID, 0x0007D041)
Method(_STA, 0x00) {
If(FDCP) {
SETD
0x00
If(READ) {
0x30
Return(0x0F)
}
Return(0x0D)
}
Return(0x00)
}
Method(_DIS, 0x00) {
SETD
0x00
WRIT
0x30
0x00
}
Method(_CRS, 0x00) {
Name(BUF0, Buffer(0x18) {
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
0x22, 0x00, 0x00, 0x2A, 0x00, 0x01, 0x79, 0x00, })
SETD
0x00
If(FDCP) {
CreateByteField(BUF0, 0x02, IOL0)
CreateByteField(BUF0, 0x03, IOH0)
CreateByteField(BUF0, 0x04, IOL1)
CreateByteField(BUF0, 0x05, IOH1)
CreateByteField(BUF0, 0x07, LEN0)
CreateByteField(BUF0, 0x0A, IOL2)
CreateByteField(BUF0, 0x0B, IOH2)
CreateByteField(BUF0, 0x0C, IOL3)
CreateByteField(BUF0, 0x0D, IOH3)
CreateByteField(BUF0, 0x0F, LEN1)
CreateWordField(BUF0, 0x11, IRQW)
CreateByteField(BUF0, 0x14, DMA0)
Store(And(READ, 0x61, 0xF0), Zero)
IOL0
Store(READ, 0x60)
IOH0
If(LAnd(IOL0, IOH0)) {
Store(IOL0, IOL1)
Store(IOH0, IOH1)
Store(Or(IOL0, 0x07, Zero), IOL2)
Store(IOH0, IOH2)
Store(IOL2, IOL3)
Store(IOH2, IOH3)
Store(0x06, LEN0)
Store(0x01, LEN1)
}
And(READ, 0x70, 0x0F)
Local0
If(Local0) {
ShiftLeft(One, Local0, IRQW)
}
Else {
Store(Zero, IRQW)
}
Store(READ, 0x74)
Local0
If(LEqual(Local0, 0x04)) {
Store(Zero, DMA0)
}
Else {
ShiftLeft(One, Local0, DMA0)
}
}
Return(BUF0)
}
Method(_PRS, 0x00) {
Name(BUF0, Buffer(0x1B) {
0x31, 0x08, 0x47, 0x01, 0xF0, 0x03, 0xF0, 0x03,
0x01, 0x06, 0x47, 0x01, 0xF7, 0x03, 0xF7, 0x03,
0x01, 0x01, 0x22, 0x40, 0x00, 0x2A, 0x04, 0x01,
0x38, 0x79, 0x00, })
Name(BUF1, Buffer(0x18) {
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
0x22, 0x00, 0x00, 0x2A, 0x00, 0x01, 0x79, 0x00, })
If(FDCP) {
Return(BUF0)
}
Else {
Return(BUF1)
}
}
Method(_SRS, 0x01) {
CreateByteField(Arg0, 0x02, IOLO)
CreateByteField(Arg0, 0x03, IOHI)
CreateWordField(Arg0, 0x11, IRQW)
CreateWordField(Arg0, 0x14, DMAC)
SETD
0x00
WRIT
0x30
0x00
WRIT
0x61
IOLO
WRIT
0x60
IOHI
FindSetRightBit(IRQW, Local0)
If(LNot(LEqual(IRQW, Zero))) {
Decrement(Local0)
}
WRIT
0x70
Local0
FindSetRightBit(DMAC, Local0)
If(LNot(LEqual(DMAC, Zero))) {
Decrement(Local0)
}
WRIT
0x74
Local0
WRIT
0x30
0x01
}
Method(_PS0, 0x00) {
SETD
0x00
WRIT
0x30
0x01
}
Method(_PS3, 0x00) {
SETD
0x00
WRIT
0x30
0x00
}
}
Device(POUT) {
Name(_HID, 0x0004D041)
Name(_UID, 0x01)
Name(_EJD, _SB.DCK0)
Method(_STA, 0x00) {
If(\_SB_.DCK0._STA) {
SETD
0x01
If(LEqual(And(READ, 0xF0, 0xE0), Zero)) {
0x00
If(LPTP) {
SETD
0x01
If(READ) {
0x30
Return(0x0F)
}
Return(0x0D)
}
}
Return(0x00)
}
Else {
Store(0x03, LPAD)
Return(0x00)
}
}
Method(_DIS, 0x00) {
SETD
0x01
If(LEqual(And(READ, 0xF0, 0xE0), Zero)) {
0x00
WRIT
0x30
0x00
}
}
Method(_CRS, 0x00) {
Name(BUF0, Buffer(0x0D) {
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
0x22, 0x00, 0x00, 0x79, 0x00, })
If(LEqual(\_SB_.DCK0._STA, 0x00)) {
Return(BUF0)
}
If(LAnd(LPTP, LEqual(And(READ, 0xF0, 0xE0), Zero))) {
0x00
CreateByteField(BUF0, 0x02, IOL0)
CreateByteField(BUF0, 0x03, IOH0)
CreateByteField(BUF0, 0x04, IOL1)
CreateByteField(BUF0, 0x05, IOH1)
CreateByteField(BUF0, 0x07, LEN0)
CreateWordField(BUF0, 0x09, IRQW)
SETD
0x01
Store(READ, 0x61)
IOL0
Store(READ, 0x60)
IOH0
Store(IOL0, IOL1)
Store(IOH0, IOH1)
Store(0x08, LEN0)
If(And(READ, 0x70, 0x0F)) {
Zero
ShiftLeft(One, And(READ, 0x70, 0x0F), Zero)
IRQW
}
Else {
Store(Zero, IRQW)
}
}
Return(BUF0)
}
Method(_PRS, 0x00) {
Name(BUF0, Buffer(0x51) {
0x31, 0x08, 0x47, 0x01, 0x78, 0x03, 0x78, 0x03,
0x01, 0x04, 0x22, 0x80, 0x00, 0x31, 0x08, 0x47,
0x01, 0x78, 0x02, 0x78, 0x02, 0x01, 0x04, 0x22,
0x80, 0x00, 0x31, 0x08, 0x47, 0x01, 0x78, 0x01,
0x78, 0x01, 0x01, 0x04, 0x22, 0x80, 0x00, 0x31,
0x08, 0x47, 0x01, 0x78, 0x03, 0x78, 0x03, 0x01,
0x04, 0x22, 0x20, 0x00, 0x31, 0x08, 0x47, 0x01,
0x78, 0x02, 0x78, 0x02, 0x01, 0x04, 0x22, 0x20,
0x00, 0x31, 0x08, 0x47, 0x01, 0x78, 0x01, 0x78,
0x01, 0x01, 0x04, 0x22, 0x20, 0x00, 0x38, 0x79,
0x00, })
Name(BUF1, Buffer(0x10) {
0x31, 0x08, 0x47, 0x01, 0x00, 0x00, 0x00, 0x00,
0x01, 0x00, 0x22, 0x00, 0x00, 0x38, 0x79, 0x00, })
If(LEqual(\_SB_.DCK0._STA, 0x00)) {
Return(BUF1)
}
If(LAnd(LPTP, LEqual(And(READ, 0xF0, 0xE0), Zero))) {
0x00
Return(BUF0)
}
Else {
Return(BUF1)
}
}
Method(_SRS, 0x01) {
CreateByteField(Arg0, 0x02, IOL0)
CreateByteField(Arg0, 0x03, IOH0)
CreateWordField(Arg0, 0x09, IRQW)
CreateWordField(Arg0, 0x02, IO2B)
SETD
0x01
WRIT
0x30
0x00
WRIT
0xF0
And(READ, 0xF0, 0x0F)
Zero
WRIT
0x74
0x04
WRIT
0x61
IOL0
WRIT
0x60
IOH0
FindSetRightBit(IRQW, Local0)
If(LNot(LEqual(IRQW, Zero))) {
Decrement(Local0)
}
WRIT
0x70
Local0
If(LEqual(\_SB_.DCK0._STA, 0x00)) {
Store(0x03, LPAD)
}
Else {
If(LEqual(IO2B, 0x0378)) {
Store(0x00, LPAD)
}
Else {
If(LEqual(IO2B, 0x0278)) {
Store(0x01, LPAD)
}
Else {
If(LEqual(IO2B, 0x0178)) {
Store(0x03, LPAD)
}
}
}
}
If(\_SB_.DCK0._STA) {
WRIT
0x30
0x01
}
}
Method(_PS0, 0x00) {
If(\_SB_.DCK0._STA) {
SETD
0x01
WRIT
0x30
0x01
}
}
Method(_PS3, 0x00) {
SETD
0x01
WRIT
0x30
0x00
}
}
Device(PBID) {
Name(_HID, 0x0004D041)
Name(_UID, 0x02)
Name(_EJD, _SB.DCK0)
Method(_STA, 0x00) {
If(\_SB_.DCK0._STA) {
SETD
0x01
If(LEqual(And(READ, 0xF0, 0xE0), Zero)) {
0x20
If(LPTP) {
If(READ) {
0x30
Return(0x0F)
}
Return(0x0D)
}
}
Return(0x00)
}
Else {
Store(0x03, LPAD)
Return(0x00)
}
}
Method(_DIS, 0x00) {
SETD
0x01
If(LEqual(And(READ, 0xF0, 0xE0), Zero)) {
0x20
WRIT
0x30
0x00
}
}
Method(_CRS, 0x00) {
Name(BUF0, Buffer(0x0D) {
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
0x22, 0x00, 0x00, 0x79, 0x00, })
If(LEqual(\_SB_.DCK0._STA, 0x00)) {
Return(BUF0)
}
If(LAnd(LPTP, LEqual(And(READ, 0xF0, 0xE0), Zero))) {
0x20
CreateByteField(BUF0, 0x02, IOL0)
CreateByteField(BUF0, 0x03, IOH0)
CreateByteField(BUF0, 0x04, IOL1)
CreateByteField(BUF0, 0x05, IOH1)
CreateByteField(BUF0, 0x07, LEN0)
CreateWordField(BUF0, 0x09, IRQW)
SETD
0x01
Store(READ, 0x61)
IOL0
Store(READ, 0x60)
IOH0
Store(IOL0, IOL1)
Store(IOH0, IOH1)
If(LEqual(IOL0, 0x78)) {
Store(0x08, LEN0)
}
Else {
Store(0x04, LEN0)
}
If(And(READ, 0x70, 0x0F)) {
Zero
ShiftLeft(One, And(READ, 0x70, 0x0F), Zero)
IRQW
}
Else {
Store(Zero, IRQW)
}
}
Return(BUF0)
}
Method(_PRS, 0x00) {
Name(BUF0, Buffer(0x51) {
0x31, 0x08, 0x47, 0x01, 0x78, 0x03, 0x78, 0x03,
0x01, 0x08, 0x22, 0x80, 0x00, 0x31, 0x08, 0x47,
0x01, 0x78, 0x02, 0x78, 0x02, 0x01, 0x08, 0x22,
0x80, 0x00, 0x31, 0x08, 0x47, 0x01, 0x78, 0x01,
0x78, 0x01, 0x01, 0x08, 0x22, 0x80, 0x00, 0x31,
0x08, 0x47, 0x01, 0x78, 0x03, 0x78, 0x03, 0x01,
0x08, 0x22, 0x20, 0x00, 0x31, 0x08, 0x47, 0x01,
0x78, 0x02, 0x78, 0x02, 0x01, 0x08, 0x22, 0x20,
0x00, 0x31, 0x08, 0x47, 0x01, 0x78, 0x01, 0x78,
0x01, 0x01, 0x08, 0x22, 0x20, 0x00, 0x38, 0x79,
0x00, })
Name(BUF1, Buffer(0x10) {
0x31, 0x08, 0x47, 0x01, 0x00, 0x00, 0x00, 0x00,
0x01, 0x00, 0x22, 0x00, 0x00, 0x38, 0x79, 0x00, })
If(LEqual(\_SB_.DCK0._STA, 0x00)) {
Return(BUF1)
}
If(LAnd(LPTP, LEqual(And(READ, 0xF0, 0xE0), Zero))) {
0x20
Return(BUF0)
}
Else {
Return(BUF1)
}
}
Method(_SRS, 0x01) {
CreateByteField(Arg0, 0x02, IOL0)
CreateByteField(Arg0, 0x03, IOH0)
CreateWordField(Arg0, 0x09, IRQW)
CreateWordField(Arg0, 0x02, IO2B)
SETD
0x01
WRIT
0x30
0x00
WRIT
0xF0
Or(0x20, And(READ, 0xF0, 0x0F), Zero)
Zero
WRIT
0x74
0x04
WRIT
0x61
IOL0
WRIT
0x60
IOH0
FindSetRightBit(IRQW, Local0)
If(LNot(LEqual(IRQW, Zero))) {
Decrement(Local0)
}
WRIT
0x70
Local0
If(LEqual(\_SB_.DCK0._STA, 0x00)) {
Store(0x03, LPAD)
}
Else {
If(LEqual(IO2B, 0x0378)) {
Store(0x00, LPAD)
}
Else {
If(LEqual(IO2B, 0x0278)) {
Store(0x01, LPAD)
}
Else {
If(LEqual(IO2B, 0x0178)) {
Store(0x03, LPAD)
}
}
}
}
If(\_SB_.DCK0._STA) {
WRIT
0x30
0x01
}
}
Method(_PS0, 0x00) {
If(\_SB_.DCK0._STA) {
SETD
0x01
WRIT
0x30
0x01
}
}
Method(_PS3, 0x00) {
SETD
0x01
WRIT
0x30
0x00
}
}
Device(PEPP) {
Name(_HID, 0x0004D041)
Name(_UID, 0x03)
Name(_EJD, _SB.DCK0)
Method(_STA, 0x00) {
If(\_SB_.DCK0._STA) {
SETD
0x01
If(LEqual(And(READ, 0xF0, 0xE0), Zero)) {
0x60
If(LPTP) {
If(READ) {
0x30
Return(0x0F)
}
Else {
Return(0x0D)
}
}
}
Return(0x00)
}
Else {
Store(0x03, LPAD)
Return(0x00)
}
}
Method(_DIS, 0x00) {
SETD
0x01
If(LEqual(And(READ, 0xF0, 0xE0), Zero)) {
0x60
WRIT
0x30
0x00
}
}
Method(_CRS, 0x00) {
Name(BUF0, Buffer(0x0D) {
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
0x22, 0x00, 0x00, 0x79, 0x00, })
If(LEqual(\_SB_.DCK0._STA, 0x00)) {
Return(BUF0)
}
If(LAnd(LPTP, LEqual(And(READ, 0xF0, 0xE0), Zero))) {
0x60
CreateByteField(BUF0, 0x02, IOL0)
CreateByteField(BUF0, 0x03, IOH0)
CreateByteField(BUF0, 0x04, IOL1)
CreateByteField(BUF0, 0x05, IOH1)
CreateByteField(BUF0, 0x07, LEN0)
CreateWordField(BUF0, 0x09, IRQW)
SETD
0x01
Store(READ, 0x61)
IOL0
Store(READ, 0x60)
IOH0
Store(IOL0, IOL1)
Store(IOH0, IOH1)
Store(0x08, LEN0)
If(And(READ, 0x70, 0x0F)) {
Zero
ShiftLeft(One, And(READ, 0x70, 0x0F), Zero)
IRQW
}
Else {
Store(Zero, IRQW)
}
}
Return(BUF0)
}
Method(_PRS, 0x00) {
Name(BUF0, Buffer(0x51) {
0x31, 0x08, 0x47, 0x01, 0x78, 0x03, 0x78, 0x03,
0x01, 0x08, 0x22, 0x80, 0x00, 0x31, 0x08, 0x47,
0x01, 0x78, 0x02, 0x78, 0x02, 0x01, 0x08, 0x22,
0x80, 0x00, 0x31, 0x08, 0x47, 0x01, 0x78, 0x01,
0x78, 0x01, 0x01, 0x08, 0x22, 0x80, 0x00, 0x31,
0x08, 0x47, 0x01, 0x78, 0x03, 0x78, 0x03, 0x01,
0x08, 0x22, 0x20, 0x00, 0x31, 0x08, 0x47, 0x01,
0x78, 0x02, 0x78, 0x02, 0x01, 0x08, 0x22, 0x20,
0x00, 0x31, 0x08, 0x47, 0x01, 0x78, 0x01, 0x78,
0x01, 0x01, 0x08, 0x22, 0x20, 0x00, 0x38, 0x79,
0x00, })
Name(BUF1, Buffer(0x10) {
0x31, 0x08, 0x47, 0x01, 0x00, 0x00, 0x00, 0x00,
0x01, 0x00, 0x22, 0x00, 0x00, 0x38, 0x79, 0x00, })
If(LEqual(\_SB_.DCK0._STA, 0x00)) {
Return(BUF1)
}
If(LAnd(LPTP, LEqual(And(READ, 0xF0, 0xE0), Zero))) {
0x60
Return(BUF0)
}
Else {
Return(BUF1)
}
}
Method(_SRS, 0x01) {
CreateByteField(Arg0, 0x02, IOL0)
CreateByteField(Arg0, 0x03, IOH0)
CreateWordField(Arg0, 0x09, IRQW)
CreateWordField(Arg0, 0x02, IO2B)
SETD
0x01
WRIT
0x30
0x00
WRIT
0xF0
Or(0x60, And(READ, 0xF0, 0x0F), Zero)
Zero
WRIT
0x74
0x04
WRIT
0x61
IOL0
WRIT
0x60
IOH0
FindSetRightBit(IRQW, Local0)
If(LNot(LEqual(IRQW, Zero))) {
Decrement(Local0)
}
WRIT
0x70
Local0
If(LEqual(\_SB_.DCK0._STA, 0x00)) {
Store(0x03, LPAD)
}
Else {
If(LEqual(IO2B, 0x0378)) {
Store(0x00, LPAD)
}
Else {
If(LEqual(IO2B, 0x0278)) {
Store(0x01, LPAD)
}
Else {
If(LEqual(IO2B, 0x0178)) {
Store(0x03, LPAD)
}
}
}
}
If(\_SB_.DCK0._STA) {
WRIT
0x30
0x01
}
}
Method(_PS0, 0x00) {
If(\_SB_.DCK0._STA) {
SETD
0x01
WRIT
0x30
0x01
}
}
Method(_PS3, 0x00) {
SETD
0x01
WRIT
0x30
0x00
}
}
Device(PECP) {
Name(_HID, 0x0104D041)
Name(_UID, 0x04)
Name(_EJD, _SB.DCK0)
Method(_STA, 0x00) {
If(\_SB_.DCK0._STA) {
SETD
0x01
If(LEqual(And(READ, 0xF0, 0xE0), Zero)) {
0xE0
If(LPTP) {
If(READ) {
0x30
Return(0x0F)
}
Else {
Return(0x0D)
}
}
}
Return(0x00)
}
Else {
Store(0x03, LPAD)
Return(0x00)
}
}
Method(_DIS, 0x00) {
SETD
0x01
If(LEqual(And(READ, 0xF0, 0xE0), Zero)) {
0xE0
WRIT
0x30
0x00
}
}
Method(_CRS, 0x00) {
Name(BUF0, Buffer(0x18) {
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
0x22, 0x00, 0x00, 0x2A, 0x00, 0x01, 0x79, 0x00, })
If(LEqual(\_SB_.DCK0._STA, 0x00)) {
Return(BUF0)
}
If(LAnd(LPTP, LEqual(And(READ, 0xF0, 0xE0), Zero))) {
0xE0
CreateByteField(BUF0, 0x02, IOL0)
CreateByteField(BUF0, 0x03, IOH0)
CreateByteField(BUF0, 0x04, IOL1)
CreateByteField(BUF0, 0x05, IOH1)
CreateByteField(BUF0, 0x07, LEN0)
CreateByteField(BUF0, 0x0A, IOL2)
CreateByteField(BUF0, 0x0B, IOH2)
CreateByteField(BUF0, 0x0C, IOL3)
CreateByteField(BUF0, 0x0D, IOH3)
CreateByteField(BUF0, 0x0F, LEN1)
CreateWordField(BUF0, 0x11, IRQW)
CreateByteField(BUF0, 0x14, DMA0)
SETD
0x01
Store(READ, 0x61)
IOL0
Store(READ, 0x60)
IOH0
Store(IOL0, IOL1)
Store(IOH0, IOH1)
Store(IOL0, IOL2)
Store(Add(0x04, IOH0, Zero), IOH2)
Store(IOL0, IOL3)
Store(Add(0x04, IOH0, Zero), IOH3)
Store(0x08, LEN0)
Store(0x08, LEN1)
And(READ, 0x70, 0x0F)
Local0
If(Local0) {
ShiftLeft(One, Local0, IRQW)
}
Else {
Store(Zero, IRQW)
}
Store(READ, 0x74)
Local0
If(LEqual(Local0, 0x04)) {
Store(Zero, DMA0)
}
Else {
ShiftLeft(One, Local0, DMA0)
}
}
Return(BUF0)
}
Method(_PRS, 0x00) {
Name(BUF0, Buffer(0x01B3) {
0x31, 0x08, 0x47, 0x01, 0x78, 0x03, 0x78, 0x03,
0x01, 0x08, 0x47, 0x01, 0x78, 0x07, 0x78, 0x07,
0x01, 0x08, 0x22, 0x80, 0x00, 0x2A, 0x08, 0x01,
0x31, 0x08, 0x47, 0x01, 0x78, 0x02, 0x78, 0x02,
0x01, 0x08, 0x47, 0x01, 0x78, 0x06, 0x78, 0x06,
0x01, 0x08, 0x22, 0x80, 0x00, 0x2A, 0x08, 0x01,
0x31, 0x08, 0x47, 0x01, 0x78, 0x01, 0x78, 0x01,
0x01, 0x08, 0x47, 0x01, 0x78, 0x06, 0x78, 0x06,
0x01, 0x08, 0x22, 0x80, 0x00, 0x2A, 0x08, 0x01,
0x31, 0x08, 0x47, 0x01, 0x78, 0x03, 0x78, 0x03,
0x01, 0x08, 0x47, 0x01, 0x78, 0x07, 0x78, 0x07,
0x01, 0x08, 0x22, 0x20, 0x00, 0x2A, 0x08, 0x01,
0x31, 0x08, 0x47, 0x01, 0x78, 0x02, 0x78, 0x02,
0x01, 0x08, 0x47, 0x01, 0x78, 0x06, 0x78, 0x06,
0x01, 0x08, 0x22, 0x20, 0x00, 0x2A, 0x08, 0x01,
0x31, 0x08, 0x47, 0x01, 0x78, 0x01, 0x78, 0x01,
0x01, 0x08, 0x47, 0x01, 0x78, 0x06, 0x78, 0x06,
0x01, 0x08, 0x22, 0x20, 0x00, 0x2A, 0x08, 0x01,
0x31, 0x08, 0x47, 0x01, 0x78, 0x03, 0x78, 0x03,
0x01, 0x08, 0x47, 0x01, 0x78, 0x07, 0x78, 0x07,
0x01, 0x08, 0x22, 0x80, 0x00, 0x2A, 0x02, 0x01,
0x31, 0x08, 0x47, 0x01, 0x78, 0x02, 0x78, 0x02,
0x01, 0x08, 0x47, 0x01, 0x78, 0x06, 0x78, 0x06,
0x01, 0x08, 0x22, 0x80, 0x00, 0x2A, 0x02, 0x01,
0x31, 0x08, 0x47, 0x01, 0x78, 0x01, 0x78, 0x01,
0x01, 0x08, 0x47, 0x01, 0x78, 0x06, 0x78, 0x06,
0x01, 0x08, 0x22, 0x80, 0x00, 0x2A, 0x02, 0x01,
0x31, 0x08, 0x47, 0x01, 0x78, 0x03, 0x78, 0x03,
0x01, 0x08, 0x47, 0x01, 0x78, 0x07, 0x78, 0x07,
0x01, 0x08, 0x22, 0x20, 0x00, 0x2A, 0x02, 0x01,
0x31, 0x08, 0x47, 0x01, 0x78, 0x02, 0x78, 0x02,
0x01, 0x08, 0x47, 0x01, 0x78, 0x06, 0x78, 0x06,
0x01, 0x08, 0x22, 0x20, 0x00, 0x2A, 0x02, 0x01,
0x31, 0x08, 0x47, 0x01, 0x78, 0x01, 0x78, 0x01,
0x01, 0x08, 0x47, 0x01, 0x78, 0x06, 0x78, 0x06,
0x01, 0x08, 0x22, 0x20, 0x00, 0x2A, 0x02, 0x01,
0x31, 0x08, 0x47, 0x01, 0x78, 0x03, 0x78, 0x03,
0x01, 0x08, 0x47, 0x01, 0x78, 0x07, 0x78, 0x07,
0x01, 0x08, 0x22, 0x80, 0x00, 0x2A, 0x10, 0x01,
0x31, 0x08, 0x47, 0x01, 0x78, 0x02, 0x78, 0x02,
0x01, 0x08, 0x47, 0x01, 0x78, 0x06, 0x78, 0x06,
0x01, 0x08, 0x22, 0x80, 0x00, 0x2A, 0x10, 0x01,
0x31, 0x08, 0x47, 0x01, 0x78, 0x01, 0x78, 0x01,
0x01, 0x08, 0x47, 0x01, 0x78, 0x06, 0x78, 0x06,
0x01, 0x08, 0x22, 0x80, 0x00, 0x2A, 0x10, 0x01,
0x31, 0x08, 0x47, 0x01, 0x78, 0x03, 0x78, 0x03,
0x01, 0x08, 0x47, 0x01, 0x78, 0x07, 0x78, 0x07,
0x01, 0x08, 0x22, 0x20, 0x00, 0x2A, 0x10, 0x01,
0x31, 0x08, 0x47, 0x01, 0x78, 0x02, 0x78, 0x02,
0x01, 0x08, 0x47, 0x01, 0x78, 0x06, 0x78, 0x06,
0x01, 0x08, 0x22, 0x20, 0x00, 0x2A, 0x10, 0x01,
0x31, 0x08, 0x47, 0x01, 0x78, 0x01, 0x78, 0x01,
0x01, 0x08, 0x47, 0x01, 0x78, 0x06, 0x78, 0x06,
0x01, 0x08, 0x22, 0x20, 0x00, 0x2A, 0x10, 0x01,
0x38, 0x79, 0x00, })
Name(BUF1, Buffer(0x1B) {
0x31, 0x08, 0x47, 0x01, 0x00, 0x00, 0x00, 0x00,
0x01, 0x00, 0x47, 0x01, 0x00, 0x00, 0x00, 0x00,
0x01, 0x00, 0x22, 0x00, 0x00, 0x2A, 0x00, 0x01,
0x38, 0x79, 0x00, })
If(LEqual(\_SB_.DCK0._STA, 0x00)) {
Return(BUF1)
}
If(LAnd(LPTP, LEqual(And(READ, 0xF0, 0xE0), Zero))) {
0xE0
Return(BUF0)
}
Else {
Return(BUF1)
}
}
Method(_SRS, 0x01) {
CreateByteField(Arg0, 0x02, IOL0)
CreateByteField(Arg0, 0x03, IOH0)
CreateWordField(Arg0, 0x11, IRQW)
CreateByteField(Arg0, 0x14, DMA0)
CreateWordField(Arg0, 0x02, IO2B)
SETD
0x01
WRIT
0x30
0x00
WRIT
0xF0
Or(0xF0, READ, 0xF0)
Zero
WRIT
0x61
IOL0
WRIT
0x60
IOH0
FindSetRightBit(IRQW, Local0)
If(LNot(LEqual(IRQW, Zero))) {
Decrement(Local0)
}
WRIT
0x70
Local0
FindSetRightBit(DMA0, Local0)
If(LNot(LEqual(DMA0, Zero))) {
Decrement(Local0)
}
WRIT
0x74
Local0
If(LEqual(\_SB_.DCK0._STA, 0x00)) {
Store(0x03, LPAD)
}
Else {
If(LEqual(IO2B, 0x0378)) {
Store(0x00, LPAD)
}
Else {
If(LEqual(IO2B, 0x0278)) {
Store(0x01, LPAD)
}
Else {
If(LEqual(IO2B, 0x0178)) {
Store(0x03, LPAD)
}
}
}
}
If(\_SB_.DCK0._STA) {
WRIT
0x30
0x01
}
}
Method(_PS0, 0x00) {
If(\_SB_.DCK0._STA) {
SETD
0x01
WRIT
0x30
0x01
}
}
Method(_PS3, 0x00) {
SETD
0x01
WRIT
0x30
0x00
}
}
}
}
Device(USB0) {
Name(_ADR, 0x001D0000)
}
Device(USB1) {
Name(_ADR, 0x001D0001)
}
Device(USB2) {
Name(_ADR, 0x001D0002)
}
Name(NATA, Package(0x01) {
0x001F0001
})
Device(IDEC) {
Name(_ADR, 0x001F0001)
OperationRegion(IDEC, 0x02, 0x40, 0x18)
Field(IDEC, 0x03) {
PRIT, 0x10,
SECT, 0x10,
PSIT, 0x4,
SSIT, 0x4,
0x00, 0x18,
SYNC, 0x4,
0x00, 0xC,
SDT0, 0x2,
0x00, 0x2,
SDT1, 0x2,
0x00, 0x2,
SDT2, 0x2,
0x00, 0x2,
SDT3, 0x2,
0x00, 0x42,
ICR0, 0x4,
ICR1, 0x4,
ICR2, 0x4,
ICR3, 0x4,
ICR4, 0x4,
ICR5, 0x4,
}
Device(PRID) {
Name(_ADR, 0x00)
Method(_GTM, 0x00) {
Name(PBUF, Buffer(0x14) {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, })
CreateDWordField(PBUF, 0x00, PIO0)
CreateDWordField(PBUF, 0x04, DMA0)
CreateDWordField(PBUF, 0x08, PIO1)
CreateDWordField(PBUF, 0x0C, DMA1)
CreateDWordField(PBUF, 0x10, FLAG)
Store(GETP, PRIT)
PIO0
Store(GDMA, And(SYNC, 0x01, Zero))
And(ICR3, 0x01, Zero)
And(ICR0, 0x01, Zero)
SDT0
And(ICR1, 0x01, Zero)
DMA0
If(LEqual(DMA0, 0xFFFFFFFF)) {
Store(PIO0, DMA0)
}
If(And(PRIT, 0x4000, Zero)) {
If(LEqual(And(PRIT, 0x90, Zero), 0x80)) {
Store(0x0384, PIO1)
}
Else {
Store(GETT, PSIT)
PIO1
}
}
Else {
Store(0xFFFFFFFF, PIO1)
}
Store(GDMA, And(SYNC, 0x02, Zero))
And(ICR3, 0x02, Zero)
And(ICR0, 0x02, Zero)
SDT1
And(ICR1, 0x02, Zero)
DMA1
If(LEqual(DMA1, 0xFFFFFFFF)) {
Store(PIO1, DMA1)
}
Store(GETF, And(SYNC, 0x01, Zero))
And(SYNC, 0x02, Zero)
PRIT
FLAG
Return(PBUF)
}
Method(_STM, 0x03) {
CreateDWordField(Arg0, 0x00, PIO0)
CreateDWordField(Arg0, 0x04, DMA0)
CreateDWordField(Arg0, 0x08, PIO1)
CreateDWordField(Arg0, 0x0C, DMA1)
CreateDWordField(Arg0, 0x10, FLAG)
Store(0x04, ICR2)
If(LEqual(SizeOf(Arg1), 0x0200)) {
And(PRIT, 0x40F0, PRIT)
And(SYNC, 0x0E, SYNC)
Store(0x00, SDT0)
And(ICR0, 0x0E, ICR0)
And(ICR1, 0x0E, ICR1)
And(ICR3, 0x0E, ICR3)
And(ICR5, 0x0E, ICR5)
CreateWordField(Arg1, 0x62, W490)
CreateWordField(Arg1, 0x6A, W530)
CreateWordField(Arg1, 0x7E, W630)
CreateWordField(Arg1, 0x80, W640)
CreateWordField(Arg1, 0xB0, W880)
CreateWordField(Arg1, 0xBA, W930)
Or(PRIT, 0x8004, PRIT)
If(LAnd(And(FLAG, 0x02, Zero), And(W490, 0x0800, Zero))) {
Or(PRIT, 0x02, PRIT)
}
Or(PRIT, SETP, PIO0)
W530
W640
PRIT
If(And(FLAG, 0x01, Zero)) {
Or(SYNC, 0x01, SYNC)
Store(SDMA, DMA0)
SDT0
If(LLess(DMA0, 0x1E)) {
Or(ICR3, 0x01, ICR3)
}
If(LLess(DMA0, 0x3C)) {
Or(ICR0, 0x01, ICR0)
}
If(And(W930, 0x2000, Zero)) {
Or(ICR1, 0x01, ICR1)
}
}
}
}
Device(P_D0) {
Name(_ADR, 0x00)
Method(_GTF, 0x00) {
Name(PIB0, Buffer(0x0E) {
0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x03,
0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, })
CreateByteField(PIB0, 0x01, PMD0)
CreateByteField(PIB0, 0x08, DMD0)
If(And(PRIT, 0x02, Zero)) {
If(LEqual(And(PRIT, 0x09, Zero), 0x08)) {
Store(0x08, PMD0)
}
Else {
Store(0x0A, PMD0)
ShiftRight(And(PRIT, 0x0300, Zero), 0x08, Local0)
ShiftRight(And(PRIT, 0x3000, Zero), 0x0C, Local1)
Add(Local0, Local1, Local2)
If(LEqual(0x03, Local2)) {
Store(0x0B, PMD0)
}
If(LEqual(0x05, Local2)) {
Store(0x0C, PMD0)
}
}
}
Else {
Store(0x01, PMD0)
}
If(And(SYNC, 0x01, Zero)) {
Store(Or(SDT0, 0x40, Zero), DMD0)
If(And(ICR1, 0x01, Zero)) {
If(And(ICR0, 0x01, Zero)) {
Add(DMD0, 0x02, DMD0)
}
If(And(ICR3, 0x01, Zero)) {
Store(0x45, DMD0)
}
}
}
Else {
Or(Subtract(And(PMD0, 0x07, Zero), 0x02, Zero), 0x20, DMD0)
}
Return(PIB0)
}
}
Method(_PS0, 0x00){}
Method(_PS3, 0x00){}
}
Method(GETP, 0x01) {
If(LEqual(And(Arg0, 0x09, Zero), 0x00)) {
Return(0xFFFFFFFF)
}
If(LEqual(And(Arg0, 0x09, Zero), 0x08)) {
Return(0x0384)
}
ShiftRight(And(Arg0, 0x0300, Zero), 0x08, Local0)
ShiftRight(And(Arg0, 0x3000, Zero), 0x0C, Local1)
Return(Multiply(0x1E, Subtract(0x09, Add(Local0, Local1, Zero), Zero), Zero))
}
Method(GDMA, 0x05) {
If(Arg0) {
If(LAnd(Arg1, Arg4)) {
Return(0x14)
}
If(LAnd(Arg2, Arg4)) {
Return(Multiply(Subtract(0x04, Arg3, Zero), 0x0F, Zero))
}
Return(Multiply(Subtract(0x04, Arg3, Zero), 0x1E, Zero))
}
Return(0xFFFFFFFF)
}
Method(GETT, 0x01) {
Return(Multiply(0x1E, Subtract(0x09, Add(And(ShiftRight(Arg0, 0x02, Zero), 0x03, Zero), And(Arg0, 0x03, Zero), Zero), Zero), Zero))
}
Method(GETF, 0x03) {
Name(TMPF, 0x00)
If(Arg0) {
Or(TMPF, 0x01, TMPF)
}
If(And(Arg2, 0x02, Zero)) {
Or(TMPF, 0x02, TMPF)
}
If(Arg1) {
Or(TMPF, 0x04, TMPF)
}
If(And(Arg2, 0x20, Zero)) {
Or(TMPF, 0x08, TMPF)
}
If(And(Arg2, 0x4000, Zero)) {
Or(TMPF, 0x10, TMPF)
}
Return(TMPF)
}
Method(SETP, 0x03) {
If(LGreater(Arg0, 0xF0)) {
Return(0x08)
}
Else {
If(And(Arg1, 0x02, Zero)) {
If(LAnd(LNot(LGreater(Arg0, 0x78)), And(Arg2, 0x02, Zero))) {
Return(0x2301)
}
If(LAnd(LNot(LGreater(Arg0, 0xB4)), And(Arg2, 0x01, Zero))) {
Return(0x2101)
}
}
Return(0x1001)
}
}
Method(SDMA, 0x01) {
If(LNot(LGreater(Arg0, 0x14))) {
Return(0x01)
}
If(LNot(LGreater(Arg0, 0x1E))) {
Return(0x02)
}
If(LNot(LGreater(Arg0, 0x2D))) {
Return(0x01)
}
If(LNot(LGreater(Arg0, 0x3C))) {
Return(0x02)
}
If(LNot(LGreater(Arg0, 0x5A))) {
Return(0x01)
}
Return(0x00)
}
Method(SETT, 0x03) {
If(And(Arg1, 0x02, Zero)) {
If(LAnd(LNot(LGreater(Arg0, 0x78)), And(Arg2, 0x02, Zero))) {
Return(0x0B)
}
If(LAnd(LNot(LGreater(Arg0, 0xB4)), And(Arg2, 0x01, Zero))) {
Return(0x09)
}
}
Return(0x04)
}
}
Device(SBUS) {
Name(_ADR, 0x001F0003)
}
Device(AUD0) {
Name(_ADR, 0x001F0005)
}
Device(MODM) {
Name(_ADR, 0x001F0006)
Name(_PRW, Package(0x02) {
0x05
0x03
})
}
}
}} |
FACS |
|---|
Firmware ACPI Control Structure -------------------------------------------------------------------------------- Signature : FACS Table length : 64 Byte Hardware signature : f[+ Firmware Waking Vector : 00000000h Global Lock : 00000000h Flags : 00000000h (S4BIOS_REQ is not supported) |
CPU |
|---|
================================================================================ Vendor : Intel Corp. Vendor ID String : GenuineIntel CPU Type : OEM Processor Family : 6 Model : B Stepping : 1 Signature : 000006B1 FPU Model : Built-in FPU Internal Clock : 733 MHz Host Clock : 133 MHz Cache Type : Write-back Data Cache Size : 16 kB Instruction Cache Size : 16 kB L2 Cache Size : 512 kB Brand ID : 06H Supported Processor Features -------------------------------------------------------------------------------- On-Chip FPU Enhanced V86 mode Debugging Extension Page Size Extensions (4MB paging) Time Stamp Counter Model Specific Register Physical Address Extensions Machine Check Exception Compare and Exchange 8 bytes instruction (CMPXCHG8B) Fast System Call Memory Type Range Registers Page Global Enable Machine Check Architecture Conditional Move Instructions (CMOVcc) Page Attribute Table 36-bit Page Size Extension MultiMedia Extensions (MMX) Fast Floating Point Save and Restore Streaming SIMD Extension |
CPU Tests Folder |
|---|
Basic Test |
|---|
Not Tested |
CPU Benchmark |
|---|
Not Tested |
Floppy |
|---|
Floppy Drive(s) Installed : 1 ================================================================================ IRQ Level : 6 DMA Channel : 2 I/O Range : 03F2h-03F6h |
Drive A |
|---|
Drive A ================================================================================ Media type : 1.44MB, 3.5" Drive Maximum track number : 79 Maximum sector number : 18 Maximum head number : 1 Diskette Parameter Table Contents -------------------------------------------------------------------------------- Step Rate Time Code : 0Fh Head Unload Time Code : 0Dh Head Load Time Code : 00h Drive Motor Turn-Off Delay : 2035 ms Bytes Per Sector : 512 Sector Per Track : 18 GAP Length For Read/Write : 1Bh Data Transfer Length Code : FFh Format GAP Length : 6Ch Fill Byte For Format : F6h Head Settling Time : 15 ms Motor Startup Time : 625 ms |
Drive A Tests Folder |
|---|
Controller test |
|---|
Not Tested |
Change-line test |
|---|
Not Tested |
Write protect test |
|---|
Not Tested |
Linear test |
|---|
Not Tested |
Random test |
|---|
Not Tested |
Butterfly test |
|---|
Not Tested |
Quick test |
|---|
Not Tested |
Seek test |
|---|
Not Tested |
Video system |
|---|
Video Adapter(s) Found: ================================================================================ Primary : Almador Graphics Chip Accelerated VGA BIOS, 8 MB |
Almador Graphics Chip Accelerated VGA BIOS |
|---|
Video Adapter
================================================================================
Location : PCI Card
Video System Type : Primary
Video Adapter Type : Super VGA
Video Memory Size : 8 MB
OEM Vendor Name : "Intel Corporation"
OEM Product Name : "Almador Graphics Controller"
OEM Product Revision : "Hardware Version 0.0"
OEM Software Revision : 1.0
OEM String : "Almador Graphics Chip Accelerated VGA BIOS"
VESA Version : 3.0
VESA Power Management Version : 1.0
VESA PM Supported States :
: STANDBY
: SUSPEND
: OFF
: REDUCED ON
VESA Supported Video Modes : 13
+------------------------------------------+
| Number Mode HRes. VRes. Colors |
+------------------------------------------+
0107h Graphic 1280 1024 256
0112h Graphic 640 480 16M
0115h Graphic 800 600 16M
0116h Graphic 1024 768 32K
0117h Graphic 1024 768 64K
0118h Graphic 1024 768 16M
011Ah Graphic 1280 1024 64K
011Bh Graphic 1280 1024 16M
0101h Graphic 640 480 256
0103h Graphic 800 600 256
0105h Graphic 1024 768 256
0111h Graphic 640 480 64K
0114h Graphic 800 600 64K
|
Almador Graphics Chip Accelerated VGA BIOS Tests Folder |
|---|
Random |
|---|
Not Tested |
Independent bits |
|---|
Not Tested |
Independent addresses |
|---|
Not Tested |
Monitor |
|---|
Monitor ================================================================================ Monitor Type : Analog color |
DMI |
|---|
Found SMBIOS Information via PnP Interface -------------------------------------------------------------------------------- Revision : 2.3 Number of structures : 38 Maximum structure size : 58h (88 decimal) bytes DMI Storage base : 000D3010h DMI Storage size : 0471h SMBIOS 2.3 Structure Table Entry Point Structure (at F000:62C0) -------------------------------------------------------------------------------- Anchor String : _SM_ Checksum : 26h Entry Point Structure Length : 1Fh bytes SMBIOS Revision : 2.3 Maximum Structure Size : 58h (88 decimal) bytes Entry Point Revision : 0 Formated Area (5 bytes) : 0 0 0 0 0 DMI BIOS Structure Entry Point Structure (at F000h:62C0h) -------------------------------------------------------------------------------- Header : _DMI_ Checksum : 5Dh Length : 0471h (1137 decimal) bytes BIOS Structure Table Address : 000D3010h Number of Structures : 38 DMI BIOS Revision : 2.3 |
Unknown Type 208 |
|---|
Structure : Unknown (Type 208) Length : 0Ah (10 decimal) bytes Handle : 0000h (0 decimal) ================================================================================ Dump of the structure (11 bytes): -------------------------------------------------------------------------------- 0000: D0 0A 00 00 - 01 04 FE 00 "........" 0008: 22 01 00 "".." |
Unknown Type 212 |
|---|
Structure : Unknown (Type 212) Length : 11h (17 decimal) bytes Handle : 0001h (1 decimal) ================================================================================ Dump of the structure (18 bytes): -------------------------------------------------------------------------------- 0000: D4 11 01 00 - 72 00 73 00 "....r.s." 0008: 0F 00 00 00 - 5C 00 50 FE "....\.P." 0010: 01 00 ".." |
Unknown Type 212 |
|---|
Structure : Unknown (Type 212) Length : 11h (17 decimal) bytes Handle : 0002h (2 decimal) ================================================================================ Dump of the structure (18 bytes): -------------------------------------------------------------------------------- 0000: D4 11 02 00 - 72 00 73 00 "....r.s." 0008: 0F 00 00 00 - 5D 00 50 FE "....].P." 0010: 00 00 ".." |
Unknown Type 218 |
|---|
Structure : Unknown (Type 218) Length : 11h (17 decimal) bytes Handle : 0003h (3 decimal) ================================================================================ Dump of the structure (18 bytes): -------------------------------------------------------------------------------- 0000: DA 11 03 00 - B2 00 DE 0C "........" 0008: 0E 18 00 00 - 00 00 00 FF "........" 0010: FF 00 ".." |
Unknown Type 222 |
|---|
Structure : Unknown (Type 222) Length : 0Dh (13 decimal) bytes Handle : 0004h (4 decimal) ================================================================================ Dump of the structure (14 bytes): -------------------------------------------------------------------------------- 0000: DE 0D 04 00 - 39 04 FF FF "....9..." 0008: 00 00 00 00 - 00 00 "......" |
BIOS |
|---|
Structure : BIOS (Type 0) Length : 14h (20 decimal) bytes Handle : 0005h (5 decimal) ================================================================================ BIOS Vendor : Phoenix Technologies LTD BIOS Version : A01 Starting Address Segment : E000h BIOS Release Date : 04/23/2002 BIOS ROM Size : 1M BIOS Characteristics: 3C01DF80h 00000000h -------------------------------------------------------------------------------- ISA Supported : No MCA Supported : No EISA Supported : No PCI Supported : Yes PCMCIA Supported : Yes PnP Supported : Yes APM Supported : Yes Flashable BIOS : Yes BIOS shadowing : Yes VL-VESA Supported : No ESCD Supported : Yes CD-Boot Supported : Yes Selectable Boot Supported : Yes BIOS ROM Socketed : No Boot From PC Card Supported : No EDD Specification Supported : No NEC 9800 1.2mb Floppy Supported : No Toshiba 1.2mb Floppy Supported : No 5.25" / 360 KB Floppy Supported : No 5.25" / 1.2MB Floppy Supported : No 3.5" / 720 KB Floppy Supported : No 3.5" / 2.88 MB Floppy Supported : No Print Screen Supported : Yes 8042 Keyboard Supported : Yes Serial Services Supported : Yes Printer Services Supported : Yes CGA/Mono Video Supported : No NEC PC-98 : No BIOS Characteristics Extension Byte 1 (50h): -------------------------------------------------------------------------------- ACPI Supported : No USB Legacy Supported : No AGP Supported : No I2O Boot Supported : No LS-120 Boot Supported : Yes ATAPI ZIP Drive Boot Supported : No 1394 Boot Supported : Yes Smart Battery Supported : No BIOS Characteristics Extension Byte 2 (68h): -------------------------------------------------------------------------------- BIOS Boot Supported : No Network Boot Supported : No Dump of the structure (62 bytes): -------------------------------------------------------------------------------- 0000: 00 14 05 00 - 01 02 00 E0 "........" 0008: 03 0F 80 DF - 01 3C 00 00 ".....<.." 0010: 00 00 D3 03 - 50 68 6F 65 "....Phoe" 0018: 6E 69 78 20 - 54 65 63 68 "nix Tech" 0020: 6E 6F 6C 6F - 67 69 65 73 "nologies" 0028: 20 4C 54 44 - 00 41 30 31 " LTD.A01" 0030: 20 20 00 30 - 34 2F 32 33 " .04/23" 0038: 2F 32 30 30 - 32 00 "/2002." |
System |
|---|
Structure : System (Type 1) Length : 19h (25 decimal) bytes Handle : 0006h (6 decimal) ================================================================================ Manufacturer : Dell Computer Corp. Product Name : Latitude X200 Version : A01 Serial Number : 4H4X711 UUID : 0000: 44 45 4C 4C - 48 00 10 34 "DELLH..4" 0008: 80 58 B4 C0 - 4F 37 31 31 ".X..O711" Wake-up Type : Power Switch Dump of the structure (82 bytes): -------------------------------------------------------------------------------- 0000: 01 19 06 00 - 01 02 03 04 "........" 0008: 44 45 4C 4C - 48 00 10 34 "DELLH..4" 0010: 80 58 B4 C0 - 4F 37 31 31 ".X..O711" 0018: 06 44 65 6C - 6C 20 43 6F ".Dell Co" 0020: 6D 70 75 74 - 65 72 20 43 "mputer C" 0028: 6F 72 70 2E - 00 4C 61 74 "orp..Lat" 0030: 69 74 75 64 - 65 20 58 32 "itude X2" 0038: 30 30 00 41 - 30 31 20 00 "00.A01 ." 0040: 34 48 34 58 - 37 31 31 00 "4H4X711." 0048: 20 20 20 20 - 20 20 20 20 " " 0050: 20 00 " ." |
System Enclosure or Chassis |
|---|
Structure : System Enclosure or Chassis (Type 3) Length : 11h (17 decimal) bytes Handle : 0007h (7 decimal) ================================================================================ Manufacturer : Dell Computer Corp. Type : Notebook Chassis Lock : Not Present or Unknown Version : 00h Serial Number : 4H4X711 Asset Tag Number : (none) Bootup State : Safe Power Supply State : Safe Thermal State : Safe Security Status : None Dump of the structure (62 bytes): -------------------------------------------------------------------------------- 0000: 03 11 07 00 - 01 0A 02 03 "........" 0008: 04 03 03 03 - 03 34 12 00 ".....4.." 0010: 00 44 65 6C - 6C 20 43 6F ".Dell Co" 0018: 6D 70 75 74 - 65 72 20 43 "mputer C" 0020: 6F 72 70 2E - 00 30 30 68 "orp..00h" 0028: 00 34 48 34 - 58 37 31 31 ".4H4X711" 0030: 00 20 20 20 - 20 20 20 20 ". " 0038: 20 20 20 20 - 20 00 " ." |
BIOS |
|---|
Structure : BIOS (Type 0) Length : 03h (3 decimal) bytes Handle : 0811h (2065 decimal) ================================================================================ BIOS Vendor : (none) BIOS Version : Starting Address Segment : 020Ch BIOS Release Date : (none) BIOS ROM Size : Unknown size (byte=04h) BIOS Characteristics: 03030303h 00001234h -------------------------------------------------------------------------------- ISA Supported : No MCA Supported : No EISA Supported : No PCI Supported : No PCMCIA Supported : Yes PnP Supported : Yes APM Supported : No Flashable BIOS : No BIOS shadowing : No VL-VESA Supported : No ESCD Supported : No CD-Boot Supported : No Selectable Boot Supported : Yes BIOS ROM Socketed : Yes Boot From PC Card Supported : No EDD Specification Supported : No NEC 9800 1.2mb Floppy Supported : No Toshiba 1.2mb Floppy Supported : No 5.25" / 360 KB Floppy Supported : No 5.25" / 1.2MB Floppy Supported : No 3.5" / 720 KB Floppy Supported : Yes 3.5" / 2.88 MB Floppy Supported : Yes Print Screen Supported : No 8042 Keyboard Supported : No Serial Services Supported : No Printer Services Supported : No CGA/Mono Video Supported : No NEC PC-98 : No Dump of the structure (17 bytes): -------------------------------------------------------------------------------- 0000: 00 03 11 08 - 00 01 0C 02 "........" 0008: 03 04 03 03 - 03 03 34 12 "......4." 0010: 00 "." |
Structure : (Type 68) Length : 65h (101 decimal) bytes Handle : 6C6Ch (27756 decimal) ================================================================================ Dump of the structure (118 bytes): -------------------------------------------------------------------------------- 0000: 44 65 6C 6C - 20 43 6F 6D "Dell Com" 0008: 70 75 74 65 - 72 20 43 6F "puter Co" 0010: 72 70 2E 00 - 30 30 68 00 "rp..00h." 0018: 34 48 34 58 - 37 31 31 00 "4H4X711." 0020: 20 20 20 20 - 20 20 20 20 " " 0028: 20 20 20 20 - 00 00 00 04 " ...." 0030: 23 09 00 01 - 03 11 02 B1 "#......." 0038: 06 00 00 FF - F9 83 03 03 "........" 0040: 8B 85 00 DD - 02 DD 02 41 ".......A" 0048: 06 0D 00 0E - 00 FF FF 00 "........" 0050: 00 00 55 35 - 30 37 00 47 "..U507.G" 0058: 65 6E 75 69 - 6E 65 49 6E "enuineIn" 0060: 74 65 6C 00 - 49 6E 74 65 "tel.Inte" 0068: 6C 28 52 29 - 20 50 65 6E "l(R) Pen" 0070: 74 69 75 6D - 28 00 "tium(." |
Memory Controller |
|---|
Structure : Memory Controller (Type 5) Length : 12h (18 decimal) bytes Handle : 000Ah (10 decimal) ================================================================================ Error Detecting Method : 03h (None) Error Correcting Capability : 04h (None) Supported Interleave : 03h (One Way Interleave) Current Interleave : 03h (One Way Interleave) Maximum Memory Module Size : 09h (512 MB ) Supported Speeds : 000Ch (70 Ns, 60 Ns) Supported Memory Types : 0500h (DIMM, SDRAM) Memory Module Voltage : 02h (3.3V) Number of Associated Memory Slots : 01h Memory Module Configuration Handles : 01h Enabled Error Correcting Capability : 04h (None) Dump of the structure (19 bytes): -------------------------------------------------------------------------------- 0000: 05 12 0A 00 - 03 04 03 03 "........" 0008: 09 0C 00 00 - 05 02 01 01 "........" 0010: 00 04 00 "..." |
Memory Module: J509 |
|---|
Structure : Memory Module (Type 6) Length : 0Ch (12 decimal) bytes Handle : 000Bh (11 decimal) ================================================================================ Socket Designation : J509 Bank Connections : 01h (RAS 0, RAS 1) Current Speed : 0 Ns (Not determinable) Current Memory Type : 0500h (DIMM, SDRAM) Installed Size : 07h (128 MB - Single Bank) Enabled Size : 07h (128 MB) Error Status : 00h (Errors: Cor-None; UnCor-None) Dump of the structure (17 bytes): -------------------------------------------------------------------------------- 0000: 06 0C 0B 00 - 01 01 00 00 "........" 0008: 05 07 07 00 - 4A 35 30 39 "....J509" 0010: 00 "." |
Memory Module: J509 |
|---|
Structure : Memory Module (Type 6) Length : 0Ch (12 decimal) bytes Handle : 000Ch (12 decimal) ================================================================================ Socket Designation : J509 Bank Connections : 23h (RAS 2, RAS 3) Current Speed : 0 Ns (Not determinable) Current Memory Type : 0500h (DIMM, SDRAM) Installed Size : 87h (128 MB - Double Bank) Enabled Size : 87h (128 MB) Error Status : 00h (Errors: Cor-None; UnCor-None) Dump of the structure (17 bytes): -------------------------------------------------------------------------------- 0000: 06 0C 0C 00 - 01 23 00 00 ".....#.." 0008: 05 87 87 00 - 4A 35 30 39 "....J509" 0010: 00 "." |
Cache: L1 Cache |
|---|
Structure : Cache (Type 7) Length : 13h (19 decimal) bytes Handle : 000Dh (13 decimal) ================================================================================ Socket Designation : L1 Cache Cache Configuration : 0188h (L1; Socketed; Internal; Enabled; WB) Maximum Cache Size : 0020h (32 K) Installed Size : 0020h (32 K) Supported SRAM Type : 0058h (Burst, Pipeline Burst, Asynchronous) Current SRAM Type : 0040h (Asynchronous) Cache Speed : 0 Ns (unknown) Error Correcion Type : Unknown System Cache Type : Unknown Associativity : Unknown Dump of the structure (28 bytes): -------------------------------------------------------------------------------- 0000: 07 13 0D 00 - 01 88 01 20 "....... " 0008: 00 20 00 58 - 00 40 00 00 ". .X.@.." 0010: 02 02 02 4C - 31 20 43 61 "...L1 Ca" 0018: 63 68 65 00 "che." |
Cache: L2 Cache |
|---|
Structure : Cache (Type 7) Length : 13h (19 decimal) bytes Handle : 000Eh (14 decimal) ================================================================================ Socket Designation : L2 Cache Cache Configuration : 01A9h (L2; Socketed; External; Enabled; WB) Maximum Cache Size : 0200h (512 K) Installed Size : 0200h (512 K) Supported SRAM Type : 0058h (Burst, Pipeline Burst, Asynchronous) Current SRAM Type : 0008h (Burst) Cache Speed : 0 Ns (unknown) Error Correcion Type : Unknown System Cache Type : Unknown Associativity : Unknown Dump of the structure (28 bytes): -------------------------------------------------------------------------------- 0000: 07 13 0E 00 - 01 A9 01 00 "........" 0008: 02 00 02 58 - 00 08 00 00 "...X...." 0010: 02 02 02 4C - 32 20 43 61 "...L2 Ca" 0018: 63 68 65 00 "che." |
Port Connector: MODEM |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 000Fh (15 decimal) ================================================================================ Internal Reference Designator : J500 Internal Connector Type : 00h (None) External Reference Designator : MODEM External Connector Type : 00h (None) Port Type : 1Eh (Modem Port) Dump of the structure (20 bytes): -------------------------------------------------------------------------------- 0000: 08 09 0F 00 - 01 00 02 00 "........" 0008: 1E 4A 35 30 - 30 00 4D 4F ".J500.MO" 0010: 44 45 4D 00 "DEM." |
Port Connector: LAN |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 0010h (16 decimal) ================================================================================ Internal Reference Designator : J500 Internal Connector Type : 00h (None) External Reference Designator : LAN External Connector Type : 00h (None) Port Type : 1Fh (Network Port) Dump of the structure (18 bytes): -------------------------------------------------------------------------------- 0000: 08 09 10 00 - 01 00 02 00 "........" 0008: 1F 4A 35 30 - 30 00 4C 41 ".J500.LA" 0010: 4E 00 "N." |
Port Connector: VIDEO |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 0011h (17 decimal) ================================================================================ Internal Reference Designator : J502 Internal Connector Type : 00h (None) External Reference Designator : VIDEO External Connector Type : 07h (DB-15 pin female) Port Type : 1Ch (Video Port) Dump of the structure (20 bytes): -------------------------------------------------------------------------------- 0000: 08 09 11 00 - 01 00 02 07 "........" 0008: 1C 4A 35 30 - 32 00 56 49 ".J502.VI" 0010: 44 45 4F 00 "DEO." |
Port Connector: USB1 |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 0012h (18 decimal) ================================================================================ Internal Reference Designator : J505 Internal Connector Type : 00h (None) External Reference Designator : USB1 External Connector Type : 00h (None) Port Type : 10h (USB) Dump of the structure (19 bytes): -------------------------------------------------------------------------------- 0000: 08 09 12 00 - 01 00 02 00 "........" 0008: 10 4A 35 30 - 35 00 55 53 ".J505.US" 0010: 42 31 00 "B1." |
Port Connector: USB2 |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 0013h (19 decimal) ================================================================================ Internal Reference Designator : J507 Internal Connector Type : 00h (None) External Reference Designator : USB2 External Connector Type : 00h (None) Port Type : 10h (USB) Dump of the structure (19 bytes): -------------------------------------------------------------------------------- 0000: 08 09 13 00 - 01 00 02 00 "........" 0008: 10 4A 35 30 - 37 00 55 53 ".J507.US" 0010: 42 32 00 "B2." |
Port Connector: USB1 |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 0014h (20 decimal) ================================================================================ Internal Reference Designator : J505 Internal Connector Type : 00h (None) External Reference Designator : USB1 External Connector Type : 00h (None) Port Type : 10h (USB) Dump of the structure (19 bytes): -------------------------------------------------------------------------------- 0000: 08 09 14 00 - 01 00 02 00 "........" 0008: 10 4A 35 30 - 35 00 55 53 ".J505.US" 0010: 42 31 00 "B1." |
Port Connector: 1394 |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 0015h (21 decimal) ================================================================================ Internal Reference Designator : J510 Internal Connector Type : 00h (None) External Reference Designator : 1394 External Connector Type : 21h (IEEE 1394 (Firewire)) Port Type : 11h (FireWire (IEEE P1394)) Dump of the structure (19 bytes): -------------------------------------------------------------------------------- 0000: 08 09 15 00 - 01 00 02 21 ".......!" 0008: 11 4A 35 31 - 30 00 31 33 ".J510.13" 0010: 39 34 00 "94." |
Port Connector: AUDIO |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 0016h (22 decimal) ================================================================================ Internal Reference Designator : J511/3 Internal Connector Type : 00h (None) External Reference Designator : AUDIO External Connector Type : 00h (None) Port Type : 1Dh (Audio Port) Dump of the structure (22 bytes): -------------------------------------------------------------------------------- 0000: 08 09 16 00 - 01 00 02 00 "........" 0008: 1D 4A 35 31 - 31 2F 33 00 ".J511/3." 0010: 41 55 44 49 - 4F 00 "AUDIO." |
System Slot: J9 |
|---|
Structure : System Slot (Type 9) Length : 0Dh (13 decimal) bytes Handle : 0017h (23 decimal) ================================================================================ Slot Designation : J9 Slot Type : 07h (PC Card (PCMCIA)) Slot Data Bus Width : 05h (32 bit) Current Usage : 04h (In Use) Slot Length : 04h (Full Length) Slot ID : 01h Slot Characteristics : 36h (Provides 5.0 Volts, Provides 3.3 Volts, PC Card-16, Cardbus) Slot Characteristics 2 : 03h (Supports PME#) Dump of the structure (16 bytes): -------------------------------------------------------------------------------- 0000: 09 0D 17 00 - 01 07 05 04 "........" 0008: 04 01 00 36 - 03 4A 39 00 "...6.J9." |
System Slot: J512 |
|---|
Structure : System Slot (Type 9) Length : 0Dh (13 decimal) bytes Handle : 0018h (24 decimal) ================================================================================ Slot Designation : J512 Slot Type : 06h (PCI) Slot Data Bus Width : 05h (32 bit) Current Usage : 04h (In Use) Slot Length : 04h (Full Length) Slot ID : 01h Slot Characteristics : 06h (Provides 5.0 Volts, Provides 3.3 Volts) Slot Characteristics 2 : 00h (None) Dump of the structure (18 bytes): -------------------------------------------------------------------------------- 0000: 09 0D 18 00 - 01 06 05 04 "........" 0008: 04 01 00 06 - 00 4A 35 31 ".....J51" 0010: 32 00 "2." |
On Board Devices |
|---|
Structure : On Board Devices (Type 10) Length : 0Ah (10 decimal) bytes Handle : 0019h (25 decimal) ================================================================================ Device Type : 07h (Disabled, Sound) Description String : Crystal Audio AC97 Codec Device Type : 05h (Disabled, Ethernet) Description String : 3COM 3C920V1 Device Type : 03h (Disabled, Video) Description String : Intel 830M Internal Dump of the structure (68 bytes): -------------------------------------------------------------------------------- 0000: 0A 0A 19 00 - 07 01 05 02 "........" 0008: 03 03 43 72 - 79 73 74 61 "..Crysta" 0010: 6C 20 41 75 - 64 69 6F 20 "l Audio " 0018: 41 43 39 37 - 20 43 6F 64 "AC97 Cod" 0020: 65 63 00 33 - 43 4F 4D 20 "ec.3COM " 0028: 33 43 39 32 - 30 56 31 00 "3C920V1." 0030: 49 6E 74 65 - 6C 20 38 33 "Intel 83" 0038: 30 4D 20 49 - 6E 74 65 72 "0M Inter" 0040: 6E 61 6C 00 "nal." |
OEM Strings |
|---|
Structure : OEM Strings (Type 11) Length : 05h (5 decimal) bytes Handle : 001Ah (26 decimal) ================================================================================ Number of OEM Strings: 2768 0) 'Dell System' 1) '1[0122]' 2) '3[1.0]' 3) '4[0001]' 4) '6[DA]' Dump of the structure (46 bytes): -------------------------------------------------------------------------------- 0000: 0B 05 1A 00 - 05 44 65 6C ".....Del" 0008: 6C 20 53 79 - 73 74 65 6D "l System" 0010: 00 31 5B 30 - 31 32 32 5D ".1[0122]" 0018: 00 33 5B 31 - 2E 30 5D 00 ".3[1.0]." 0020: 34 5B 30 30 - 30 31 5D 00 "4[0001]." 0028: 36 5B 44 41 - 5D 00 "6[DA]." |
System Event Log |
|---|
Structure : System Event Log (Type 15) Length : 1Dh (29 decimal) bytes Handle : 001Bh (27 decimal) ================================================================================ Log Area Length : 32 (20h) Log Header Start Offset : 0 (00h) Log Data Start Offset : 16 (10h) Access Method : 4 Log Status : 00h (Log Area Not Valid, Not Full) Log Change Token : 00000070h Access Method Address : 00000000h Log Header Format : 01h (Type 1 header) Supported Descriptors : 03h Length of Descriptor : 02h List of Supported Event Log Type Descriptors -------------------------------------------------------------------------------- Event Type : 08h (POST Error) Data format type : 04h Event Type : 01h (Single-bit ECC Memory Error) Data format type : 02h Event Type : 02h (Multi-bit ECC Memory Error) Data format type : 02h Dump of the structure (30 bytes): -------------------------------------------------------------------------------- 0000: 0F 1D 1B 00 - 20 00 00 00 ".... ..." 0008: 10 00 04 00 - 70 00 00 00 "....p..." 0010: 00 00 00 00 - 01 03 02 08 "........" 0018: 04 01 02 02 - 02 00 "......" |
Physical Memory Array |
|---|
Structure : Physical Memory Array (Type 16) Length : 0Fh (15 decimal) bytes Handle : 001Ch (28 decimal) ================================================================================ Location : System board or motherboard Use : Video memory Memory Error Correction : None Maximum Capacity : 524288 KB Memory Error Information Handle : FFFE Number of Memory Devices : 1 Dump of the structure (16 bytes): -------------------------------------------------------------------------------- 0000: 10 0F 1C 00 - 03 04 03 00 "........" 0008: 00 08 00 FE - FF 01 00 00 "........" |
Memory Device: J509 |
|---|
Structure : Memory Device (Type 17) Length : 1Bh (27 decimal) bytes Handle : 001Dh (29 decimal) ================================================================================ Memory Array Handle : 001C Memory Error Information Handle : FFFF Total Width : 64bits Data Width : 64bits Size : 128MB Form Factor : SODIMM Device Set : 0001h Device Locator : J509 Bank Locator : Bank 0 Memory Type : SDRAM Type Detail : 0080h Speed : UnknownManufacturer : (none) Serial Number : (none) Asset Tag : (none) Part Number : (none) Dump of the structure (39 bytes): -------------------------------------------------------------------------------- 0000: 11 1B 1D 00 - 1C 00 FF FF "........" 0008: 40 00 40 00 - 80 00 0D 01 "@.@....." 0010: 01 02 0F 80 - 00 00 00 00 "........" 0018: 00 00 00 4A - 35 30 39 00 "...J509." 0020: 42 61 6E 6B - 20 30 00 "Bank 0." |
Memory Device: J509 |
|---|
Structure : Memory Device (Type 17) Length : 1Bh (27 decimal) bytes Handle : 001Eh (30 decimal) ================================================================================ Memory Array Handle : 001C Memory Error Information Handle : FFFF Total Width : 64bits Data Width : 64bits Size : 128MB Form Factor : SODIMM Device Set : 0001h Device Locator : J509 Bank Locator : Bank 1 Memory Type : SDRAM Type Detail : 0080h Speed : UnknownManufacturer : (none) Serial Number : (none) Asset Tag : (none) Part Number : (none) Dump of the structure (39 bytes): -------------------------------------------------------------------------------- 0000: 11 1B 1E 00 - 1C 00 FF FF "........" 0008: 40 00 40 00 - 80 00 0D 01 "@.@....." 0010: 01 02 0F 80 - 00 00 00 00 "........" 0018: 00 00 00 4A - 35 30 39 00 "...J509." 0020: 42 61 6E 6B - 20 31 00 "Bank 1." |
Memory Array Mapped Address |
|---|
Structure : Memory Array Mapped Address (Type 19) Length : 0Fh (15 decimal) bytes Handle : 001Fh (31 decimal) ================================================================================ Starting Address : 00000000h Ending Address : 0003FFFFh Memory Array Handle : 001Ch Partition Width : 01h Dump of the structure (16 bytes): -------------------------------------------------------------------------------- 0000: 13 0F 1F 00 - 00 00 00 00 "........" 0008: FF FF 03 00 - 1C 00 01 00 "........" |
Memory Device Mapped Address |
|---|
Structure : Memory Device Mapped Address (Type 20) Length : 13h (19 decimal) bytes Handle : 0020h (32 decimal) ================================================================================ Starting Address : 00000000h Ending Address : 0001FFFFh Memory Device Handle : 001Dh Memory Array Mapped Address Handle : 001Fh Partition Row Position : 01h Interleave Position : 00h Interleaved Data Depth : 00h Dump of the structure (20 bytes): -------------------------------------------------------------------------------- 0000: 14 13 20 00 - 00 00 00 00 ".. ....." 0008: FF FF 01 00 - 1D 00 1F 00 "........" 0010: 01 00 00 00 "...." |
Built-in Pointing Device |
|---|
Structure : Built-in Pointing Device (Type 21) Length : 07h (7 decimal) bytes Handle : 0021h (33 decimal) ================================================================================ Type : 07h Interface : 04h Number of Buttons : 02h Dump of the structure (8 bytes): -------------------------------------------------------------------------------- 0000: 15 07 21 00 - 07 04 02 00 "..!....." |
Portable Battery |
|---|
Structure : Portable Battery (Type 22) Length : 1Ah (26 decimal) bytes Handle : 0022h (34 decimal) ================================================================================ Location : In the Back Manufacturer : DELL Computer Corp. Manufacture Date : (none) Serial Number : (none) Device Name : DELL Computer Corp. Device Chemistry : 02h Design Capacity : 5296 mWatt-hours Design Voltage : 10800 mVolts SBDS* Version Number : 1.0 Maximum Error in Battery Data : FFh SBDS* Serial Number : 0001h SBDS* Manufacture Date (M/D/Y): 04/01/2002 SBDS* Device Chemistry : LION Design Capacity Multiplier : x1 OEM Specific : 00000000h * Smart Battery Data Specification Dump of the structure (67 bytes): -------------------------------------------------------------------------------- 0000: 16 1A 22 00 - 01 02 00 00 ".."....." 0008: 02 02 B0 14 - 30 2A 03 FF "....0*.." 0010: 01 00 81 2C - 04 01 00 00 "...,...." 0018: 00 00 49 6E - 20 74 68 65 "..In the" 0020: 20 42 61 63 - 6B 00 44 45 " Back.DE" 0028: 4C 4C 20 43 - 6F 6D 70 75 "LL Compu" 0030: 74 65 72 20 - 43 6F 72 70 "ter Corp" 0038: 2E 00 31 2E - 30 00 4C 49 "..1.0.LI" 0040: 4F 4E 00 "ON." |
System Boot Information |
|---|
Structure : System Boot Information (Type 32)
Length : 14h (20 decimal) bytes
Handle : 0023h (35 decimal)
================================================================================
Boot Status:
0) Unknown
1) No bootable media
2) The "normal" operating system failed to load
3) Firmware-detected hardware failure
4) Operating system-detected hardware failure
5) User-requested boot
6) System security violation
7) Previously-requested image
8) A system watchdog timer expired, causing the system to reboot
9) Unknown
Dump of the structure (21 bytes):
--------------------------------------------------------------------------------
0000: 20 14 23 00 - 00 00 00 00 " .#....."
0008: 00 00 0C 01 - 02 03 04 05 "........"
0010: 06 07 08 09 - 00 "....."
|
Inactive |
|---|
Structure : Inactive (Type 126) Length : 04h (4 decimal) bytes Handle : 0024h (36 decimal) ================================================================================ Dump of the structure (5 bytes): -------------------------------------------------------------------------------- 0000: 7E 04 24 00 - 00 "~.$.." |
End-of-Table |
|---|
Structure : End-of-Table (Type 127) Length : 04h (4 decimal) bytes Handle : 0025h (37 decimal) ================================================================================ Dump of the structure (5 bytes): -------------------------------------------------------------------------------- 0000: 7F 04 25 00 - 00 "..%.." |
Hard disk(s) |
|---|
BIOS Reported 1 hard disk(s) ================================================================================ Alias Cylinders Heads Sectors Size(MB) -------------------------------------------------------------------------------- Hard disk 0 58140 16 63 28615.78 |
Hard disk 0 |
|---|
Hard Disk 0 Info Via INT 13
================================================================================
BIOS Number of Cylinders : 1024
BIOS Number of Heads : 255
BIOS Number of Sectors : 63
Hard Disk Capacity : 30005.82 MB (1KB = 1000 bytes)
: 28615.78 MB (1KB = 1024 bytes)
(From INT 13 Extension BIOS)
Notes:
1. Warning: BIOS Parameters May Be Unreliable
Due To Limitations of PC Architecture.
2. Historically, Hard Disk Manufacturers Calculating
Volume Make 1KB Equal 1000 Bytes.
INT 13h Fixed Disk Extensions Present.
Major Version : 30h
Extended Drive Parameter Table
--------------------------------------------------------------------------------
Total Number of Addressable Cylinders : 16383
Total Number of Addressable Heads : 16
Number of Sectors Per Track : 63
Total Number of Addressable Sectors : 058605120
Number of Bytes Per Sector : 512
Information Flags : 1
--------------------------------------------------------------------------------
DMA Boundary Errors Are Automatically Avoided By EBIOS
Partition Table Information
--------------------------------------------------------------------------------
Entry 0
-------
Partition Status : 80h (Active)
Partition Type : 0Ch (Windows95 with 32-bit FAT (using LBA-mode INT 13 Extensions))
Start Head : 1
Start Sector : 1
Start Cylinder : 0
End Head : 254
End Sector : 63
End Cylinder : 1023
First Sector (LBA type) : 63
Total Number of Sectors : 58588992 (28607.906 MB)
Entry 1
-------
Partition Status : 00h (Not active)
Partition Type : 00h (empty)
Start Head : 0
Start Sector : 0
Start Cylinder : 0
End Head : 0
End Sector : 0
End Cylinder : 0
First Sector (LBA type) : 0
Total Number of Sectors : 0 (0.0 MB)
Entry 2
-------
Partition Status : 00h (Not active)
Partition Type : 00h (empty)
Start Head : 0
Start Sector : 0
Start Cylinder : 0
End Head : 0
End Sector : 0
End Cylinder : 0
First Sector (LBA type) : 0
Total Number of Sectors : 0 (0.0 MB)
Entry 3
-------
Partition Status : 00h (Not active)
Partition Type : 00h (empty)
Start Head : 0
Start Sector : 0
Start Cylinder : 0
End Head : 0
End Sector : 0
End Cylinder : 0
First Sector (LBA type) : 0
Total Number of Sectors : 0 (0.0 MB)
|
Hard disk 0 Tests Folder |
|---|
Controller test |
|---|
Not Tested |
Linear test |
|---|
Not Tested |
Random test |
|---|
Not Tested |
Butterfly test |
|---|
Not Tested |
Seek test |
|---|
Not Tested |
HDD Benchmark |
|---|
Not Tested |
Memory |
|---|
Memory ================================================================================ Size : 253148 KB (247 MB) System Memory Map Reported by BIOS via INT 0x15 Function 0xE820 --------------------------------------------------------------- Base Address | Length | Type --------------------------------------------------------------- 00000000h 0009E000h ( 632 KB) 01 (Memory, available to OS) 0009E000h 00002000h ( 8 KB) 02 (Reserved, not available) 000C0000h 00014000h ( 80 KB) 02 (Reserved, not available) 000E0000h 00020000h ( 128 KB) 02 (Reserved, not available) 00100000h 0F5B7000h ( 245.7 MB) 01 (Memory, available to OS) 0F6B7000h 00029000h ( 164 KB) 04 (ACPI NVS Memory (OS is required to save this memory between NVS sessions)) 0F6E0000h 00010000h ( 64 KB) 03 (ACPI Reclaim Memory (usable by OS after reading ACPI tables)) 0F6F0000h 00010000h ( 64 KB) 04 (ACPI NVS Memory (OS is required to save this memory between NVS sessions)) 0F700000h 00080000h ( 512 KB) 01 (Memory, available to OS) 0F780000h 00800000h ( 8 MB) 02 (Reserved, not available) Memory module information reported by DMI: ----------------------------------------------------------------- Socket Speed Size Enabled Type ----------------------------------------------------------------- J509 0 Ns 128 MB 128 MB DIMM, SDRAM |
Memory Tests Folder |
|---|
Memory Benchmark |
|---|
Not Tested |
Snake On |
|---|
Not Tested |
Snake Off |
|---|
Not Tested |
Parity |
|---|
Not Tested |
Inv. Parity |
|---|
Not Tested |
Checkerboard |
|---|
Not Tested |
Inv. Checkerboard |
|---|
Not Tested |
Bit Walk Left |
|---|
Not Tested |
Inv. Bit Walk Left |
|---|
Not Tested |
Bit Walk Right |
|---|
Not Tested |
Inv. Bit Walk Right |
|---|
Not Tested |
March |
|---|
Not Tested |
Random |
|---|
Not Tested |
Jump In |
|---|
Not Tested |
Jump Out |
|---|
Not Tested |
Address Line |
|---|
Not Tested |
Data Bus |
|---|
Not Tested |
Column Test |
|---|
Not Tested |
Row Test |
|---|
Not Tested |
Serial Ports |
|---|
List of Detected Serial Ports ================================================================================ UART chip type Base IRQ Name Location -------------------------------------------------------------------------------- 16550A/AF/C/CF 03F8H 4 COM1 Motherboard Dump of BIOS Data Area at 0040:0000H -------------------------------------------------------------------------------- 0040:0000 F8 03 00 00 00 00 00 00 "........" |
COM1 |
|---|
16550A-compatible COM port ================================================================================ Location : Motherboard I/O Base Address : 03F8H BIOS Name : COM1 IRQ Channel : 4 UART Chip Type : 16550A/AF/C/CF |
COM1 Tests Folder |
|---|
Internal Loopback Test |
|---|
Not Tested |
External Loopback Test |
|---|
Not Tested |
UART Registers Test |
|---|
Not Tested |
Sound |
|---|
Audio Device(s) Found : ================================================================================ 1. PCI card 2. PC Speaker |
PCI card |
|---|
PCI card ================================================================================ Location : PCI Device on Motherboard Vendor Id : 8086h (Intel) Device Id : 2485h (PCI card) Class : 01h (Audio Device) Sub Vendor Id : 1028h (Dell Computer Corp) Sub Device Id : 0122h (info unavailable) |
Option ROM(s) |
|---|
Option ROM(s) Found: 5 ================================================================================ Option ROM at C0000h - Intel Option ROM at D0000h Option ROM at D3000h Option ROM at D4000h Option ROM at D4800h - 3COM Corp 3C905C-TX Fast Etherlink for PC Management NIC |
Option ROM at C0000h |
|---|
Option ROM
================================================================================
Location : C0000h
Length : 50688 bytes (49.50 kB)
Boot initialization vector : E9 DB AD 30 (JMP CADE1h)
Entry point of boot procedure : CADE1h
Offset of PCI DATA structure : 0040h (valid)
Offset of Expansion Header : 0CA0h (invalid)
PCI Expansion ROM Image Data Structure at C0040h
--------------------------------------------------------------------------------
PCI data structure signature : PCIR
PCI device vendor ID : 8086 (Intel)
PCI device ID : 3577 (Unknown)
Length of PCI data structure : 24 bytes
Structure revision : 0.0
PCI device class : 03 00 00 (VGA Compatible Controller)
Length of PCI expansion ROM : 65536 bytes (64.0 kB)
Code/Data revision level : 0.0
Device is Intel x86 compliant : Yes
Option ROM first 256 bytes dump
--------------------------------------------------------------------------------
0000: 55 AA 63 E9 - DB AD 30 30 - 30 30 30 30 "U.c...000000"
000C: 30 30 30 30 - 30 30 5F 15 - E9 45 15 85 "000000_..E.."
0018: 40 00 A0 0C - 30 30 49 42 - 4D 20 56 47 "@...00IBM VG"
0024: 41 20 43 6F - 6D 70 61 74 - 69 62 6C 65 "A Compatible"
0030: 20 42 49 4F - 53 2E 20 03 - 5B 00 6B 00 " BIOS. .[.k."
003C: 79 00 8B C0 - 50 43 49 52 - 86 80 77 35 "y...PCIR..w5"
0048: 00 00 18 00 - 00 00 00 03 - 80 00 00 00 "............"
0054: 00 80 00 00 - 00 5C 05 00 - C0 00 00 00 ".....\......"
0060: 00 00 00 00 - 00 00 00 00 - 00 75 00 00 ".........u.."
006C: C0 00 00 00 - 00 00 00 00 - 00 1A 00 25 "...........%"
0078: 05 00 C0 00 - 00 00 00 00 - 00 00 00 00 "............"
0084: 00 00 00 00 - 00 00 00 00 - 00 00 00 04 "............"
0090: 00 00 00 00 - 00 00 08 00 - 00 00 00 00 "............"
009C: 00 00 00 00 - 00 00 00 00 - E4 18 14 07 "............"
00A8: 00 00 03 E4 - 18 14 07 00 - 02 0C E4 18 "............"
00B4: 14 07 00 04 - 30 E4 18 14 - 07 00 06 C0 "....0......."
00C0: E4 19 14 07 - 00 00 03 E4 - 19 14 07 00 "............"
00CC: 02 0C E4 1A - 14 07 00 02 - 0C E4 1A 14 "............"
00D8: 07 00 04 30 - E4 1A 14 07 - 00 06 C0 64 "...0.......d"
00E4: 19 14 07 00 - 04 30 64 19 - 14 07 00 06 ".....0d....."
00F0: C0 64 1A 14 - 07 00 00 03 - 64 1B 14 07 ".d......d..."
00FC: 00 00 03 64 "...d"
|
Option ROM at D0000h |
|---|
Option ROM
================================================================================
Location : D0000h
Length : 12288 bytes (12.0 kB)
Boot initialization vector : CB 00 06 C9 (invalid)
Entry point of boot procedure : None
Offset of PCI DATA structure : FFFFh (invalid)
Offset of Expansion Header : FFFFh (invalid)
Option ROM first 256 bytes dump
--------------------------------------------------------------------------------
0000: 55 AA 18 CB - 00 06 C9 00 - C9 06 E0 06 "U..........."
000C: 37 62 01 00 - 01 00 34 06 - 34 06 00 00 "7b....4.4..."
0018: FF FF FF FF - FF FF FF FF - 00 00 00 00 "............"
0024: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
0030: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
003C: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
0048: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
0054: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
0060: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
006C: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
0078: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
0084: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
0090: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
009C: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
00A8: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
00B4: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
00C0: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
00CC: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
00D8: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
00E4: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
00F0: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
00FC: 00 00 00 00 "...."
|
Option ROM at D3000h |
|---|
Option ROM
================================================================================
Location : D3000h
Length : 4096 bytes (4.0 kB)
Boot initialization vector : CB 00 00 00 (invalid)
Entry point of boot procedure : None
Offset of PCI DATA structure : 0122h (invalid)
Option ROM first 256 bytes dump
--------------------------------------------------------------------------------
0000: 55 AA 08 CB - 00 00 00 00 - 00 00 00 00 "U..........."
000C: 00 00 00 00 - D0 0A 00 00 - 01 04 FE 00 "............"
0018: 22 01 00 00 - D4 11 01 00 - 72 00 73 00 "".......r.s."
0024: 0F 00 00 00 - 5C 00 50 FE - 01 00 00 D4 "....\.P....."
0030: 11 02 00 72 - 00 73 00 0F - 00 00 00 5D "...r.s.....]"
003C: 00 50 FE 00 - 00 00 DA 11 - 03 00 B2 00 ".P.........."
0048: DE 0C 0E 18 - 00 00 00 00 - 00 FF FF 00 "............"
0054: 00 DE 0D 04 - 00 39 04 FF - FF 00 00 00 ".....9......"
0060: 00 00 00 00 - 00 14 05 00 - 01 02 00 E0 "............"
006C: 03 0F 80 DF - 01 3C 00 00 - 00 00 D3 03 ".....<......"
0078: 50 68 6F 65 - 6E 69 78 20 - 54 65 63 68 "Phoenix Tech"
0084: 6E 6F 6C 6F - 67 69 65 73 - 20 4C 54 44 "nologies LTD"
0090: 00 41 30 31 - 20 20 00 30 - 34 2F 32 33 ".A01 .04/23"
009C: 2F 32 30 30 - 32 00 00 01 - 19 06 00 01 "/2002......."
00A8: 02 03 04 44 - 45 4C 4C 48 - 00 10 34 80 "...DELLH..4."
00B4: 58 B4 C0 4F - 37 31 31 06 - 44 65 6C 6C "X..O711.Dell"
00C0: 20 43 6F 6D - 70 75 74 65 - 72 20 43 6F " Computer Co"
00CC: 72 70 2E 00 - 4C 61 74 69 - 74 75 64 65 "rp..Latitude"
00D8: 20 58 32 30 - 30 00 41 30 - 31 20 00 34 " X200.A01 .4"
00E4: 48 34 58 37 - 31 31 00 20 - 20 20 20 20 "H4X711. "
00F0: 20 20 20 20 - 00 00 03 11 - 07 00 01 0A " ........"
00FC: 02 03 04 03 "...."
|
Option ROM at D4000h |
|---|
Option ROM
================================================================================
Location : D4000h
Length : 2048 bytes (2.0 kB)
Boot initialization vector : E9 C0 03 42 (JMP D43C6h)
Entry point of boot procedure : D43C6h
Offset of PCI DATA structure : 005Bh (valid)
Offset of Expansion Header : 0073h (valid)
PCI Expansion ROM Image Data Structure at D405Bh
--------------------------------------------------------------------------------
PCI data structure signature : PCIR
PCI device vendor ID : 0000 (Unknown)
PCI device ID : 0000 (Unknown)
Length of PCI data structure : 24 bytes
Structure revision : 0.0
PCI device class : 00 00 02 (Unknown PCI Device)
Length of PCI expansion ROM : 46080 bytes (45.0 kB)
Code/Data revision level : 0.0
Device is Intel x86 compliant : Yes
PCI Option ROM has an orphan Vendor and Device ID
PnP Expansion ROM Header at D4073h
--------------------------------------------------------------------------------
Signature : $PnP
Structure revision : 0.1
Length (in 16 byte increments) : 2 (32 bytes)
Offset of next header : 0000h (None)
Checksum : 8Ah (Valid)
Device Identifier : @@@0000
Offset of Manufacturer String : 0093h (3Com)
Offset of Product Name : 0098h (MBA BC)
Device class code : 02 00 00 (Ethernet Controller)
Boot connection vector (BCV) : 0000h (None)
Disconnect vector (DV) : 0000h (None)
Bootstrap entry vector (BEV) : 0000h (None)
Static resource info vector : 0000h (None)
Device Indicators
-----------------
It's a display device : No
It's an input device : No
It's an IPL device : Yes
ROM is required only at boot : Yes
ROM is read cacheable : No
ROM may be shadowed in RAM : No
DDI model supported : No
Option ROM first 256 bytes dump
--------------------------------------------------------------------------------
0000: 55 AA 04 E9 - C0 03 42 4C - 44 52 00 09 "U.....BLDR.."
000C: 07 03 00 00 - 00 00 00 00 - 00 00 45 00 "..........E."
0018: 5B 00 73 00 - FF FF 32 04 - AD 00 40 05 "[.s...2...@."
0024: E0 AD 00 00 - 45 72 72 6F - 72 3A 20 42 "....Error: B"
0030: 61 64 20 42 - 61 73 65 20 - 43 6F 64 65 "ad Base Code"
003C: 20 69 6D 61 - 67 65 0D 0A - 00 24 42 43 " image...$BC"
0048: 24 12 31 00 - 00 01 02 57 - 01 00 08 00 "$.1....W...."
0054: 00 E0 AD 00 - 4E 18 00 50 - 43 49 52 00 "....N..PCIR."
0060: 00 00 00 00 - 00 18 00 00 - 02 00 00 5A "...........Z"
006C: 00 00 00 00 - 80 00 00 24 - 50 6E 50 01 ".......$PnP."
0078: 02 00 00 00 - 8A 00 00 00 - 00 93 00 98 "............"
0084: 00 02 00 00 - 14 00 00 00 - 00 00 00 00 "............"
0090: 00 00 00 33 - 43 6F 6D 00 - 4D 42 41 20 "...3Com.MBA "
009C: 42 43 00 33 - C0 66 26 81 - 3D 24 50 6E "BC.3.f&.=$Pn"
00A8: 50 75 1C 33 - C9 26 8A 4D - 05 E8 FE 01 "Pu.3.&.M...."
00B4: 0A C0 75 0D - 66 26 83 7D - 0D 00 74 05 "..u.f&.}..t."
00C0: B8 01 00 EB - 02 33 C0 C3 - 66 8B C6 66 ".....3..f..f"
00CC: 8B DF 68 E0 - 4F 07 66 33 - F6 26 C7 44 "..h.O.f3.&.D"
00D8: 10 FF FF 26 - C7 44 18 FF - FF 26 C6 44 "...&.D...&.D"
00E4: 15 93 26 C6 - 44 1D 93 26 - C6 44 16 01 "..&.D..&.D.."
00F0: 26 C6 44 1E - 01 26 89 44 - 12 66 C1 E8 "&.D..&.D.f.."
00FC: 10 26 88 44 ".&.D"
|
Option ROM at D4800h |
|---|
Option ROM
================================================================================
Location : D4800h
Length : 2048 bytes (2.0 kB)
Boot initialization vector : E9 BE 05 55 (JMP D4DC4h)
Entry point of boot procedure : D4DC4h
Offset of PCI DATA structure : 0060h (valid)
Offset of Expansion Header : 0040h (valid)
PCI Expansion ROM Image Data Structure at D4860h
--------------------------------------------------------------------------------
PCI data structure signature : PCIR
PCI device vendor ID : 10B7 (3COM Corp)
PCI device ID : 9200 (3C905C-TX Fast Etherlink for PC Management NIC)
Length of PCI data structure : 24 bytes
Structure revision : 0.0
PCI device class : 00 00 02 (Unknown PCI Device)
Length of PCI expansion ROM : 16384 bytes (16.0 kB)
Code/Data revision level : 0.0
Device is Intel x86 compliant : Yes
PnP Expansion ROM Header at D4840h
--------------------------------------------------------------------------------
Signature : $PnP
Structure revision : 0.1
Length (in 16 byte increments) : 2 (32 bytes)
Offset of next header : 0000h (None)
Checksum : 3Bh (Valid)
Device Identifier : @@@0000
Offset of Manufacturer String : 0078h (3Com)
Offset of Product Name : 00D3h (MBA UNDI(Bus2 Slot5))
Device class code : 02 00 00 (Ethernet Controller)
Boot connection vector (BCV) : 0000h (None)
Disconnect vector (DV) : 0000h (None)
Bootstrap entry vector (BEV) : 032Ch (valid)
Static resource info vector : 0000h (None)
Device Indicators
-----------------
It's a display device : No
It's an input device : No
It's an IPL device : Yes
ROM is required only at boot : Yes
ROM is read cacheable : No
ROM may be shadowed in RAM : No
DDI model supported : No
Option ROM first 256 bytes dump
--------------------------------------------------------------------------------
0000: 55 AA 04 E9 - BE 05 55 4C - 44 52 04 09 "U.....ULDR.."
000C: 07 03 00 00 - 00 00 00 00 - 00 00 80 00 "............"
0018: 60 00 40 00 - 6D 00 32 04 - 00 00 00 10 "`.@.m.2....."
0024: 38 29 40 39 - D0 05 00 01 - 28 02 28 02 "8)@9....(.(."
0030: FF FF 40 63 - 00 F0 00 01 - 00 00 00 02 "..@c........"
003C: 19 00 8B C0 - 24 50 6E 50 - 01 02 00 00 "....$PnP...."
0048: 00 3B 00 00 - 00 00 78 00 - D3 00 02 00 ".;....x....."
0054: 00 14 00 00 - 00 00 2C 03 - 00 00 00 00 "......,....."
0060: 50 43 49 52 - B7 10 00 92 - 00 00 18 00 "PCIR........"
006C: 00 02 00 00 - 20 00 00 00 - 00 80 00 00 ".... ......."
0078: 33 43 6F 6D - 00 2E 8B C0 - 55 4E 44 49 "3Com....UNDI"
0084: 16 25 00 00 - 01 02 BF 03 - 00 08 5C 38 ".%........\8"
0090: E0 26 50 43 - 49 52 4D 42 - 41 20 35 02 ".&PCIRMBA 5."
009C: 00 00 00 00 - 00 00 83 33 - 43 6F 6D 20 ".......3Com "
00A8: 31 30 2F 31 - 30 30 20 45 - 74 68 65 72 "10/100 Ether"
00B4: 6E 65 74 20 - 4E 49 43 00 - 00 00 00 00 "net NIC....."
00C0: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............"
00CC: 00 00 00 00 - 00 00 00 4D - 42 41 20 55 ".......MBA U"
00D8: 4E 44 49 28 - 42 75 73 32 - 20 53 6C 6F "NDI(Bus2 Slo"
00E4: 74 35 29 00 - 30 29 00 00 - 00 00 00 00 "t5).0)......"
00F0: 00 00 00 45 - 72 72 6F 72 - 3A 20 43 61 "...Error: Ca"
00FC: 6E 27 74 20 "n't "
|
Modems |
|---|
Modem(s) Found: ================================================================================ 1. PCI Modem |
PCI Modem |
|---|
PCI Modem ================================================================================ Vendor Id : 8086h (Intel) Device Id : 2486h (PCI Modem) Class : 03h (Generic modem) Sub Vendor Id : 134Dh (Pctel Inc) Sub Device Id : 4C21h (info unavailable) Location : PCI Device on Motherboard |
Mice |
|---|
Mouse Found : 1 ================================================================================ 1. PS/2 Mouse |
PS/2 Mouse |
|---|
PS/2 Mouse ================================================================================ Mouse Type : PS/2 Mouse Mouse Name : Microsoft Compatible Mouse IRQ Channel : 12 |
PS/2 Mouse Tests Folder |
|---|
Mouse interactive test |
|---|
Not Tested |
Parallel Ports |
|---|
List of Detected Parallel Ports ================================================================================ Port Type Base IRQ DMA Name Notes -------------------------------------------------------------------------------- ECP 0378H 7 1 LPT1 Motherboard integrated Dump of BIOS Data Area at 0040:0008H -------------------------------------------------------------------------------- 0040:0008 78 03 00 00 00 00 "x....." |
LPT1 |
|---|
PnP Parallel Port at I/O Address 0378H ================================================================================ Location : Motherboard BIOS Name : LPT1 Device Name : ECP printer port IRQ Channel : 7 DMA Channel : 1 ECP Word Size : 8 bits ECP FIFO Size : 16 port words (16 bytes) ECP Read Threshold : 8 port words (8 bytes) ECP Write Threshold : 8 port words (8 bytes) RLE Compression : not supported Current Port Mode : Standard Parallel Port Mode List of Supported Modes -------------------------------------------------------------------------------- Standard Parallel Port Mode ECP Parallel Port Mode ECP Configuration Mode ECP FIFO Test Mode Bi-Directional (PS/2 Port) Mode Nibble Mode |
LPT1 Tests Folder |
|---|
Internal test |
|---|
Not Tested |
Standard loopback test |
|---|
Not Tested |
Data output test |
|---|
Not Tested |
Data input test |
|---|
Not Tested |
EPP transfer test |
|---|
Not Tested |
ECP transfer test |
|---|
Not Tested |
Y2K Compliance |
|---|
Y2K Compliance Tests Folder |
|---|
Y2K Compliance test |
|---|
Not Tested |
ISA Bus |
|---|
ISA (Interconnect Standard Architecture) ================================================================================ Number of I/O address lines : 16 I/O space size : 64 Kb Note: ISA bus speed is limited to 8.33 Mhz |
ISA Bus Tests Folder |
|---|
Scan I/O space |
|---|
Started: 08:34:40 06-Jun-2002 Finished: 08:37:55 06-Jun-2002 Duration: 00:03:14 Result: passed Passed: 1 Failed: 0 The following I/O ranges that are neither PnP nor PCI appear to be used by ISA legacy cards or hidden motherboard I/O resources. ================================================================================ 03D1h 03D3h 3 Video Adapter 03D6h 03D9h 4 Video Adapter 03DDh 03DFh 3 Video Adapter |
MPEG |
|---|
No MPEG Device Found or MPEG Device is not Configured |
PC Speaker |
|---|
PC Speaker ================================================================================ I/O address : 0061H |
PC Speaker Tests Folder |
|---|
PC Speaker test |
|---|
Not Tested |
USB |
|---|
USB Controller(s) Found: 3 |
USB Host Controller |
|---|
Universal Serial Bus controller following the UHCI (Universal Host Controller Specification) ================================================================================ I/O Space Base Address: 8C80H Serial Bus Release Number: 1.0 |
USB Host Controller Tests Folder |
|---|
Host controller test |
|---|
Not Tested |
Control transfer LED test |
|---|
Not Tested |
Bulk transfer test |
|---|
Not Tested |
Isochronous transfer test |
|---|
Not Tested |
Interrupt transfer test |
|---|
Not Tested |
USB Host Controller |
|---|
Universal Serial Bus controller following the UHCI (Universal Host Controller Specification) ================================================================================ I/O Space Base Address: 8CA0H Serial Bus Release Number: 1.0 |
USB Host Controller Tests Folder |
|---|
Host controller test |
|---|
Not Tested |
Control transfer LED test |
|---|
Not Tested |
Bulk transfer test |
|---|
Not Tested |
Isochronous transfer test |
|---|
Not Tested |
Interrupt transfer test |
|---|
Not Tested |
USB Host Controller |
|---|
Universal Serial Bus controller following the UHCI (Universal Host Controller Specification) ================================================================================ I/O Space Base Address: 8CC0H Serial Bus Release Number: 1.0 |
USB Host Controller Tests Folder |
|---|
Host controller test |
|---|
Not Tested |
Control transfer LED test |
|---|
Not Tested |
Bulk transfer test |
|---|
Not Tested |
Isochronous transfer test |
|---|
Not Tested |
Interrupt transfer test |
|---|
Not Tested |
SCSI |
|---|
No SCSI Adapter Found or SCSI Adapter is not Configured |
Cache |
|---|
Cache Level(s) Found: ================================================================================ Level Size -------------------------------------------------------------------------------- L1 32 L2 512 |
Cache Tests Folder |
|---|
Cache test |
|---|
Not Tested |
L1 Cache |
|---|
L1 Cache ================================================================================ Data Cache Size : 16 KB Instruction Cache Size : 16 KB Cache Socketed : Socketed Cache Type : Write-back |
L2 Cache |
|---|
L2 Cache ================================================================================ Data Cache Size : 512 KB Cache Speed : 10 ns Cache Socketed : Socketed |
Super I/O |
|---|
Resource Maps |
|---|
IRQ map |
|---|
IRQ map ================================================================================ IRQ PIC Status Used by -------------------------------------------------------------------------------- 00 not masked AT Timer 01 not masked IBM Enhanced keyboard controller (101/2-key) 02 not masked AT Interrupt Controller 03 masked Not used 04 masked 16550A-compatible COM port 05 masked Not used 06 not masked PC standard floppy disk controller 07 masked ECP printer port 08 masked AT Real-Time Clock 09 masked Not used 10 masked VGA Device (PCI Bus 00,INTA#,Link value:60h) 10 masked USB (PCI Bus 00,INTA#,Link value:60h) 11 masked SMBus (PCI Bus 00,INTB#,Link value:61h) 11 masked USB (PCI Bus 00,INTC#,Link value:62h) 11 masked Audio Device (PCI Bus 00,INTB#,Link value:61h) 11 masked USB (PCI Bus 00,INTB#,Link value:63h) 11 masked Modem (PCI Bus 00,INTB#,Link value:61h) 11 masked FireWire Bus (PCI Bus 02,INTB#,Link value:62h) 11 masked 3C905C-TX Fast Etherlink for PC Management NIC (PCI Bus 02,INTA#,Link value:63h) 12 not masked PS/2 Port for PS/2-style Mice 13 not masked Math Coprocessor 14 not masked IDE Controller 15 masked IDE Controller |
DMA map |
|---|
DMA map ================================================================================ Channel Width Type Used by -------------------------------------------------------------------------------- 00 8 bit Normal Not used 01 8 bit Normal ECP printer port 02 8 bit Normal PC standard floppy disk controller 03 8 bit Normal Not used 04 16 bit Normal AT DMA Controller 05 16 bit Normal Not used 06 16 bit Normal Not used 07 16 bit Normal Not used |
Memory map |
|---|
Memory map ================================================================================ Base Limit Length Device -------------------------------------------------------------------------------- 00000000h 0009FFFFh 640 KB System Board 000062C0h 000062DEh 31 B DMI 000A0000h 000BFFFFh 128 KB Video buffer 000C0000h 000CC5FFh 49.5 KB Option ROM at C0000h 000CC600h 000CFFFFh 14.5 KB Motherboard registers 000D0000h 000D2FFFh 12 KB Motherboard registers 000D3000h 000D3FFFh 4 KB Motherboard registers 000D3010h 000D3480h 1.1 KB DMI 000D4000h 000D47FFh 2 KB Option ROM at D4000h 000D4800h 000D4FFFh 2 KB Option ROM at D4800h 000D5000h 000D7FFFh 12 KB Motherboard registers 000E0000h 000FFFFFh 128 KB System Board 00100000h 0F5FFFFFh 245 MB System Board E0000000h E007FFFFh 512 KB VGA Device E0080000h E00FFFFFh 512 KB Other display controller E0200000h E02FFFFFh 1 MB PCI-to-PCI Bridge E8000000h EFFFFFFFh 128 MB VGA Device F0000000h F7FFFFFFh 128 MB Other display controller FF000000h FF07FFFFh 512 KB INT0800 FF800000h FF87FFFFh 512 KB INT0800 FF880000h FF8FFFFFh 512 KB INT0800 FF900000h FF97FFFFh 512 KB INT0800 FF980000h FF9FFFFFh 512 KB INT0800 FFA00000h FFA7FFFFh 512 KB INT0800 FFA80000h FFAFFFFFh 512 KB INT0800 FFB00000h FFB7FFFFh 512 KB INT0800 FFB80000h FFBFFFFFh 512 KB INT0800 FFF00000h FFFFFFFFh 1 MB Motherboard registers |
I/O map |
|---|
I/O map ================================================================================ Base Limit Length Device -------------------------------------------------------------------------------- 0000h 000Fh 16 AT DMA Controller 0010h 001Fh 16 Motherboard registers 0020h 0021h 2 AT Interrupt Controller 0024h 0025h 2 Motherboard registers 0028h 0029h 2 Motherboard registers 002Ch 002Dh 2 Motherboard registers 0030h 0031h 2 Motherboard registers 0034h 0035h 2 Motherboard registers 0038h 0039h 2 Motherboard registers 003Ch 003Dh 2 Motherboard registers 0040h 0043h 4 AT Timer 0050h 0053h 4 Motherboard registers 0060h 0060h 1 IBM Enhanced keyboard controller (101/2-key) 0061h 0061h 1 AT standard speaker sound 0064h 0064h 1 IBM Enhanced keyboard controller (101/2-key) 0070h 0071h 2 AT Real-Time Clock 0072h 0073h 2 Motherboard registers 0074h 0075h 2 Motherboard registers 0076h 0077h 2 Motherboard registers 0080h 0080h 1 Motherboard registers 0081h 008Fh 15 AT DMA Controller 0090h 0091h 2 Motherboard registers 0092h 0092h 1 Motherboard registers 0093h 009Fh 13 Motherboard registers 00A0h 00A1h 2 AT Interrupt Controller 00A4h 00A5h 2 Motherboard registers 00A8h 00A9h 2 Motherboard registers 00ACh 00ADh 2 Motherboard registers 00B0h 00B1h 2 Motherboard registers 00B2h 00B3h 2 Motherboard registers 00B4h 00B5h 2 Motherboard registers 00B8h 00B9h 2 Motherboard registers 00BCh 00BDh 2 Motherboard registers 00C0h 00DFh 32 AT DMA Controller 00F0h 00FFh 16 Math Coprocessor 0170h 0177h 8 IDE Controller 01F0h 01F7h 8 IDE Controller 0279h 0279h 1 PnP ISA ADDRESS port 0376h 0377h 2 IDE Controller 0378h 037Fh 8 ECP printer port 03B4h 03B5h 2 MDA: CRT Controller Register 03BAh 03BAh 1 EGA: Feature Control Register 03BBh 03BCh 2 MDA: Light Pen registers 03C0h 03C1h 2 EGA: Attribute Controller Register 03C2h 03C2h 1 EGA: Miscellaneous Output Register 03C3h 03C3h 1 VGA: Enable Register 03C4h 03C5h 2 EGA: Sequensor Registers 03C6h 03C9h 4 VGA: DAC registers 03CAh 03CFh 6 EGA: Graphics Controller Registers 03D1h 03D3h 3 Video Adapter 03D4h 03D5h 2 CGA: CRT Controller Register 03D6h 03D9h 4 Video Adapter 03DAh 03DAh 1 EGA: Feature Control Register 03DBh 03DCh 2 CGA: Light Pen registers 03DDh 03DFh 3 Video Adapter 03E0h 03E1h 2 Intel 82365-compatible CardBus controller 03F0h 03F5h 6 PC standard floppy disk controller 03F6h 03F6h 1 IDE Controller 03F7h 03F7h 1 PC standard floppy disk controller 03F8h 03FFh 8 16550A-compatible COM port 04D0h 04D1h 2 Motherboard registers 0600h 060Fh 16 Motherboard registers 0778h 077Fh 8 ECP printer port 0A79h 0A79h 1 PnP ISA WRITE_DATA port 0CF8h 0CFFh 8 PCI Bus 2180h 218Fh 16 Motherboard registers 8000h 805Fh 96 Motherboard registers 8060h 807Fh 32 Motherboard registers 8080h 80BFh 64 Motherboard registers 80C0h 80FFh 64 Audio Device 8400h 84FFh 256 Audio Device 8800h 88FFh 256 Modem 8C00h 8C7Fh 128 Modem 8C80h 8C9Fh 32 USB 8CA0h 8CBFh 32 USB 8CC0h 8CDFh 32 USB 8CE0h 8CFFh 32 SMBus 9000h 900Fh 16 IDE Controller A000h AFFFh 4096 PCI-to-PCI Bridge FCFCh FCFDh 2 Texas Instruments PCI1410 (CardBus) |
Connectors |
|---|
Port Connectors: ================================================================================ Connector Type -------------------------------------------------------------------------------- MODEM LAN VIDEO DB-15 pin female USB1 USB2 USB1 1394 IEEE 1394 (Firewire) AUDIO |